| /kernel/linux/linux-6.6/drivers/gpu/drm/nouveau/nvkm/subdev/clk/ |
| D | pllgt215.c | 42 lM = (info->refclk + info->vco1.max_inputfreq) / info->vco1.max_inputfreq; in gt215_pll_calc()
44 hM = (info->refclk + info->vco1.min_inputfreq) / info->vco1.min_inputfreq; in gt215_pll_calc()
50 N = tmp / info->refclk; in gt215_pll_calc()
51 fN = tmp % info->refclk; in gt215_pll_calc()
54 if (fN >= info->refclk / 2) in gt215_pll_calc()
57 if (fN < info->refclk / 2) in gt215_pll_calc()
59 fN = tmp - (N * info->refclk); in gt215_pll_calc()
67 err = abs(freq - (info->refclk * N / M / *P)); in gt215_pll_calc()
75 *pfN = ((fN << 13) + info->refclk / 2) / info->refclk; in gt215_pll_calc()
86 return info->refclk * *pN / *pM / *P; in gt215_pll_calc()
|
| /kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/nvkm/subdev/clk/ |
| D | pllgt215.c | 42 lM = (info->refclk + info->vco1.max_inputfreq) / info->vco1.max_inputfreq; in gt215_pll_calc()
44 hM = (info->refclk + info->vco1.min_inputfreq) / info->vco1.min_inputfreq; in gt215_pll_calc()
50 N = tmp / info->refclk; in gt215_pll_calc()
51 fN = tmp % info->refclk; in gt215_pll_calc()
54 if (fN >= info->refclk / 2) in gt215_pll_calc()
57 if (fN < info->refclk / 2) in gt215_pll_calc()
59 fN = tmp - (N * info->refclk); in gt215_pll_calc()
67 err = abs(freq - (info->refclk * N / M / *P)); in gt215_pll_calc()
75 *pfN = ((fN << 13) + info->refclk / 2) / info->refclk; in gt215_pll_calc()
86 return info->refclk * *pN / *pM / *P; in gt215_pll_calc()
|
| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/pinctrl/ |
| D | mediatek,mt7620-pinctrl.yaml | 39 pa, pcie refclk, pcie rst, pcm gpio, pcm i2s, pcm uartf,
40 refclk, rgmii1, rgmii2, sd, spi, spi refclk, uartf, uartlite,
41 wdt refclk, wdt rst, wled]
70 spi refclk, uartf, uartlite, wdt, wled]
138 const: pcie refclk
183 const: refclk
228 const: spi refclk
232 enum: [spi refclk]
255 const: wdt refclk
|
| /kernel/linux/linux-6.6/drivers/phy/ti/ |
| D | phy-dm816x-usb.c | 47 struct clk *refclk; member
77 if (clk_get_rate(phy->refclk) != 24000000) in dm816x_usb_phy_init()
78 dev_warn(phy->dev, "nonstandard phy refclk\n"); in dm816x_usb_phy_init()
124 clk_disable(phy->refclk); in dm816x_usb_phy_runtime_suspend()
135 error = clk_enable(phy->refclk); in dm816x_usb_phy_runtime_resume()
152 clk_disable(phy->refclk); in dm816x_usb_phy_runtime_resume()
227 phy->refclk = devm_clk_get(phy->dev, "refclk"); in dm816x_usb_phy_probe()
228 if (IS_ERR(phy->refclk)) in dm816x_usb_phy_probe()
229 return PTR_ERR(phy->refclk); in dm816x_usb_phy_probe()
230 error = clk_prepare(phy->refclk); in dm816x_usb_phy_probe()
[all …]
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| /kernel/linux/linux-5.10/drivers/phy/ti/ |
| D | phy-dm816x-usb.c | 56 struct clk *refclk; member
86 if (clk_get_rate(phy->refclk) != 24000000) in dm816x_usb_phy_init()
87 dev_warn(phy->dev, "nonstandard phy refclk\n"); in dm816x_usb_phy_init()
133 clk_disable(phy->refclk); in dm816x_usb_phy_runtime_suspend()
144 error = clk_enable(phy->refclk); in dm816x_usb_phy_runtime_resume()
161 clk_disable(phy->refclk); in dm816x_usb_phy_runtime_resume()
236 phy->refclk = devm_clk_get(phy->dev, "refclk"); in dm816x_usb_phy_probe()
237 if (IS_ERR(phy->refclk)) in dm816x_usb_phy_probe()
238 return PTR_ERR(phy->refclk); in dm816x_usb_phy_probe()
239 error = clk_prepare(phy->refclk); in dm816x_usb_phy_probe()
[all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/usb/ |
| D | usb3503.txt | 18 - refclk: Clock used for driving REFCLK signal (optional, if not provided
23 - refclk-frequency: Frequency of the REFCLK signal as defined by REF_SEL
25 REFCLK signal and assume that a value from the primary reference
38 clock-names = "refclk";
|
| D | octeon-usb.txt | 24 - cavium,refclk-type: type of the USB reference clock. Allowed values are
27 - refclk-frequency: deprecated, use "clock-frequency".
29 - refclk-type: deprecated, use "cavium,refclk-type".
54 cavium,refclk-type = "crystal";
|
| /kernel/linux/linux-6.6/drivers/gpu/drm/i915/display/ |
| D | intel_cdclk.c | 1227 u16 refclk; member
1234 { .refclk = 19200, .cdclk = 144000, .divider = 8, .ratio = 60 },
1235 { .refclk = 19200, .cdclk = 288000, .divider = 4, .ratio = 60 },
1236 { .refclk = 19200, .cdclk = 384000, .divider = 3, .ratio = 60 },
1237 { .refclk = 19200, .cdclk = 576000, .divider = 2, .ratio = 60 },
1238 { .refclk = 19200, .cdclk = 624000, .divider = 2, .ratio = 65 },
1243 { .refclk = 19200, .cdclk = 79200, .divider = 8, .ratio = 33 },
1244 { .refclk = 19200, .cdclk = 158400, .divider = 4, .ratio = 33 },
1245 { .refclk = 19200, .cdclk = 316800, .divider = 2, .ratio = 33 },
1250 { .refclk = 19200, .cdclk = 172800, .divider = 2, .ratio = 18 },
[all …]
|
| D | intel_dpll.c | 234 /* LVDS 100mhz refclk limits. */
313 int pnv_calc_dpll_params(int refclk, struct dpll *clock) in pnv_calc_dpll_params() argument
319 clock->vco = DIV_ROUND_CLOSEST(refclk * clock->m, clock->n); in pnv_calc_dpll_params()
330 int i9xx_calc_dpll_params(int refclk, struct dpll *clock) in i9xx_calc_dpll_params() argument
336 clock->vco = DIV_ROUND_CLOSEST(refclk * clock->m, clock->n + 2); in i9xx_calc_dpll_params()
342 int vlv_calc_dpll_params(int refclk, struct dpll *clock) in vlv_calc_dpll_params() argument
348 clock->vco = DIV_ROUND_CLOSEST(refclk * clock->m, clock->n); in vlv_calc_dpll_params()
354 int chv_calc_dpll_params(int refclk, struct dpll *clock) in chv_calc_dpll_params() argument
360 clock->vco = DIV_ROUND_CLOSEST_ULL(mul_u32_u32(refclk, clock->m), in chv_calc_dpll_params()
368 * Returns whether the given set of divisors are valid for a given refclk with
[all …]
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| D | intel_dpll.h | 23 int vlv_calc_dpll_params(int refclk, struct dpll *clock);
24 int pnv_calc_dpll_params(int refclk, struct dpll *clock);
25 int i9xx_calc_dpll_params(int refclk, struct dpll *clock);
42 int chv_calc_dpll_params(int refclk, struct dpll *pll_clock);
|
| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/usb/ |
| D | smsc,usb3503.yaml | 64 Clock used for driving REFCLK signal. If not provided the driver assumes
70 const: refclk
72 refclk-frequency:
75 Frequency of the REFCLK signal as defined by REF_SEL pins. If not
76 provided, driver will not set rate of the REFCLK signal and assume that a
122 clock-names = "refclk";
141 clock-names = "refclk";
156 refclk-frequency = <19200000>;
|
| D | octeon-usb.txt | 24 - cavium,refclk-type: type of the USB reference clock. Allowed values are
27 - refclk-frequency: deprecated, use "clock-frequency".
29 - refclk-type: deprecated, use "cavium,refclk-type".
54 cavium,refclk-type = "crystal";
|
| /kernel/linux/linux-6.6/drivers/gpu/drm/gma500/ |
| D | gma_display.h | 44 int target, int refclk,
49 void (*clock)(int refclk, struct gma_clock_t *clock);
50 const struct gma_limit_t *(*limit)(struct drm_crtc *crtc, int refclk);
83 extern const struct gma_limit_t *gma_limit(struct drm_crtc *crtc, int refclk);
84 extern void gma_clock(int refclk, struct gma_clock_t *clock);
89 struct drm_crtc *crtc, int target, int refclk,
|
| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn32/ |
| D | dcn32_dccg.c | 161 if (src == REFCLK) in dccg32_set_dtbclk_p_src()
170 if (src == REFCLK) in dccg32_set_dtbclk_p_src()
179 if (src == REFCLK) in dccg32_set_dtbclk_p_src()
188 if (src == REFCLK) in dccg32_set_dtbclk_p_src()
268 * Assume refclk is sourced from xtalin in dccg32_get_dccg_ref_freq()
284 /* always program refclk as DTBCLK. No use-case expected to require DPREFCLK as refclk */ in dccg32_set_dpstreamclk()
292 (src == REFCLK) ? 0 : 1, DPSTREAMCLK0_SRC_SEL, otg_inst); in dccg32_set_dpstreamclk()
296 (src == REFCLK) ? 0 : 1, DPSTREAMCLK1_SRC_SEL, otg_inst); in dccg32_set_dpstreamclk()
300 (src == REFCLK) ? 0 : 1, DPSTREAMCLK2_SRC_SEL, otg_inst); in dccg32_set_dpstreamclk()
304 (src == REFCLK) ? 0 : 1, DPSTREAMCLK3_SRC_SEL, otg_inst); in dccg32_set_dpstreamclk()
|
| /kernel/linux/linux-5.10/drivers/gpu/drm/gma500/ |
| D | gma_display.h | 44 int target, int refclk,
49 void (*clock)(int refclk, struct gma_clock_t *clock);
50 const struct gma_limit_t *(*limit)(struct drm_crtc *crtc, int refclk);
91 extern const struct gma_limit_t *gma_limit(struct drm_crtc *crtc, int refclk);
92 extern void gma_clock(int refclk, struct gma_clock_t *clock);
97 struct drm_crtc *crtc, int target, int refclk,
|
| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/phy/ |
| D | fsl,imx8-pcie-phy.yaml | 43 fsl,refclk-pad-mode:
45 Specifies the mode of the refclk pad used. It can be UNUSED(PHY
47 is provided externally via the refclk pad) or OUTPUT(PHY refclock
48 is derived from SoC internal source and provided on the refclk pad).
79 - fsl,refclk-pad-mode
99 fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>;
|
| /kernel/linux/linux-6.6/drivers/net/ethernet/arc/ |
| D | emac_rockchip.c | 32 struct clk *refclk; member
147 priv->refclk = devm_clk_get(dev, "macref"); in emac_rockchip_probe()
148 if (IS_ERR(priv->refclk)) { in emac_rockchip_probe()
150 PTR_ERR(priv->refclk)); in emac_rockchip_probe()
151 err = PTR_ERR(priv->refclk); in emac_rockchip_probe()
155 err = clk_prepare_enable(priv->refclk); in emac_rockchip_probe()
195 err = clk_set_rate(priv->refclk, 50000000); in emac_rockchip_probe()
241 clk_disable_unprepare(priv->refclk); in emac_rockchip_probe()
254 clk_disable_unprepare(priv->refclk); in emac_rockchip_remove()
|
| /kernel/linux/linux-5.10/drivers/net/ethernet/arc/ |
| D | emac_rockchip.c | 32 struct clk *refclk; member
147 priv->refclk = devm_clk_get(dev, "macref"); in emac_rockchip_probe()
148 if (IS_ERR(priv->refclk)) { in emac_rockchip_probe()
150 PTR_ERR(priv->refclk)); in emac_rockchip_probe()
151 err = PTR_ERR(priv->refclk); in emac_rockchip_probe()
155 err = clk_prepare_enable(priv->refclk); in emac_rockchip_probe()
195 err = clk_set_rate(priv->refclk, 50000000); in emac_rockchip_probe()
241 clk_disable_unprepare(priv->refclk); in emac_rockchip_probe()
255 clk_disable_unprepare(priv->refclk); in emac_rockchip_remove()
|
| /kernel/linux/linux-6.6/drivers/gpu/drm/loongson/ |
| D | lsdc_pixpll.h | 14 * refclk: reference frequency, 100 MHz from external oscillator
19 * refclk +-----------+ +------------------+ +---------+ outclk
29 * outclk = refclk / div_ref * loopc / div_out;
38 * 1) 20 MHz <= refclk / div_ref <= 40Mhz
39 * 2) 1.2 GHz <= refclk /div_out * loopc <= 3.2 Ghz
|
| /kernel/linux/linux-5.10/arch/mips/bcm63xx/ |
| D | clk.c | 423 CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
424 CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
440 CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
441 CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
454 CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
468 CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
482 CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
497 CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
498 CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
516 CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
[all …]
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| /kernel/linux/linux-6.6/arch/mips/bcm63xx/ |
| D | clk.c | 423 CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
424 CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
440 CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
441 CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
454 CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
468 CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
482 CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
497 CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
498 CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
516 CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
[all …]
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| /kernel/linux/linux-5.10/drivers/phy/xilinx/ |
| D | phy-zynqmp.c | 103 /* Refclk selection parameters */
192 * @refclk: reference clock index
201 unsigned int refclk; member
343 ssc = gtr_phy->dev->refclk_sscs[gtr_phy->refclk]; in xpsgtr_configure_pll()
350 if (gtr_phy->refclk != gtr_phy->lane) { in xpsgtr_configure_pll()
353 L0_REF_CLK_SEL_MASK, 1 << gtr_phy->refclk); in xpsgtr_configure_pll()
765 unsigned int refclk; in xpsgtr_xlate() local
794 refclk = args->args[3]; in xpsgtr_xlate()
795 if (refclk >= ARRAY_SIZE(gtr_dev->refclk_sscs) || in xpsgtr_xlate()
796 !gtr_dev->refclk_sscs[refclk]) { in xpsgtr_xlate()
[all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/mips/cavium/ |
| D | uctl.txt | 16 - refclk-frequency: A single cell containing the reference clock
19 - refclk-type: A string describing the reference clock connection
30 refclk-frequency = <24000000>;
32 refclk-type = "crystal";
|
| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/mips/cavium/ |
| D | uctl.txt | 16 - refclk-frequency: A single cell containing the reference clock
19 - refclk-type: A string describing the reference clock connection
30 refclk-frequency = <24000000>;
32 refclk-type = "crystal";
|
| /kernel/linux/linux-6.6/drivers/phy/xilinx/ |
| D | phy-zynqmp.c | 104 /* Refclk selection parameters */
211 * @refclk: reference clock index
220 unsigned int refclk; member
392 ssc = gtr_phy->dev->refclk_sscs[gtr_phy->refclk]; in xpsgtr_configure_pll()
399 if (gtr_phy->refclk == gtr_phy->lane) in xpsgtr_configure_pll()
404 L0_REF_CLK_SEL_MASK, 1 << gtr_phy->refclk); in xpsgtr_configure_pll()
624 if (clk_prepare_enable(gtr_dev->clk[gtr_phy->refclk])) in xpsgtr_phy_init()
676 clk_disable_unprepare(gtr_dev->clk[gtr_phy->refclk]); in xpsgtr_phy_exit()
826 unsigned int refclk; in xpsgtr_xlate() local
856 refclk = args->args[3]; in xpsgtr_xlate()
[all …]
|