| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/display/ti/ |
| D | ti,dra7-dss.txt | 4 See Documentation/devicetree/bindings/display/ti/ti,omap-dss.txt for generic
8 --------
11 - compatible: "ti,dra7-dss"
12 - reg: address and length of the register spaces for 'dss'
13 - ti,hwmods: "dss_core"
14 - clocks: handle to fclk
15 - clock-names: "fck"
16 - syscon: phandle to control module core syscon node
23 - reg: address and length of the register spaces for 'pll1_clkctrl',
25 - clocks: handle to video1 pll clock and video2 pll clock
[all …]
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| D | ti,omap5-dss.txt | 4 See Documentation/devicetree/bindings/display/ti/ti,omap-dss.txt for generic
8 --------
11 - compatible: "ti,omap5-dss"
12 - reg: address and length of the register space
13 - ti,hwmods: "dss_core"
14 - clocks: handle to fclk
15 - clock-names: "fck"
18 - DISPC
21 - DSS Submodules: RFBI, DSI, HDMI
22 - Video port for DPI output
[all …]
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| D | ti,omap4-dss.txt | 4 See Documentation/devicetree/bindings/display/ti/ti,omap-dss.txt for generic
8 --------
11 - compatible: "ti,omap4-dss"
12 - reg: address and length of the register space
13 - ti,hwmods: "dss_core"
14 - clocks: handle to fclk
15 - clock-names: "fck"
18 - DISPC
21 - DSS Submodules: RFBI, VENC, DSI, HDMI
22 - Video port for DPI output
[all …]
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| D | ti,omap3-dss.txt | 4 See Documentation/devicetree/bindings/display/ti/ti,omap-dss.txt for generic
8 --------
11 - compatible: "ti,omap3-dss"
12 - reg: address and length of the register space
13 - ti,hwmods: "dss_core"
14 - clocks: handle to fclk
15 - clock-names: "fck"
18 - Video ports:
19 - Port 0: DPI output
20 - Port 1: SDI output
[all …]
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/display/ti/ |
| D | ti,dra7-dss.txt | 4 See Documentation/devicetree/bindings/display/ti/ti,omap-dss.txt for generic
8 --------
11 - compatible: "ti,dra7-dss"
12 - reg: address and length of the register spaces for 'dss'
13 - ti,hwmods: "dss_core"
14 - clocks: handle to fclk
15 - clock-names: "fck"
16 - syscon: phandle to control module core syscon node
23 - reg: address and length of the register spaces for 'pll1_clkctrl',
25 - clocks: handle to video1 pll clock and video2 pll clock
[all …]
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| D | ti,omap5-dss.txt | 4 See Documentation/devicetree/bindings/display/ti/ti,omap-dss.txt for generic
8 --------
11 - compatible: "ti,omap5-dss"
12 - reg: address and length of the register space
13 - ti,hwmods: "dss_core"
14 - clocks: handle to fclk
15 - clock-names: "fck"
18 - DISPC
21 - DSS Submodules: RFBI, DSI, HDMI
22 - Video port for DPI output
[all …]
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| D | ti,omap4-dss.txt | 4 See Documentation/devicetree/bindings/display/ti/ti,omap-dss.txt for generic
8 --------
11 - compatible: "ti,omap4-dss"
12 - reg: address and length of the register space
13 - ti,hwmods: "dss_core"
14 - clocks: handle to fclk
15 - clock-names: "fck"
18 - DISPC
21 - DSS Submodules: RFBI, VENC, DSI, HDMI
22 - Video port for DPI output
[all …]
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| D | ti,omap3-dss.txt | 4 See Documentation/devicetree/bindings/display/ti/ti,omap-dss.txt for generic
8 --------
11 - compatible: "ti,omap3-dss"
12 - reg: address and length of the register space
13 - ti,hwmods: "dss_core"
14 - clocks: handle to fclk
15 - clock-names: "fck"
18 - Video ports:
19 - Port 0: DPI output
20 - Port 1: SDI output
[all …]
|
| /kernel/linux/linux-5.10/Documentation/x86/x86_64/ |
| D | fsgs.rst | 1 .. SPDX-License-Identifier: GPL-2.0
10 Segment-register:Byte-address
12 The segment base address is added to the Byte-address to compute the
14 instances of data with the identical Byte-address, i.e. the same code. The
15 selection of a particular instance is purely based on the base-address in
18 In 32-bit mode the CPU provides 6 segments, which also support segment
21 In 64-bit mode the CS/SS/DS/ES segments are ignored and the base address is
23 still functional in 64-bit mode.
26 ------------------------------
42 ------------------------------------------
[all …]
|
| /kernel/linux/linux-6.6/Documentation/arch/x86/x86_64/ |
| D | fsgs.rst | 1 .. SPDX-License-Identifier: GPL-2.0
10 Segment-register:Byte-address
12 The segment base address is added to the Byte-address to compute the
14 instances of data with the identical Byte-address, i.e. the same code. The
15 selection of a particular instance is purely based on the base-address in
18 In 32-bit mode the CPU provides 6 segments, which also support segment
21 In 64-bit mode the CS/SS/DS/ES segments are ignored and the base address is
23 still functional in 64-bit mode.
26 ------------------------------
42 ------------------------------------------
[all …]
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| /kernel/linux/linux-5.10/arch/mips/include/asm/sgi/ |
| D | ip22.h | 17 * 'spaces', the 'space' determines where and how to enable/disable
21 * HAL2 driver). This will prevent many complications, trust me ;-)
33 #define SGINT_END (SGINT_CPU+40) /* End of 'spaces' */
49 #define SGI_GIO_0_IRQ SGI_FIFO_IRQ /* GIO-0 */
55 #define SGI_GIO_1_IRQ SGINT_LOCAL0 + 6 /* GE / GIO-1 / 2nd-HPC */
65 #define SGI_GIO_2_IRQ SGINT_LOCAL1 + 7 /* Vert retrace / GIO-2 */
75 #define ip22_is_fullhouse() (sgioc->sysid & SGIOC_SYSID_FULLHOUSE)
77 extern unsigned short ip22_eeprom_read(unsigned int *ctrl, int reg);
78 extern unsigned short ip22_nvram_read(int reg);
|
| /kernel/linux/linux-6.6/arch/mips/include/asm/sgi/ |
| D | ip22.h | 17 * 'spaces', the 'space' determines where and how to enable/disable
21 * HAL2 driver). This will prevent many complications, trust me ;-)
33 #define SGINT_END (SGINT_CPU+40) /* End of 'spaces' */
49 #define SGI_GIO_0_IRQ SGI_FIFO_IRQ /* GIO-0 */
55 #define SGI_GIO_1_IRQ SGINT_LOCAL0 + 6 /* GE / GIO-1 / 2nd-HPC */
65 #define SGI_GIO_2_IRQ SGINT_LOCAL1 + 7 /* Vert retrace / GIO-2 */
75 #define ip22_is_fullhouse() (sgioc->sysid & SGIOC_SYSID_FULLHOUSE)
77 extern unsigned short ip22_eeprom_read(unsigned int *ctrl, int reg);
78 extern unsigned short ip22_nvram_read(int reg);
|
| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/pci/ |
| D | snps,dw-pcie-ep.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/pci/snps,dw-pcie-ep.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jingoo Han <jingoohan1@gmail.com>
11 - Gustavo Pimentel <gustavo.pimentel@synopsys.com>
16 # Please create a separate DT-schema for your DWC PCIe Endpoint controller
17 # and make sure it's assigned with the vendor-specific compatible string.
21 const: snps,dw-pcie-ep
23 - compatible
[all …]
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| D | host-generic-pci.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/host-generic-pci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Will Deacon <will@kernel.org>
13 Firmware-initialised PCI host controllers and PCI emulations, such as the
14 virtio-pci implementations found in kvmtool and other para-virtualised
19 Configuration Spaces.
21 Configuration Space is assumed to be memory-mapped (as opposed to being
26 For CAM, this 24-bit offset is:
[all …]
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/net/can/ |
| D | ti_hecc.txt | 8 - compatible: "ti,am3517-hecc"
9 - reg: addresses and lengths of the register spaces for 'hecc', 'hecc-ram'
11 - reg-names :"hecc", "hecc-ram", "mbx"
12 - interrupts: interrupt mapping for the hecc interrupts sources
13 - clocks: clock phandles (see clock bindings for details)
16 - ti,use-hecc1int: if provided configures HECC to produce all interrupts
19 - xceiver-supply: regulator that powers the CAN transceiver
25 compatible = "ti,am3517-hecc";
26 reg = <0x5c050000 0x80>,
29 reg-names = "hecc", "hecc-ram", "mbx";
|
| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/net/can/ |
| D | ti_hecc.txt | 8 - compatible: "ti,am3517-hecc"
9 - reg: addresses and lengths of the register spaces for 'hecc', 'hecc-ram'
11 - reg-names :"hecc", "hecc-ram", "mbx"
12 - interrupts: interrupt mapping for the hecc interrupts sources
13 - clocks: clock phandles (see clock bindings for details)
16 - ti,use-hecc1int: if provided configures HECC to produce all interrupts
19 - xceiver-supply: regulator that powers the CAN transceiver
25 compatible = "ti,am3517-hecc";
26 reg = <0x5c050000 0x80>,
29 reg-names = "hecc", "hecc-ram", "mbx";
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/clock/ |
| D | marvell,pxa168.txt | 8 - compatible: should be one of the following.
9 - "marvell,pxa168-clock" - controller compatible with PXA168 SoC.
11 - reg: physical base address of the clock subsystem and length of memory mapped
13 "mpmu", "apmu", "apbc". So three reg spaces need to be defined.
15 - #clock-cells: should be 1.
16 - #reset-cells: should be 1.
21 All these identifier could be found in <dt-bindings/clock/marvell,pxa168.h>.
|
| D | marvell,pxa910.txt | 8 - compatible: should be one of the following.
9 - "marvell,pxa910-clock" - controller compatible with PXA910 SoC.
11 - reg: physical base address of the clock subsystem and length of memory mapped
13 "mpmu", "apmu", "apbc", "apbcp". So four reg spaces need to be defined.
15 - #clock-cells: should be 1.
16 - #reset-cells: should be 1.
21 All these identifier could be found in <dt-bindings/clock/marvell-pxa910.h>.
|
| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/clock/ |
| D | marvell,pxa168.txt | 8 - compatible: should be one of the following.
9 - "marvell,pxa168-clock" - controller compatible with PXA168 SoC.
11 - reg: physical base address of the clock subsystem and length of memory mapped
13 "mpmu", "apmu", "apbc". So three reg spaces need to be defined.
15 - #clock-cells: should be 1.
16 - #reset-cells: should be 1.
21 All these identifier could be found in <dt-bindings/clock/marvell,pxa168.h>.
|
| D | marvell,pxa910.txt | 8 - compatible: should be one of the following.
9 - "marvell,pxa910-clock" - controller compatible with PXA910 SoC.
11 - reg: physical base address of the clock subsystem and length of memory mapped
13 "mpmu", "apmu", "apbc", "apbcp". So four reg spaces need to be defined.
15 - #clock-cells: should be 1.
16 - #reset-cells: should be 1.
21 All these identifier could be found in <dt-bindings/clock/marvell-pxa910.h>.
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/pci/ |
| D | host-generic-pci.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/host-generic-pci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Will Deacon <will@kernel.org>
13 Firmware-initialised PCI host controllers and PCI emulations, such as the
14 virtio-pci implementations found in kvmtool and other para-virtualised
19 Configuration Spaces.
21 Configuration Space is assumed to be memory-mapped (as opposed to being
26 For CAM, this 24-bit offset is:
[all …]
|
| /kernel/linux/linux-5.10/drivers/s390/char/ |
| D | sclp_rw.c | 1 // SPDX-License-Identifier: GPL-2.0
27 #define MAX_SCCB_ROOM (PAGE_SIZE - sizeof(struct sclp_buffer))
29 static void sclp_rw_pm_event(struct sclp_register *reg, in sclp_rw_pm_event() argument
58 buffer = ((struct sclp_buffer *) ((addr_t) sccb + PAGE_SIZE)) - 1; in sclp_make_buffer()
59 buffer->sccb = sccb; in sclp_make_buffer()
60 buffer->retry_count = 0; in sclp_make_buffer()
61 buffer->messages = 0; in sclp_make_buffer()
62 buffer->char_sum = 0; in sclp_make_buffer()
63 buffer->current_line = NULL; in sclp_make_buffer()
64 buffer->current_length = 0; in sclp_make_buffer()
[all …]
|
| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/remoteproc/ |
| D | ti,omap-remoteproc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/ti,omap-remoteproc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Suman Anna <s-anna@ti.com>
13 The OMAP family of SoCs usually have one or more slave processor sub-systems
14 that are used to offload some of the processor-intensive tasks, or to manage
17 The processor cores in the sub-system are usually behind an IOMMU, and may
18 contain additional sub-modules like Internal RAM and/or ROMs, L1 and/or L2
21 The OMAP SoCs usually have a DSP processor sub-system and/or an IPU processor
[all …]
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/remoteproc/ |
| D | ti,omap-remoteproc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/ti,omap-remoteproc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Suman Anna <s-anna@ti.com>
13 The OMAP family of SoCs usually have one or more slave processor sub-systems
14 that are used to offload some of the processor-intensive tasks, or to manage
17 The processor cores in the sub-system are usually behind an IOMMU, and may
18 contain additional sub-modules like Internal RAM and/or ROMs, L1 and/or L2
21 The OMAP SoCs usually have a DSP processor sub-system and/or an IPU processor
[all …]
|
| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/usb/ |
| D | da8xx-usb.txt | 3 For DA8xx/OMAP-L1x/AM17xx/AM18xx platforms.
7 - compatible : Should be set to "ti,da830-musb".
9 - reg: Offset and length of the USB controller register set.
11 - interrupts: The USB interrupt number.
13 - interrupt-names: Should be set to "mc".
15 - dr_mode: The USB operation mode. Should be one of "host", "peripheral" or "otg".
17 - phys: Phandle for the PHY device
19 - phy-names: Should be "usb-phy"
21 - dmas: specifies the dma channels
23 - dma-names: specifies the names of the channels. Use "rxN" for receive
[all …]
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