Searched +full:remote +full:- +full:bus (Results 1 – 25 of 1067) sorted by relevance
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| /kernel/linux/linux-5.10/Documentation/ABI/testing/ |
| D | sysfs-bus-rpmsg | 1 What: /sys/bus/rpmsg/devices/.../name 4 Contact: Ohad Ben-Cohen <ohad@wizery.com> 6 Every rpmsg device is a communication channel with a remote 13 What: /sys/bus/rpmsg/devices/.../src 16 Contact: Ohad Ben-Cohen <ohad@wizery.com> 18 Every rpmsg device is a communication channel with a remote 20 and remote ("destination") rpmsg address. When an entity 31 What: /sys/bus/rpmsg/devices/.../dst 34 Contact: Ohad Ben-Cohen <ohad@wizery.com> 36 Every rpmsg device is a communication channel with a remote [all …]
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| /kernel/linux/linux-6.6/Documentation/ABI/testing/ |
| D | sysfs-bus-rpmsg | 1 What: /sys/bus/rpmsg/devices/.../name 4 Contact: Ohad Ben-Cohen <ohad@wizery.com> 6 Every rpmsg device is a communication channel with a remote 13 What: /sys/bus/rpmsg/devices/.../src 16 Contact: Ohad Ben-Cohen <ohad@wizery.com> 18 Every rpmsg device is a communication channel with a remote 20 and remote ("destination") rpmsg address. When an entity 31 What: /sys/bus/rpmsg/devices/.../dst 34 Contact: Ohad Ben-Cohen <ohad@wizery.com> 36 Every rpmsg device is a communication channel with a remote [all …]
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| /kernel/linux/linux-6.6/Documentation/staging/ |
| D | rpmsg.rst | 2 Remote Processor Messaging (rpmsg) Framework 7 This document describes the rpmsg bus and how to write rpmsg drivers. 14 Modern SoCs typically employ heterogeneous remote processor devices in 17 flavor of real-time OS. 19 OMAP4, for example, has dual Cortex-A9, dual Cortex-M3 and a C64x+ DSP. 20 Typically, the dual cortex-A9 is running Linux in a SMP configuration, 24 Typically AMP remote processors employ dedicated DSP codecs and multimedia 25 hardware accelerators, and therefore are often used to offload CPU-intensive 28 These remote processors could also be used to control latency-sensitive 32 Users of those remote processors can either be userland apps (e.g. multimedia [all …]
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| /kernel/linux/linux-5.10/Documentation/staging/ |
| D | rpmsg.rst | 2 Remote Processor Messaging (rpmsg) Framework 7 This document describes the rpmsg bus and how to write rpmsg drivers. 14 Modern SoCs typically employ heterogeneous remote processor devices in 17 flavor of real-time OS. 19 OMAP4, for example, has dual Cortex-A9, dual Cortex-M3 and a C64x+ DSP. 20 Typically, the dual cortex-A9 is running Linux in a SMP configuration, 24 Typically AMP remote processors employ dedicated DSP codecs and multimedia 25 hardware accelerators, and therefore are often used to offload CPU-intensive 28 These remote processors could also be used to control latency-sensitive 32 Users of those remote processors can either be userland apps (e.g. multimedia [all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/media/i2c/ |
| D | maxim,max9286.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 4 --- 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Jacopo Mondi <jacopo+renesas@jmondi.org> 12 - Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> 13 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> 14 - Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> 18 Serial Links (GMSL) and outputs them on a CSI-2 D-PHY port using up to 4 data 24 serializer will output it on a local I2C bus. In the other direction all I2C 25 traffic received over GMSL by the MAX9286 is output on the local I2C bus. [all …]
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| D | imi,rdacm2x-gmsl.yaml | 1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause 4 --- 5 $id: http://devicetree.org/schemas/media/i2c/imi,rdacm2x-gmsl.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Jacopo Mondi <jacopo+renesas@jmondi.org> 12 - Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> 13 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> 14 - Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> 16 description: -| 17 The IMI D&D RDACM20 and RDACM21 are GMSL-compatible camera designed for [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/media/i2c/ |
| D | imi,rdacm2x-gmsl.yaml | 1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause 4 --- 5 $id: http://devicetree.org/schemas/media/i2c/imi,rdacm2x-gmsl.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Jacopo Mondi <jacopo+renesas@jmondi.org> 12 - Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> 13 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> 14 - Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> 16 description: -| 17 The IMI D&D RDACM20 and RDACM21 are GMSL-compatible camera designed for [all …]
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| D | maxim,max9286.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 4 --- 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Jacopo Mondi <jacopo+renesas@jmondi.org> 12 - Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> 13 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> 14 - Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> 18 Serial Links (GMSL) and outputs them on a CSI-2 D-PHY port using up to 4 data 24 serializer will output it on a local I2C bus. In the other direction all I2C 25 traffic received over GMSL by the MAX9286 is output on the local I2C bus. [all …]
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| D | ov5640.txt | 1 * Omnivision OV5640 MIPI CSI-2 / parallel sensor 4 - compatible: should be "ovti,ov5640" 5 - clocks: reference to the xclk input clock. 6 - clock-names: should be "xclk". 7 - DOVDD-supply: Digital I/O voltage supply, 1.8 volts 8 - AVDD-supply: Analog voltage supply, 2.8 volts 9 - DVDD-supply: Digital core voltage supply, 1.5 volts 12 - reset-gpios: reference to the GPIO connected to the reset pin, if any. 14 - powerdown-gpios: reference to the GPIO connected to the powerdown pin, 16 - rotation: as defined in [all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/i2c/ |
| D | i2c-atr.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/i2c/i2c-atr.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Tomi Valkeinen <tomi.valkeinen@ideasonboard.com> 16 with a modified slave address. The address used on the parent bus is 18 slave address of the child bus. Address translation is done by the 22 i2c-alias-pool: 23 $ref: /schemas/types.yaml#/definitions/uint32-array 25 I2C alias pool is a pool of I2C addresses on the main I2C bus that can be [all …]
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| D | i2c-demux-pinctrl.txt | 1 Pinctrl-based I2C Bus DeMux 3 This binding describes an I2C bus demultiplexer that uses pin multiplexing to 10 +-------------------------------+ 12 | | +-----+ +-----+ 13 | +------------+ | | dev | | dev | 14 | |I2C IP Core1|--\ | +-----+ +-----+ 15 | +------------+ \-------+ | | | 16 | |Pinctrl|--|------+--------+ 17 | +------------+ +-------+ | 18 | |I2C IP Core2|--/ | [all …]
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| D | google,cros-ec-i2c-tunnel.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 5 $id: http://devicetree.org/schemas/i2c/google,cros-ec-i2c-tunnel.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 8 title: I2C bus that tunnels through the ChromeOS EC (cros-ec) 11 - Doug Anderson <dianders@chromium.org> 12 - Benson Leung <bleung@chromium.org> 20 The node for this device should be under a cros-ec node like 21 google,cros-ec-spi or google,cros-ec-i2c. 24 - $ref: /schemas/i2c/i2c-controller.yaml# [all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/bus/ |
| D | fsl,imx8qxp-pixel-link-msi-bus.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/bus/fsl,imx8qxp-pixel-link-msi-bus.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Freescale i.MX8qxp Pixel Link Medium Speed Interconnect (MSI) Bus 10 - Liu Ying <victor.liu@nxp.com> 13 i.MX8qxp pixel link MSI bus is used to control settings of PHYs, I/Os 14 sitting together with the PHYs. It is not the same as the MSI bus coming 18 i.MX8qxp pixel link MSI bus is a simple memory-mapped bus. Two input clocks, 20 connected to the bus can be accessed. Also, the bus is part of a power [all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/display/ |
| D | mipi-dsi-bus.txt | 4 The MIPI Display Serial Interface specifies a serial bus and a protocol for 6 define the syntax used to represent a DSI bus in a device tree. 8 This document describes DSI bus-specific properties only or defines existing 9 standard properties in the context of the DSI bus. 11 Each DSI host provides a DSI bus. The DSI host controller's node contains a 12 set of properties that characterize the bus. Child nodes describe individual 13 peripherals on that bus. 21 In addition to the standard properties and those defined by the parent bus of 25 - #address-cells: The number of cells required to represent an address on the 26 bus. DSI peripherals are addressed using a 2-bit virtual channel number, so [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/display/ |
| D | mipi-dsi-bus.txt | 4 The MIPI Display Serial Interface specifies a serial bus and a protocol for 6 define the syntax used to represent a DSI bus in a device tree. 8 This document describes DSI bus-specific properties only or defines existing 9 standard properties in the context of the DSI bus. 11 Each DSI host provides a DSI bus. The DSI host controller's node contains a 12 set of properties that characterize the bus. Child nodes describe individual 13 peripherals on that bus. 21 In addition to the standard properties and those defined by the parent bus of 25 - #address-cells: The number of cells required to represent an address on the 26 bus. DSI peripherals are addressed using a 2-bit virtual channel number, so [all …]
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| /kernel/linux/linux-6.6/include/media/ |
| D | v4l2-fwnode.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 8 * Copyright (C) 2012 - 2013 Samsung Electronics Co., Ltd. 22 #include <media/v4l2-mediabus.h> 25 * struct v4l2_fwnode_endpoint - the endpoint data structure 27 * @bus_type: bus type 28 * @bus: bus configuration data structure 29 * @bus.parallel: embedded &struct v4l2_mbus_config_parallel. 30 * Used if the bus is parallel. 31 * @bus.mipi_csi1: embedded &struct v4l2_mbus_config_mipi_csi1. 32 * Used if the bus is MIPI Alliance's Camera Serial [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/media/ |
| D | ti,da850-vpif.txt | 2 ---------------------- 12 - compatible: must be "ti,da850-vpif" 13 - reg: physical base address and length of the registers set for the device; 14 - interrupts: should contain IRQ line for the VPIF 18 VPIF has a 16-bit parallel bus input, supporting 2 8-bit channels or a 19 single 16-bit channel. It should contain one or two port child nodes 23 Documentation/devicetree/bindings/media/video-interfaces.txt. 25 Example using 2 8-bit input channels, one of which is connected to an 26 I2C-connected TVP5147 decoder: 29 compatible = "ti,da850-vpif"; [all …]
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| D | allwinner,sun6i-a31-csi.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/media/allwinner,sun6i-a31-csi.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chen-Yu Tsai <wens@csie.org> 11 - Maxime Ripard <mripard@kernel.org> 16 - allwinner,sun6i-a31-csi 17 - allwinner,sun8i-a83t-csi 18 - allwinner,sun8i-h3-csi 19 - allwinner,sun8i-v3s-csi [all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/media/ |
| D | ti,da850-vpif.txt | 2 ---------------------- 12 - compatible: must be "ti,da850-vpif" 13 - reg: physical base address and length of the registers set for the device; 14 - interrupts: should contain IRQ line for the VPIF 18 VPIF has a 16-bit parallel bus input, supporting 2 8-bit channels or a 19 single 16-bit channel. It should contain one or two port child nodes 23 Documentation/devicetree/bindings/media/video-interfaces.txt. 25 Example using 2 8-bit input channels, one of which is connected to an 26 I2C-connected TVP5147 decoder: 29 compatible = "ti,da850-vpif"; [all …]
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| D | microchip,csi2dc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Eugen Hristev <eugen.hristev@microchip.com> 13 CSI2DC - Camera Serial Interface 2 Demux Controller 16 IDI interface or from a parallel bus interface. 30 32-bit IDI interface or a parallel interface. 44 const: microchip,sama7g5-csi2dc 53 clock-names: 63 - const: pclk [all …]
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| /kernel/linux/linux-6.6/arch/arm/boot/dts/hisilicon/ |
| D | hip04.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 5 * Copyright (C) 2013-2014 HiSilicon Ltd. 6 * Copyright (C) 2013-2014 Linaro Ltd. 12 /* memory bus is 64-bit */ 13 #address-cells = <2>; 14 #size-cells = <2>; 21 compatible = "hisilicon,hip04-bootwrapper"; 22 boot-method = <0x10c00000 0x10000>, <0xe0000100 0x1000>; 26 #address-cells = <1>; 27 #size-cells = <0>; [all …]
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | hip04.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 5 * Copyright (C) 2013-2014 Hisilicon Ltd. 6 * Copyright (C) 2013-2014 Linaro Ltd. 12 /* memory bus is 64-bit */ 13 #address-cells = <2>; 14 #size-cells = <2>; 21 compatible = "hisilicon,hip04-bootwrapper"; 22 boot-method = <0x10c00000 0x10000>, <0xe0000100 0x1000>; 26 #address-cells = <1>; 27 #size-cells = <0>; [all …]
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| /kernel/linux/linux-5.10/drivers/rpmsg/ |
| D | rpmsg_core.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * remote processor messaging bus 8 * Ohad Ben-Cohen <ohad@wizery.com> 24 * rpmsg_create_ept() - create a new rpmsg_endpoint 31 * inbound messages arrive, they are dispatched by the rpmsg bus using the 40 * is already created for them when they are probed by the rpmsg bus 41 * (using the rx callback provided when they registered to the rpmsg bus). 54 * to the same remote processor their channel belongs to), an rx callback 70 return rpdev->ops->create_ept(rpdev, cb, priv, chinfo); in rpmsg_create_ept() 75 * rpmsg_destroy_ept() - destroy an existing rpmsg endpoint [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/i2c/ |
| D | i2c-demux-pinctrl.txt | 1 Pinctrl-based I2C Bus DeMux 3 This binding describes an I2C bus demultiplexer that uses pin multiplexing to 10 +-------------------------------+ 12 | | +-----+ +-----+ 13 | +------------+ | | dev | | dev | 14 | |I2C IP Core1|--\ | +-----+ +-----+ 15 | +------------+ \-------+ | | | 16 | |Pinctrl|--|------+--------+ 17 | +------------+ +-------+ | 18 | |I2C IP Core2|--/ | [all …]
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| D | google,cros-ec-i2c-tunnel.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 5 $id: http://devicetree.org/schemas/i2c/google,cros-ec-i2c-tunnel.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 8 title: I2C bus that tunnels through the ChromeOS EC (cros-ec) 11 - Doug Anderson <dianders@chromium.org> 12 - Benson Leung <bleung@chromium.org> 13 - Enric Balletbo i Serra <enric.balletbo@collabora.com> 21 The node for this device should be under a cros-ec node like 22 google,cros-ec-spi or google,cros-ec-i2c. [all …]
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