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/kernel/linux/linux-6.6/drivers/gpu/drm/ci/
Dgitlab-ci.yml2 DRM_CI_PROJECT_PATH: &drm-ci-project-path mesa/mesa
3 DRM_CI_COMMIT_SHA: &drm-ci-commit-sha edfbf74df1d4d6ce54ffe24566108be0e1a98c3d
6 TARGET_BRANCH: drm-next
10 DEQP_RUNNER_GIT_URL: https://gitlab.freedesktop.org/anholt/deqp-runner.git
13 FDO_UPSTREAM_REPO: helen.fornazier/linux # The repo where the git-archive daily runs
14 MESA_TEMPLATES_COMMIT: &ci-templates-commit d5aa3941aa03c2f716595116354fb81eb8012acb
16 CI_PRE_CLONE_SCRIPT: |-
17 set -o xtrace
18 …-L --retry 4 -f --retry-all-errors --retry-delay 60 -s ${DRM_CI_PROJECT_URL}/-/raw/${DRM_CI_COMMIT…
19 bash download-git-cache.sh
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/kernel/linux/linux-5.10/drivers/gpu/drm/scheduler/
Dsched_main.c16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
27 * The GPU scheduler provides entities which allow userspace to push jobs
28 * into software queues which are then scheduled on a hardware run queue.
31 * features among jobs. The driver is supposed to provide callback functions for
32 * backend operations to the scheduler like submitting a job to hardware run queue,
41 * 4. Entities themselves maintain a queue of jobs that will be scheduled on
42 * the hardware.
44 * The jobs in a entity are always scheduled in the order that they were pushed.
66 * drm_sched_rq_init - initialize a given run queue struct
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/kernel/linux/linux-5.10/Documentation/accounting/
Dpsi.rst4 PSI - Pressure Stall Information
14 either play it safe and under-utilize their hardware resources, or
23 scarcity aids users in sizing workloads to hardware--or provisioning
24 hardware according to workload demand.
27 dynamically using techniques such as load shedding, migrating jobs to
29 priority or restartable batch jobs.
31 This allows maximizing hardware utilization without sacrificing
37 Pressure information for each resource is exported through the
38 respective file in /proc/pressure/ -- cpu, memory, and io.
40 The format for CPU is as such::
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/kernel/linux/linux-6.6/Documentation/accounting/
Dpsi.rst4 PSI - Pressure Stall Information
14 either play it safe and under-utilize their hardware resources, or
23 scarcity aids users in sizing workloads to hardware--or provisioning
24 hardware according to workload demand.
27 dynamically using techniques such as load shedding, migrating jobs to
29 priority or restartable batch jobs.
31 This allows maximizing hardware utilization without sacrificing
37 Pressure information for each resource is exported through the
38 respective file in /proc/pressure/ -- cpu, memory, and io.
48 The "full" line indicates the share of time in which all non-idle
[all …]
/kernel/linux/linux-6.6/drivers/gpu/drm/scheduler/
Dsched_main.c16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
27 * The GPU scheduler provides entities which allow userspace to push jobs
28 * into software queues which are then scheduled on a hardware run queue.
31 * features among jobs. The driver is supposed to provide callback functions for
32 * backend operations to the scheduler like submitting a job to hardware run queue,
41 * 4. Entities themselves maintain a queue of jobs that will be scheduled on
42 * the hardware.
44 * The jobs in a entity are always scheduled in the order that they were pushed.
47 * hardware, i.e. the pending queue, the entity must not be referenced anymore
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/v3d/
Dv3d_sched.c1 // SPDX-License-Identifier: GPL-2.0+
7 * The shared DRM GPU scheduler is used to coordinate submitting jobs
8 * to the hardware. Each DRM fd (roughly a client process) gets its
9 * own scheduler entity, which will process jobs in order. The GPU
10 * scheduler will round-robin between clients to submit the next job.
12 * For simplicity, and in order to keep latency low for interactive
13 * jobs when bulk background jobs are queued up, we submit a new job
15 * filling up the CT[01]Q FIFOs with jobs. Similarly, we use
17 * render, instead of having the clients submit jobs using the HW's
78 /* XXX: Wait on a fence for switching the GMP if necessary, in v3d_job_dependency()
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/kernel/linux/linux-6.6/drivers/gpu/drm/v3d/
Dv3d_sched.c1 // SPDX-License-Identifier: GPL-2.0+
7 * The shared DRM GPU scheduler is used to coordinate submitting jobs
8 * to the hardware. Each DRM fd (roughly a client process) gets its
9 * own scheduler entity, which will process jobs in order. The GPU
10 * scheduler will round-robin between clients to submit the next job.
12 * For simplicity, and in order to keep latency low for interactive
13 * jobs when bulk background jobs are queued up, we submit a new job
15 * filling up the CT[01]Q FIFOs with jobs. Similarly, we use
17 * render, instead of having the clients submit jobs using the HW's
68 if (job->perfmon != v3d->active_perfmon) in v3d_switch_perfmon()
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/kernel/linux/linux-6.6/Documentation/admin-guide/cgroup-v1/
Dcpusets.rst11 - Portions Copyright (c) 2004-2006 Silicon Graphics, Inc.
12 - Modified by Paul Jackson <pj@sgi.com>
13 - Modified by Christoph Lameter <cl@linux.com>
14 - Modified by Paul Menage <menage@google.com>
15 - Modified by Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
41 ----------------------
43 Cpusets provide a mechanism for assigning a set of CPUs and Memory
45 an on-line node that contains memory.
50 hooks, beyond what is already present, required to manage dynamic
54 Documentation/admin-guide/cgroup-v1/cgroups.rst.
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/kernel/linux/linux-5.10/Documentation/admin-guide/cgroup-v1/
Dcpusets.rst11 - Portions Copyright (c) 2004-2006 Silicon Graphics, Inc.
12 - Modified by Paul Jackson <pj@sgi.com>
13 - Modified by Christoph Lameter <cl@linux.com>
14 - Modified by Paul Menage <menage@google.com>
15 - Modified by Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
41 ----------------------
43 Cpusets provide a mechanism for assigning a set of CPUs and Memory
45 an on-line node that contains memory.
50 hooks, beyond what is already present, required to manage dynamic
54 Documentation/admin-guide/cgroup-v1/cgroups.rst.
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/kernel/linux/linux-6.6/Documentation/gpu/rfc/
Di915_vm_bind.rst11 issued by the UMD, without user having to provide a list of all required
12 mappings during each submission (as required by older execbuf mode).
14 The VM_BIND/UNBIND calls allow UMDs to request a timeline out fence for
18 User has to opt-in for VM_BIND mode of binding for an address space (VM)
31 * Support for userptr gem objects (no special uapi is required for this).
34 ------------------------
35 The i915 driver flushes the TLB for each submission and when an object's
37 TLB flush. Any VM_BIND mapping added will be in the working set for subsequent
38 submissions on that VM and will not be in the working set for currently running
42 -------------------------------
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/kernel/linux/linux-6.6/Documentation/driver-api/
Ddma-buf.rst1 Buffer Sharing and Synchronization (dma-buf)
4 The dma-buf subsystem provides the framework for sharing buffers for
5 hardware (DMA) access across multiple device drivers and subsystems, and
6 for synchronizing asynchronous hardware access.
8 This is used, for example, by drm "prime" multi-GPU support, but is of
11 The three main components of this are: (1) dma-buf, representing a
18 ------------------
20 This document serves as a guide to device-driver writers on what is the dma-buf
21 buffer sharing API, how to use it for exporting and using shared buffers.
27 exporter, and A as buffer-user/importer.
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/kernel/linux/linux-6.6/drivers/crypto/caam/
Djr.c1 // SPDX-License-Identifier: GPL-2.0+
6 * Copyright 2008-2012 Freescale Semiconductor, Inc.
42 jrpriv->hwrng = !caam_rng_init(dev); in register_algs()
54 if (--active_devs != 0) in unregister_algs()
72 /* Free the resources of crypto-engine */ in caam_jr_crypto_engine_exit()
73 crypto_engine_exit(jrpriv->engine); in caam_jr_crypto_engine_exit()
87 if (rd_reg32(&jrp->rregs->jrintstatus) & JRINT_ERR_HALT_INPROGRESS) in caam_jr_stop_processing()
91 clrsetbits_32(&jrp->rregs->jrintstatus, JRINT_ERR_HALT_MASK, 0); in caam_jr_stop_processing()
93 /* initiate flush / park (required prior to reset) */ in caam_jr_stop_processing()
94 wr_reg32(&jrp->rregs->jrcommand, jrcr_bits); in caam_jr_stop_processing()
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/kernel/linux/linux-6.6/drivers/media/platform/st/sti/hva/
Dhva.h1 /* SPDX-License-Identifier: GPL-2.0 */
11 #include <media/v4l2-ctrls.h>
12 #include <media/v4l2-device.h>
13 #include <media/videobuf2-v4l2.h>
14 #include <media/v4l2-mem2mem.h>
18 #define hva_to_dev(h) (h->dev)
20 #define ctx_to_dev(c) (c->hva_dev->dev)
22 #define ctx_to_hdev(c) (c->hva_dev)
24 #define HVA_NAME "st-hva"
25 #define HVA_PREFIX "[---:----]"
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/kernel/linux/linux-5.10/drivers/media/platform/sti/hva/
Dhva.h1 /* SPDX-License-Identifier: GPL-2.0 */
11 #include <media/v4l2-ctrls.h>
12 #include <media/v4l2-device.h>
13 #include <media/videobuf2-v4l2.h>
14 #include <media/v4l2-mem2mem.h>
18 #define hva_to_dev(h) (h->dev)
20 #define ctx_to_dev(c) (c->hva_dev->dev)
22 #define ctx_to_hdev(c) (c->hva_dev)
24 #define HVA_NAME "st-hva"
25 #define HVA_PREFIX "[---:----]"
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/kernel/linux/linux-5.10/Documentation/gpu/
Dtegra.rst8 or blocks amongst themselves, can use syncpoints for synchronization.
11 supports the built-in GPU, comprised of the gr2d and gr3d engines. Starting
18 - A host1x driver that provides infrastructure and access to the host1x
21 - A KMS driver that supports the display controllers as well as a number of
24 - A set of custom userspace IOCTLs that can be used to submit jobs to the
35 tree for matching device nodes, adding the required clients to a list. Drivers
36 for individual clients register with the infrastructure as well and are added
40 device using a driver-provided function which will set up the bits specific to
48 -------------------------------
50 .. kernel-doc:: include/linux/host1x.h
[all …]
Ddrm-uapi.rst9 addition, drivers export device-specific interfaces for use by userspace
10 drivers & device-aware applications through ioctls and sysfs files.
16 Cover generic ioctls and sysfs layout here. We only need high-level
22 .. kernel-doc:: drivers/gpu/drm/drm_ioctl.c
31 .. kernel-doc:: drivers/gpu/drm/drm_auth.c
34 .. kernel-doc:: drivers/gpu/drm/drm_auth.c
37 .. kernel-doc:: include/drm/drm_auth.h
40 Open-Source Userspace Requirements
44 what the userspace side for new uAPI needs to look like. This section here
48 open-sourced userspace patches, and those patches must be reviewed and ready for
[all …]
/kernel/linux/linux-6.6/Documentation/gpu/
Dtegra.rst8 or blocks amongst themselves, can use syncpoints for synchronization.
11 supports the built-in GPU, comprised of the gr2d and gr3d engines. Starting
18 - A host1x driver that provides infrastructure and access to the host1x
21 - A KMS driver that supports the display controllers as well as a number of
24 - A set of custom userspace IOCTLs that can be used to submit jobs to the
35 tree for matching device nodes, adding the required clients to a list. Drivers
36 for individual clients register with the infrastructure as well and are added
40 device using a driver-provided function which will set up the bits specific to
48 -------------------------------
50 .. kernel-doc:: include/linux/host1x.h
[all …]
Ddrm-uapi.rst9 addition, drivers export device-specific interfaces for use by userspace
10 drivers & device-aware applications through ioctls and sysfs files.
16 Cover generic ioctls and sysfs layout here. We only need high-level
22 .. kernel-doc:: drivers/gpu/drm/drm_ioctl.c
31 .. kernel-doc:: drivers/gpu/drm/drm_auth.c
34 .. kernel-doc:: drivers/gpu/drm/drm_auth.c
37 .. kernel-doc:: include/drm/drm_auth.h
46 .. kernel-doc:: drivers/gpu/drm/drm_lease.c
49 Open-Source Userspace Requirements
53 what the userspace side for new uAPI needs to look like. This section here
[all …]
/kernel/linux/linux-5.10/drivers/media/platform/
Drcar_fdp1.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Renesas R-Car Fine Display Processor
11 * m2m-deinterlace, and vsp1 drivers.
16 #include <linux/dma-mapping.h>
27 #include <media/rcar-fcp.h>
28 #include <media/v4l2-ctrls.h>
29 #include <media/v4l2-device.h>
30 #include <media/v4l2-event.h>
31 #include <media/v4l2-ioctl.h>
32 #include <media/v4l2-mem2mem.h>
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/kernel/linux/linux-6.6/drivers/media/platform/renesas/
Drcar_fdp1.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Renesas R-Car Fine Display Processor
11 * m2m-deinterlace, and vsp1 drivers.
16 #include <linux/dma-mapping.h>
26 #include <media/rcar-fcp.h>
27 #include <media/v4l2-ctrls.h>
28 #include <media/v4l2-device.h>
29 #include <media/v4l2-event.h>
30 #include <media/v4l2-ioctl.h>
31 #include <media/v4l2-mem2mem.h>
[all …]
/kernel/linux/linux-6.6/include/uapi/drm/
Dhabanalabs_accel.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note
3 * Copyright 2016-2022 HabanaLabs, Ltd.
15 * Defines that are asic-specific but constitutes as ABI between kernel driver
22 * 128 SOBs reserved for collective wait
23 * 16 SOBs reserved for sync stream
28 * 64 monitors reserved for collective wait
29 * 8 monitors reserved for sync stream
190 * 2. F/W mode, where we use F/W to schedule the JOBS to the different queues.
196 * stream id is a running number from 0 up to (N-1), where N is the number
657 * enum hl_goya_dma_direction - Direction of DMA operation inside a LIN_DMA packet that is
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdgpu/
Damdgpu_device.c18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
123 * The amdgpu driver provides a sysfs API for reporting the total number
125 * The file pcie_replay_count is used for this and returns the total
147 * The amdgpu driver provides a sysfs API for reporting the product name
148 * for the device
149 * The file serial_number is used for this and returns the product name
151 * NOTE: This is only available for certain server cards
160 return snprintf(buf, PAGE_SIZE, "%s\n", adev->product_name); in amdgpu_device_get_product_name()
169 * The amdgpu driver provides a sysfs API for reporting the part number
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/kernel/linux/linux-5.10/include/drm/
Ddrm_modeset_helper_vtables.h3 * Copyright © 2007-2008 Dave Airlie
4 * Copyright © 2007-2008 Intel Corporation
6 * Copyright © 2011-2013 Intel Corporation
22 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
23 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
38 * The DRM mode setting helper functions are common code for drivers to use if
45 * for helper libraries they are by necessity shared among the different
56 * struct drm_crtc_helper_funcs - helper operations for CRTCs
74 * also support using this hook for enabling and disabling a CRTC to
83 * This callback should prepare the CRTC for a subsequent modeset, which
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/kernel/linux/linux-5.10/drivers/dma/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
21 This is an option for use by developers; most people should
28 This is an option for use by developers; most people should
65 Enable support for Altera / Intel mSGDMA controller.
86 Enable support for the AMCC PPC440SPe RAID engines.
103 tristate "Analog Devices AXI-DMAC DMA support"
109 Enable support for the Analog Devices AXI-DMAC peripheral. This DMA
110 controller is often used in Analog Devices' reference designs for FPGA
123 Enable support for Broadcom SBA RAID Engine. The SBA RAID
126 for raid5/6.
[all …]
/kernel/linux/linux-6.6/drivers/dma/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
21 This is an option for use by developers; most people should
28 This is an option for use by developers; most people should
65 Enable support for Altera / Intel mSGDMA controller.
86 Enable support for the AMCC PPC440SPe RAID engines.
94 Enable support for Audio DMA Controller found on Apple Silicon SoCs.
112 tristate "Analog Devices AXI-DMAC DMA support"
118 Enable support for the Analog Devices AXI-DMAC peripheral. This DMA
119 controller is often used in Analog Devices' reference designs for FPGA
132 Enable support for Broadcom SBA RAID Engine. The SBA RAID
[all …]

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