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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/net/
Dmdio.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andrew Lunn <andrew@lunn.ch>
11 - Florian Fainelli <f.fainelli@gmail.com>
12 - Heiner Kallweit <hkallweit1@gmail.com>
17 bus. These should follow the generic ethernet-phy.yaml document, or
24 "#address-cells":
27 "#size-cells":
30 reset-gpios:
[all …]
Dethernet-phy.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/net/ethernet-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andrew Lunn <andrew@lunn.ch>
11 - Florian Fainelli <f.fainelli@gmail.com>
12 - Heiner Kallweit <hkallweit1@gmail.com>
14 # The dt-schema tools will generate a select statement first by using
21 pattern: "^ethernet-phy(@[a-f0-9]+)?$"
24 - $nodename
[all …]
Dhisilicon-femac.txt4 - compatible: should contain one of the following version strings:
5 * "hisilicon,hisi-femac-v1"
6 * "hisilicon,hisi-femac-v2"
7 and the soc string "hisilicon,hi3516cv300-femac".
8 - reg: specifies base physical address(s) and size of the device registers.
11 - interrupts: should contain the MAC interrupt.
12 - clocks: A phandle to the MAC main clock.
13 - resets: should contain the phandle to the MAC reset signal(required) and
14 the PHY reset signal(optional).
15 - reset-names: should contain the reset signal name "mac"(required)
[all …]
Dhisilicon-hix5hd2-gmac.txt4 - compatible: should contain one of the following SoC strings:
5 * "hisilicon,hix5hd2-gmac"
6 * "hisilicon,hi3798cv200-gmac"
7 * "hisilicon,hi3516a-gmac"
9 * "hisilicon,hisi-gmac-v1"
10 * "hisilicon,hisi-gmac-v2"
13 - reg: specifies base physical address(s) and size of the device registers.
16 - interrupts: should contain the MAC interrupt.
17 - #address-cells: must be <1>.
18 - #size-cells: must be <0>.
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/net/
Dmdio.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andrew Lunn <andrew@lunn.ch>
11 - Florian Fainelli <f.fainelli@gmail.com>
12 - Heiner Kallweit <hkallweit1@gmail.com>
17 bus. These should follow the generic ethernet-phy.yaml document, or
24 "#address-cells":
27 "#size-cells":
30 reset-gpios:
[all …]
Dethernet-phy.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/net/ethernet-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andrew Lunn <andrew@lunn.ch>
11 - Florian Fainelli <f.fainelli@gmail.com>
12 - Heiner Kallweit <hkallweit1@gmail.com>
14 # The dt-schema tools will generate a select statement first by using
21 pattern: "^ethernet-phy(@[a-f0-9]+)?$"
24 - $nodename
[all …]
Dhisilicon-femac.txt4 - compatible: should contain one of the following version strings:
5 * "hisilicon,hisi-femac-v1"
6 * "hisilicon,hisi-femac-v2"
7 and the soc string "hisilicon,hi3516cv300-femac".
8 - reg: specifies base physical address(s) and size of the device registers.
11 - interrupts: should contain the MAC interrupt.
12 - clocks: A phandle to the MAC main clock.
13 - resets: should contain the phandle to the MAC reset signal(required) and
14 the PHY reset signal(optional).
15 - reset-names: should contain the reset signal name "mac"(required)
[all …]
Dhisilicon-hix5hd2-gmac.txt4 - compatible: should contain one of the following SoC strings:
5 * "hisilicon,hix5hd2-gmac"
6 * "hisilicon,hi3798cv200-gmac"
7 * "hisilicon,hi3516a-gmac"
9 * "hisilicon,hisi-gmac-v1"
10 * "hisilicon,hisi-gmac-v2"
13 - reg: specifies base physical address(s) and size of the device registers.
16 - interrupts: should contain the MAC interrupt.
17 - #address-cells: must be <1>.
18 - #size-cells: must be <0>.
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/mmc/
Dmmc-pwrseq-simple.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mmc/mmc-pwrseq-simple.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ulf Hansson <ulf.hansson@linaro.org>
14 of common properties between various SOC designs. It thus enables us to use
19 const: mmc-pwrseq-simple
21 reset-gpios:
26 contains a list of GPIO specifiers. The reset GPIOs are asserted
28 They will be de-asserted right after the power has been provided to the
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/mmc/
Dmmc-pwrseq-simple.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mmc/mmc-pwrseq-simple.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ulf Hansson <ulf.hansson@linaro.org>
14 of common properties between various SOC designs. It thus enables us to use
19 const: mmc-pwrseq-simple
21 reset-gpios:
26 contains a list of GPIO specifiers. The reset GPIOs are asserted
28 They will be de-asserted right after the power has been provided to the
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/nxp/imx/
Dimx6qp-prtwd3.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
7 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
16 stdout-path = &uart4;
29 clock_ksz8081: clock-ksz8081 {
30 compatible = "fixed-clock";
31 #clock-cells = <0>;
32 clock-frequency = <50000000>;
35 clock_ksz9031: clock-ksz9031 {
36 compatible = "fixed-clock";
[all …]
Dimx6dl-victgo.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
7 /dts-v1/;
9 #include "imx6qdl-vicut1.dtsi"
15 gpio-keys {
16 compatible = "gpio-keys";
17 pinctrl-names = "default";
18 pinctrl-0 = <&pinctrl_gpiokeys>;
21 key-power {
25 wakeup-source;
28 key-enter {
[all …]
Dimx6dl-plym2m.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
7 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/leds/common.h>
17 stdout-path = &uart4;
21 compatible = "pwm-backlight";
23 brightness-levels = <0 1000>;
24 num-interpolated-steps = <20>;
25 default-brightness-level = <19>;
26 power-supply = <&reg_12v0>;
[all …]
/kernel/linux/linux-6.6/drivers/mmc/host/
Dsdhci-bcm-kona.c1 // SPDX-License-Identifier: GPL-2.0-only
6 #include <linux/delay.h>
14 #include <linux/mmc/slot-gpio.h>
16 #include "sdhci-pltfm.h"
52 /* This timeout should be sufficent for core to reset */ in sdhci_bcm_kona_sd_reset()
55 /* reset the host using the top level reset */ in sdhci_bcm_kona_sd_reset()
62 pr_err("Error: sd host is stuck in reset!!!\n"); in sdhci_bcm_kona_sd_reset()
63 return -EFAULT; in sdhci_bcm_kona_sd_reset()
67 /* bring the host out of reset */ in sdhci_bcm_kona_sd_reset()
72 * Back-to-Back register write needs a delay of 1ms at bootup (min 10uS) in sdhci_bcm_kona_sd_reset()
[all …]
/kernel/linux/linux-5.10/drivers/mmc/host/
Dsdhci-bcm-kona.c16 #include <linux/delay.h>
25 #include <linux/mmc/slot-gpio.h>
27 #include "sdhci-pltfm.h"
63 /* This timeout should be sufficent for core to reset */ in sdhci_bcm_kona_sd_reset()
66 /* reset the host using the top level reset */ in sdhci_bcm_kona_sd_reset()
73 pr_err("Error: sd host is stuck in reset!!!\n"); in sdhci_bcm_kona_sd_reset()
74 return -EFAULT; in sdhci_bcm_kona_sd_reset()
78 /* bring the host out of reset */ in sdhci_bcm_kona_sd_reset()
83 * Back-to-Back register write needs a delay of 1ms at bootup (min 10uS) in sdhci_bcm_kona_sd_reset()
84 * Back-to-Back writes to same register needs delay when SD bus clock in sdhci_bcm_kona_sd_reset()
[all …]
/kernel/linux/linux-6.6/Documentation/admin-guide/blockdev/
Dparide.rst5 PARIDE v1.03 (c) 1997-8 Grant Guenther <grant@torque.net>
12 to personal computers, many external devices such as portable hard-disk,
13 CD-ROM, LS-120 and tape drives use the parallel port to connect to their
14 host computer. While some devices (notably scanners) use ad-hoc methods
17 a parallel-port adapter chip added in. Some of the original parallel port
19 (The Iomega PPA-3 adapter used in the ZIP drives is an example of this
27 which is then connected to a floppy-tape mechanism. The vast majority
30 were to open up a parallel port CD-ROM drive, for instance, one would
31 find a standard ATAPI CD-ROM drive, a power supply, and a single adapter
33 IDE cable. It is usually possible to exchange the CD-ROM device with
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/input/
Dsyna,rmi4.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jason A. Donenfeld <Jason@zx2c4.com>
11 - Matthias Schiffer <matthias.schiffer@ew.tq-group.com
12 - Vincent Huang <vincent.huang@tw.synaptics.com>
22 - syna,rmi4-i2c
23 - syna,rmi4-spi
28 '#address-cells':
31 '#size-cells':
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/st/
Dstm32mp151a-prtt1c.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
6 /dts-v1/;
8 #include "stm32mp151a-prtt1l.dtsi"
14 clock_ksz9031: clock-ksz9031 {
15 compatible = "fixed-clock";
16 #clock-cells = <0>;
17 clock-frequency = <25000000>;
20 clock_sja1105: clock-sja1105 {
21 compatible = "fixed-clock";
22 #clock-cells = <0>;
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dexynos4412-galaxy-s3.dtsi1 // SPDX-License-Identifier: GPL-2.0
9 /dts-v1/;
10 #include "exynos4412-midas.dtsi"
20 flen-gpios = <&gpj1 1 GPIO_ACTIVE_HIGH>;
21 enset-gpios = <&gpj1 2 GPIO_ACTIVE_HIGH>;
23 pinctrl-names = "default", "host", "isp";
24 pinctrl-0 = <&camera_flash_host>;
25 pinctrl-1 = <&camera_flash_host>;
26 pinctrl-2 = <&camera_flash_isp>;
28 flash-led {
[all …]
/kernel/linux/linux-6.6/drivers/fpga/
Dice40-spi.c1 // SPDX-License-Identifier: GPL-2.0-only
11 #include <linux/fpga/fpga-mgr.h>
21 #define ICE40_SPI_RESET_DELAY 1 /* us (>200ns) */
22 #define ICE40_SPI_HOUSEKEEPING_DELAY 1200 /* us */
28 struct gpio_desc *reset; member
34 struct ice40_fpga_priv *priv = mgr->priv; in ice40_fpga_ops_state()
36 return gpiod_get_value(priv->cdone) ? FPGA_MGR_STATE_OPERATING : in ice40_fpga_ops_state()
44 struct ice40_fpga_priv *priv = mgr->priv; in ice40_fpga_ops_write_init()
45 struct spi_device *dev = priv->dev; in ice40_fpga_ops_write_init()
49 .delay = { in ice40_fpga_ops_write_init()
[all …]
/kernel/linux/linux-5.10/drivers/fpga/
Dice40-spi.c1 // SPDX-License-Identifier: GPL-2.0-only
11 #include <linux/fpga/fpga-mgr.h>
21 #define ICE40_SPI_RESET_DELAY 1 /* us (>200ns) */
22 #define ICE40_SPI_HOUSEKEEPING_DELAY 1200 /* us */
28 struct gpio_desc *reset; member
34 struct ice40_fpga_priv *priv = mgr->priv; in ice40_fpga_ops_state()
36 return gpiod_get_value(priv->cdone) ? FPGA_MGR_STATE_OPERATING : in ice40_fpga_ops_state()
44 struct ice40_fpga_priv *priv = mgr->priv; in ice40_fpga_ops_write_init()
45 struct spi_device *dev = priv->dev; in ice40_fpga_ops_write_init()
49 .delay = { in ice40_fpga_ops_write_init()
[all …]
/kernel/linux/linux-5.10/drivers/clk/qcom/
Dclk-pll.c1 // SPDX-License-Identifier: GPL-2.0-only
10 #include <linux/delay.h>
12 #include <linux/clk-provider.h>
17 #include "clk-pll.h"
31 ret = regmap_read(pll->clkr.regmap, pll->mode_reg, &val); in clk_pll_enable()
40 ret = regmap_update_bits(pll->clkr.regmap, pll->mode_reg, PLL_BYPASSNL, in clk_pll_enable()
46 * H/W requires a 5us delay between disabling the bypass and in clk_pll_enable()
47 * de-asserting the reset. Delay 10us just to be safe. in clk_pll_enable()
51 /* De-assert active-low PLL reset. */ in clk_pll_enable()
52 ret = regmap_update_bits(pll->clkr.regmap, pll->mode_reg, PLL_RESET_N, in clk_pll_enable()
[all …]
/kernel/linux/linux-6.6/drivers/clk/qcom/
Dclk-pll.c1 // SPDX-License-Identifier: GPL-2.0-only
10 #include <linux/delay.h>
12 #include <linux/clk-provider.h>
17 #include "clk-pll.h"
31 ret = regmap_read(pll->clkr.regmap, pll->mode_reg, &val); in clk_pll_enable()
40 ret = regmap_update_bits(pll->clkr.regmap, pll->mode_reg, PLL_BYPASSNL, in clk_pll_enable()
46 * H/W requires a 5us delay between disabling the bypass and in clk_pll_enable()
47 * de-asserting the reset. Delay 10us just to be safe. in clk_pll_enable()
51 /* De-assert active-low PLL reset. */ in clk_pll_enable()
52 ret = regmap_update_bits(pll->clkr.regmap, pll->mode_reg, PLL_RESET_N, in clk_pll_enable()
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/samsung/
Dexynos4412-galaxy-s3.dtsi1 // SPDX-License-Identifier: GPL-2.0
9 /dts-v1/;
10 #include <dt-bindings/leds/common.h>
11 #include "exynos4412-midas.dtsi"
19 led-controller {
21 flen-gpios = <&gpj1 1 GPIO_ACTIVE_HIGH>;
22 enset-gpios = <&gpj1 2 GPIO_ACTIVE_HIGH>;
24 pinctrl-names = "default", "host", "isp";
25 pinctrl-0 = <&camera_flash_host>;
26 pinctrl-1 = <&camera_flash_host>;
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/rockchip/
Drk3328-nanopi-r2s.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright (c) 2020 David Bauer <mail@david-bauer.net>
6 /dts-v1/;
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/gpio/gpio.h>
14 compatible = "friendlyarm,nanopi-r2s", "rockchip,rk3328";
17 stdout-path = "serial2:1500000n8";
20 gmac_clk: gmac-clock {
21 compatible = "fixed-clock";
22 clock-frequency = <125000000>;
[all …]

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