| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/amdgpu/ |
| D | amdgpu_ring.c | 40 * Most engines on the GPU are fed via ring buffers. Ring
46 * pointers are equal, the ring is idle. When the host
47 * writes commands to the ring buffer, it increments the
55 * @type: ring type for which to return the limit.
73 * amdgpu_ring_alloc - allocate space on the ring buffer
75 * @ring: amdgpu_ring structure holding ring information
76 * @ndw: number of dwords to allocate in the ring buffer
78 * Allocate @ndw dwords in the ring buffer (all asics).
81 int amdgpu_ring_alloc(struct amdgpu_ring *ring, unsigned int ndw) in amdgpu_ring_alloc() argument
85 ndw = (ndw + ring->funcs->align_mask) & ~ring->funcs->align_mask; in amdgpu_ring_alloc()
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| D | jpeg_v1_0.c | 37 static void jpeg_v1_0_ring_begin_use(struct amdgpu_ring *ring);
42 static void jpeg_v1_0_decode_ring_patch_wreg(struct amdgpu_ring *ring, uint32_t *ptr, uint32_t reg_… in jpeg_v1_0_decode_ring_patch_wreg() argument
44 struct amdgpu_device *adev = ring->adev; in jpeg_v1_0_decode_ring_patch_wreg()
45 …ring->ring[(*ptr)++] = PACKETJ(SOC15_REG_OFFSET(JPEG, 0, mmUVD_JRBC_EXTERNAL_REG_BASE), 0, 0, PACK… in jpeg_v1_0_decode_ring_patch_wreg()
48 ring->ring[(*ptr)++] = 0; in jpeg_v1_0_decode_ring_patch_wreg()
49 ring->ring[(*ptr)++] = PACKETJ((reg_offset >> 2), 0, 0, PACKETJ_TYPE0); in jpeg_v1_0_decode_ring_patch_wreg()
51 ring->ring[(*ptr)++] = reg_offset; in jpeg_v1_0_decode_ring_patch_wreg()
52 ring->ring[(*ptr)++] = PACKETJ(0, 0, 0, PACKETJ_TYPE0); in jpeg_v1_0_decode_ring_patch_wreg()
54 ring->ring[(*ptr)++] = val; in jpeg_v1_0_decode_ring_patch_wreg()
57 static void jpeg_v1_0_decode_ring_set_patch_ring(struct amdgpu_ring *ring, uint32_t ptr) in jpeg_v1_0_decode_ring_set_patch_ring() argument
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| D | amdgpu_fence.c | 80 * @ring: ring the fence is associated with
85 static void amdgpu_fence_write(struct amdgpu_ring *ring, u32 seq) in amdgpu_fence_write() argument
87 struct amdgpu_fence_driver *drv = &ring->fence_drv; in amdgpu_fence_write()
96 * @ring: ring the fence is associated with
101 static u32 amdgpu_fence_read(struct amdgpu_ring *ring) in amdgpu_fence_read() argument
103 struct amdgpu_fence_driver *drv = &ring->fence_drv; in amdgpu_fence_read()
115 * amdgpu_fence_emit - emit a fence on the requested ring
117 * @ring: ring the fence is associated with
122 * Emits a fence command on the requested ring (all asics).
125 int amdgpu_fence_emit(struct amdgpu_ring *ring, struct dma_fence **f, struct amdgpu_job *job, in amdgpu_fence_emit() argument
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| /kernel/linux/linux-6.6/include/linux/soc/ti/ |
| D | k3-ringacc.h | 3 * K3 Ring Accelerator (RA) subsystem interface
18 * RA ring operational modes
20 * @K3_RINGACC_RING_MODE_RING: Exposed Ring mode for SW direct access
43 * RA ring element's sizes in bytes.
60 * enum k3_ring_cfg - RA ring configuration structure
62 * @size: Ring size, number of elements
63 * @elm_size: Ring element size
64 * @mode: Ring operational mode
65 * @flags: Ring configuration flags. Possible values:
66 * @K3_RINGACC_RING_SHARED: when set allows to request the same ring
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| /kernel/linux/linux-5.10/include/linux/soc/ti/ |
| D | k3-ringacc.h | 3 * K3 Ring Accelerator (RA) subsystem interface
18 * RA ring operational modes
20 * @K3_RINGACC_RING_MODE_RING: Exposed Ring mode for SW direct access
43 * RA ring element's sizes in bytes.
60 * enum k3_ring_cfg - RA ring configuration structure
62 * @size: Ring size, number of elements
63 * @elm_size: Ring element size
64 * @mode: Ring operational mode
65 * @flags: Ring configuration flags. Possible values:
66 * @K3_RINGACC_RING_SHARED: when set allows to request the same ring
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| /kernel/linux/linux-6.6/drivers/gpu/drm/radeon/ |
| D | radeon_ring.c | 37 * Most engines on the GPU are fed via ring buffers. Ring
43 * pointers are equal, the ring is idle. When the host
44 * writes commands to the ring buffer, it increments the
48 static void radeon_debugfs_ring_init(struct radeon_device *rdev, struct radeon_ring *ring);
51 * radeon_ring_supports_scratch_reg - check if the ring supports
55 * @ring: radeon_ring structure holding ring information
57 * Check if a specific ring supports writing to scratch registers (all asics).
58 * Returns true if the ring supports writing to scratch regs, false if not.
61 struct radeon_ring *ring) in radeon_ring_supports_scratch_reg() argument
63 switch (ring->idx) { in radeon_ring_supports_scratch_reg()
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| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdgpu/ |
| D | amdgpu_ring.c | 40 * Most engines on the GPU are fed via ring buffers. Ring
46 * pointers are equal, the ring is idle. When the host
47 * writes commands to the ring buffer, it increments the
53 * amdgpu_ring_alloc - allocate space on the ring buffer
56 * @ring: amdgpu_ring structure holding ring information
57 * @ndw: number of dwords to allocate in the ring buffer
59 * Allocate @ndw dwords in the ring buffer (all asics).
62 int amdgpu_ring_alloc(struct amdgpu_ring *ring, unsigned ndw) in amdgpu_ring_alloc() argument
66 ndw = (ndw + ring->funcs->align_mask) & ~ring->funcs->align_mask; in amdgpu_ring_alloc()
71 if (WARN_ON_ONCE(ndw > ring->max_dw)) in amdgpu_ring_alloc()
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| D | jpeg_v1_0.c | 36 static void jpeg_v1_0_ring_begin_use(struct amdgpu_ring *ring);
38 static void jpeg_v1_0_decode_ring_patch_wreg(struct amdgpu_ring *ring, uint32_t *ptr, uint32_t reg_… in jpeg_v1_0_decode_ring_patch_wreg() argument
40 struct amdgpu_device *adev = ring->adev; in jpeg_v1_0_decode_ring_patch_wreg()
41 …ring->ring[(*ptr)++] = PACKETJ(SOC15_REG_OFFSET(JPEG, 0, mmUVD_JRBC_EXTERNAL_REG_BASE), 0, 0, PACK… in jpeg_v1_0_decode_ring_patch_wreg()
44 ring->ring[(*ptr)++] = 0; in jpeg_v1_0_decode_ring_patch_wreg()
45 ring->ring[(*ptr)++] = PACKETJ((reg_offset >> 2), 0, 0, PACKETJ_TYPE0); in jpeg_v1_0_decode_ring_patch_wreg()
47 ring->ring[(*ptr)++] = reg_offset; in jpeg_v1_0_decode_ring_patch_wreg()
48 ring->ring[(*ptr)++] = PACKETJ(0, 0, 0, PACKETJ_TYPE0); in jpeg_v1_0_decode_ring_patch_wreg()
50 ring->ring[(*ptr)++] = val; in jpeg_v1_0_decode_ring_patch_wreg()
53 static void jpeg_v1_0_decode_ring_set_patch_ring(struct amdgpu_ring *ring, uint32_t ptr) in jpeg_v1_0_decode_ring_set_patch_ring() argument
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| D | amdgpu_fence.c | 49 * are no longer in use by the associated ring on the GPU and
57 struct amdgpu_ring *ring; member
94 * @ring: ring the fence is associated with
99 static void amdgpu_fence_write(struct amdgpu_ring *ring, u32 seq) in amdgpu_fence_write() argument
101 struct amdgpu_fence_driver *drv = &ring->fence_drv; in amdgpu_fence_write()
110 * @ring: ring the fence is associated with
115 static u32 amdgpu_fence_read(struct amdgpu_ring *ring) in amdgpu_fence_read() argument
117 struct amdgpu_fence_driver *drv = &ring->fence_drv; in amdgpu_fence_read()
129 * amdgpu_fence_emit - emit a fence on the requested ring
131 * @ring: ring the fence is associated with
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| /kernel/linux/linux-5.10/drivers/gpu/drm/radeon/ |
| D | radeon_ring.c | 38 * Most engines on the GPU are fed via ring buffers. Ring
44 * pointers are equal, the ring is idle. When the host
45 * writes commands to the ring buffer, it increments the
49 static int radeon_debugfs_ring_init(struct radeon_device *rdev, struct radeon_ring *ring);
52 * radeon_ring_supports_scratch_reg - check if the ring supports
56 * @ring: radeon_ring structure holding ring information
58 * Check if a specific ring supports writing to scratch registers (all asics).
59 * Returns true if the ring supports writing to scratch regs, false if not.
62 struct radeon_ring *ring) in radeon_ring_supports_scratch_reg() argument
64 switch (ring->idx) { in radeon_ring_supports_scratch_reg()
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| /kernel/linux/linux-6.6/drivers/soc/ti/ |
| D | k3-ringacc.c | 3 * TI K3 NAVSS Ring Accelerator subsystem driver
31 * @db: Ring Doorbell Register
33 * @occ: Ring Occupancy Register
34 * @indx: Ring Current Index Register
35 * @hwocc: Ring Hardware Occupancy Register
36 * @hwindx: Ring Hardware Current Index Register
57 * struct k3_ring_fifo_regs - The Ring Accelerator Queues Registers region
59 * @head_data: Ring Head Entry Data Registers
60 * @tail_data: Ring Tail Entry Data Registers
61 * @peek_head_data: Ring Peek Head Entry Data Regs
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| /kernel/linux/linux-6.6/drivers/bus/mhi/ep/ |
| D | ring.c | 10 size_t mhi_ep_ring_addr2offset(struct mhi_ep_ring *ring, u64 ptr) in mhi_ep_ring_addr2offset() argument
12 return (ptr - ring->rbase) / sizeof(struct mhi_ring_element); in mhi_ep_ring_addr2offset()
15 static u32 mhi_ep_ring_num_elems(struct mhi_ep_ring *ring) in mhi_ep_ring_num_elems() argument
19 memcpy_fromio(&rlen, (void __iomem *) &ring->ring_ctx->generic.rlen, sizeof(u64)); in mhi_ep_ring_num_elems()
24 void mhi_ep_ring_inc_index(struct mhi_ep_ring *ring) in mhi_ep_ring_inc_index() argument
26 ring->rd_offset = (ring->rd_offset + 1) % ring->ring_size; in mhi_ep_ring_inc_index()
29 static int __mhi_ep_cache_ring(struct mhi_ep_ring *ring, size_t end) in __mhi_ep_cache_ring() argument
31 struct mhi_ep_cntrl *mhi_cntrl = ring->mhi_cntrl; in __mhi_ep_cache_ring()
37 /* Don't proceed in the case of event ring. This happens during mhi_ep_ring_start(). */ in __mhi_ep_cache_ring()
38 if (ring->type == RING_TYPE_ER) in __mhi_ep_cache_ring()
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| /kernel/linux/linux-5.10/drivers/soc/ti/ |
| D | k3-ringacc.c | 3 * TI K3 NAVSS Ring Accelerator subsystem driver
29 * @db: Ring Doorbell Register
31 * @occ: Ring Occupancy Register
32 * @indx: Ring Current Index Register
33 * @hwocc: Ring Hardware Occupancy Register
34 * @hwindx: Ring Hardware Current Index Register
49 * struct k3_ring_fifo_regs - The Ring Accelerator Queues Registers region
51 * @head_data: Ring Head Entry Data Registers
52 * @tail_data: Ring Tail Entry Data Registers
53 * @peek_head_data: Ring Peek Head Entry Data Regs
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| /kernel/linux/linux-5.10/drivers/net/wireless/broadcom/b43legacy/ |
| D | dma.c | 32 struct b43legacy_dmadesc32 *op32_idx2desc(struct b43legacy_dmaring *ring, in op32_idx2desc() argument
38 *meta = &(ring->meta[slot]); in op32_idx2desc()
39 desc = ring->descbase; in op32_idx2desc()
45 static void op32_fill_descriptor(struct b43legacy_dmaring *ring, in op32_fill_descriptor() argument
50 struct b43legacy_dmadesc32 *descbase = ring->descbase; in op32_fill_descriptor()
57 B43legacy_WARN_ON(!(slot >= 0 && slot < ring->nr_slots)); in op32_fill_descriptor()
62 addr |= ring->dev->dma.translation; in op32_fill_descriptor()
63 ctl = (bufsize - ring->frameoffset) in op32_fill_descriptor()
65 if (slot == ring->nr_slots - 1) in op32_fill_descriptor()
80 static void op32_poke_tx(struct b43legacy_dmaring *ring, int slot) in op32_poke_tx() argument
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| /kernel/linux/linux-6.6/drivers/net/wireless/broadcom/b43legacy/ |
| D | dma.c | 32 struct b43legacy_dmadesc32 *op32_idx2desc(struct b43legacy_dmaring *ring, in op32_idx2desc() argument
38 *meta = &(ring->meta[slot]); in op32_idx2desc()
39 desc = ring->descbase; in op32_idx2desc()
45 static void op32_fill_descriptor(struct b43legacy_dmaring *ring, in op32_fill_descriptor() argument
50 struct b43legacy_dmadesc32 *descbase = ring->descbase; in op32_fill_descriptor()
57 B43legacy_WARN_ON(!(slot >= 0 && slot < ring->nr_slots)); in op32_fill_descriptor()
62 addr |= ring->dev->dma.translation; in op32_fill_descriptor()
63 ctl = (bufsize - ring->frameoffset) in op32_fill_descriptor()
65 if (slot == ring->nr_slots - 1) in op32_fill_descriptor()
80 static void op32_poke_tx(struct b43legacy_dmaring *ring, int slot) in op32_poke_tx() argument
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| /kernel/linux/linux-5.10/drivers/net/wireless/broadcom/b43/ |
| D | dma.c | 72 struct b43_dmadesc_generic *op32_idx2desc(struct b43_dmaring *ring, in op32_idx2desc() argument
78 *meta = &(ring->meta[slot]); in op32_idx2desc()
79 desc = ring->descbase; in op32_idx2desc()
85 static void op32_fill_descriptor(struct b43_dmaring *ring, in op32_fill_descriptor() argument
90 struct b43_dmadesc32 *descbase = ring->descbase; in op32_fill_descriptor()
97 B43_WARN_ON(!(slot >= 0 && slot < ring->nr_slots)); in op32_fill_descriptor()
99 addr = b43_dma_address(&ring->dev->dma, dmaaddr, B43_DMA_ADDR_LOW); in op32_fill_descriptor()
100 addrext = b43_dma_address(&ring->dev->dma, dmaaddr, B43_DMA_ADDR_EXT); in op32_fill_descriptor()
103 if (slot == ring->nr_slots - 1) in op32_fill_descriptor()
118 static void op32_poke_tx(struct b43_dmaring *ring, int slot) in op32_poke_tx() argument
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| /kernel/linux/linux-6.6/drivers/net/wireless/broadcom/b43/ |
| D | dma.c | 72 struct b43_dmadesc_generic *op32_idx2desc(struct b43_dmaring *ring, in op32_idx2desc() argument
78 *meta = &(ring->meta[slot]); in op32_idx2desc()
79 desc = ring->descbase; in op32_idx2desc()
85 static void op32_fill_descriptor(struct b43_dmaring *ring, in op32_fill_descriptor() argument
90 struct b43_dmadesc32 *descbase = ring->descbase; in op32_fill_descriptor()
97 B43_WARN_ON(!(slot >= 0 && slot < ring->nr_slots)); in op32_fill_descriptor()
99 addr = b43_dma_address(&ring->dev->dma, dmaaddr, B43_DMA_ADDR_LOW); in op32_fill_descriptor()
100 addrext = b43_dma_address(&ring->dev->dma, dmaaddr, B43_DMA_ADDR_EXT); in op32_fill_descriptor()
103 if (slot == ring->nr_slots - 1) in op32_fill_descriptor()
118 static void op32_poke_tx(struct b43_dmaring *ring, int slot) in op32_poke_tx() argument
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| /kernel/linux/linux-5.10/drivers/net/ethernet/apm/xgene/ |
| D | xgene_enet_ring2.c | 12 static void xgene_enet_ring_init(struct xgene_enet_desc_ring *ring) in xgene_enet_ring_init() argument
14 u32 *ring_cfg = ring->state; in xgene_enet_ring_init()
15 u64 addr = ring->dma; in xgene_enet_ring_init()
17 if (xgene_enet_ring_owner(ring->id) == RING_OWNER_CPU) { in xgene_enet_ring_init()
18 ring_cfg[0] |= SET_VAL(X2_INTLINE, ring->id & RING_BUFNUM_MASK); in xgene_enet_ring_init()
27 ring_cfg[3] |= SET_VAL(RINGSIZE, ring->cfgsize) in xgene_enet_ring_init()
34 static void xgene_enet_ring_set_type(struct xgene_enet_desc_ring *ring) in xgene_enet_ring_set_type() argument
36 u32 *ring_cfg = ring->state; in xgene_enet_ring_set_type()
40 is_bufpool = xgene_enet_is_bufpool(ring->id); in xgene_enet_ring_set_type()
47 static void xgene_enet_ring_set_recombbuf(struct xgene_enet_desc_ring *ring) in xgene_enet_ring_set_recombbuf() argument
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| /kernel/linux/linux-6.6/drivers/net/ethernet/apm/xgene/ |
| D | xgene_enet_ring2.c | 12 static void xgene_enet_ring_init(struct xgene_enet_desc_ring *ring) in xgene_enet_ring_init() argument
14 u32 *ring_cfg = ring->state; in xgene_enet_ring_init()
15 u64 addr = ring->dma; in xgene_enet_ring_init()
17 if (xgene_enet_ring_owner(ring->id) == RING_OWNER_CPU) { in xgene_enet_ring_init()
18 ring_cfg[0] |= SET_VAL(X2_INTLINE, ring->id & RING_BUFNUM_MASK); in xgene_enet_ring_init()
27 ring_cfg[3] |= SET_VAL(RINGSIZE, ring->cfgsize) in xgene_enet_ring_init()
34 static void xgene_enet_ring_set_type(struct xgene_enet_desc_ring *ring) in xgene_enet_ring_set_type() argument
36 u32 *ring_cfg = ring->state; in xgene_enet_ring_set_type()
40 is_bufpool = xgene_enet_is_bufpool(ring->id); in xgene_enet_ring_set_type()
47 static void xgene_enet_ring_set_recombbuf(struct xgene_enet_desc_ring *ring) in xgene_enet_ring_set_recombbuf() argument
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| /kernel/linux/linux-6.6/drivers/thunderbolt/ |
| D | nhi.c | 28 #define RING_TYPE(ring) ((ring)->is_tx ? "TX ring" : "RX ring") argument
53 static int ring_interrupt_index(const struct tb_ring *ring) in ring_interrupt_index() argument
55 int bit = ring->hop; in ring_interrupt_index()
56 if (!ring->is_tx) in ring_interrupt_index()
57 bit += ring->nhi->hop_count; in ring_interrupt_index()
61 static void nhi_mask_interrupt(struct tb_nhi *nhi, int mask, int ring) in nhi_mask_interrupt() argument
66 val = ioread32(nhi->iobase + REG_RING_INTERRUPT_BASE + ring); in nhi_mask_interrupt()
67 iowrite32(val & ~mask, nhi->iobase + REG_RING_INTERRUPT_BASE + ring); in nhi_mask_interrupt()
69 iowrite32(mask, nhi->iobase + REG_RING_INTERRUPT_MASK_CLEAR_BASE + ring); in nhi_mask_interrupt()
73 static void nhi_clear_interrupt(struct tb_nhi *nhi, int ring) in nhi_clear_interrupt() argument
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| /kernel/linux/linux-5.10/drivers/thunderbolt/ |
| D | nhi.c | 26 #define RING_TYPE(ring) ((ring)->is_tx ? "TX ring" : "RX ring") argument
39 static int ring_interrupt_index(const struct tb_ring *ring) in ring_interrupt_index() argument
41 int bit = ring->hop; in ring_interrupt_index()
42 if (!ring->is_tx) in ring_interrupt_index()
43 bit += ring->nhi->hop_count; in ring_interrupt_index()
48 * ring_interrupt_active() - activate/deactivate interrupts for a single ring
50 * ring->nhi->lock must be held.
52 static void ring_interrupt_active(struct tb_ring *ring, bool active) in ring_interrupt_active() argument
55 ring_interrupt_index(ring) / 32 * 4; in ring_interrupt_active()
56 int bit = ring_interrupt_index(ring) & 31; in ring_interrupt_active()
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| /kernel/linux/linux-5.10/drivers/crypto/qat/qat_common/ |
| D | adf_transport.c | 36 static int adf_reserve_ring(struct adf_etr_bank_data *bank, u32 ring) in adf_reserve_ring() argument
39 if (bank->ring_mask & (1 << ring)) { in adf_reserve_ring()
43 bank->ring_mask |= (1 << ring); in adf_reserve_ring()
48 static void adf_unreserve_ring(struct adf_etr_bank_data *bank, u32 ring) in adf_unreserve_ring() argument
51 bank->ring_mask &= ~(1 << ring); in adf_unreserve_ring()
55 static void adf_enable_ring_irq(struct adf_etr_bank_data *bank, u32 ring) in adf_enable_ring_irq() argument
58 bank->irq_mask |= (1 << ring); in adf_enable_ring_irq()
65 static void adf_disable_ring_irq(struct adf_etr_bank_data *bank, u32 ring) in adf_disable_ring_irq() argument
68 bank->irq_mask &= ~(1 << ring); in adf_disable_ring_irq()
73 int adf_send_message(struct adf_etr_ring_data *ring, u32 *msg) in adf_send_message() argument
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| /kernel/linux/linux-6.6/drivers/crypto/intel/qat/qat_common/ |
| D | adf_transport.c | 40 static int adf_reserve_ring(struct adf_etr_bank_data *bank, u32 ring) in adf_reserve_ring() argument
43 if (bank->ring_mask & (1 << ring)) { in adf_reserve_ring()
47 bank->ring_mask |= (1 << ring); in adf_reserve_ring()
52 static void adf_unreserve_ring(struct adf_etr_bank_data *bank, u32 ring) in adf_unreserve_ring() argument
55 bank->ring_mask &= ~(1 << ring); in adf_unreserve_ring()
59 static void adf_enable_ring_irq(struct adf_etr_bank_data *bank, u32 ring) in adf_enable_ring_irq() argument
64 bank->irq_mask |= (1 << ring); in adf_enable_ring_irq()
72 static void adf_disable_ring_irq(struct adf_etr_bank_data *bank, u32 ring) in adf_disable_ring_irq() argument
77 bank->irq_mask &= ~(1 << ring); in adf_disable_ring_irq()
83 bool adf_ring_nearly_full(struct adf_etr_ring_data *ring) in adf_ring_nearly_full() argument
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| /kernel/linux/linux-6.6/drivers/crypto/inside-secure/ |
| D | safexcel_ring.c | 21 /* Actual command descriptor ring */ in safexcel_init_ring_descriptors()
32 /* Command descriptor shadow ring for storing additional token data */ in safexcel_init_ring_descriptors()
78 struct safexcel_desc_ring *ring, in safexcel_ring_next_cwptr() argument
82 void *ptr = ring->write; in safexcel_ring_next_cwptr()
85 *atoken = ring->shwrite; in safexcel_ring_next_cwptr()
87 if ((ring->write == ring->read - ring->offset) || in safexcel_ring_next_cwptr()
88 (ring->read == ring->base && ring->write == ring->base_end)) in safexcel_ring_next_cwptr()
91 if (ring->write == ring->base_end) { in safexcel_ring_next_cwptr()
92 ring->write = ring->base; in safexcel_ring_next_cwptr()
93 ring->shwrite = ring->shbase; in safexcel_ring_next_cwptr()
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| /kernel/linux/linux-5.10/drivers/crypto/inside-secure/ |
| D | safexcel_ring.c | 21 /* Actual command descriptor ring */ in safexcel_init_ring_descriptors()
32 /* Command descriptor shadow ring for storing additional token data */ in safexcel_init_ring_descriptors()
78 struct safexcel_desc_ring *ring, in safexcel_ring_next_cwptr() argument
82 void *ptr = ring->write; in safexcel_ring_next_cwptr()
85 *atoken = ring->shwrite; in safexcel_ring_next_cwptr()
87 if ((ring->write == ring->read - ring->offset) || in safexcel_ring_next_cwptr()
88 (ring->read == ring->base && ring->write == ring->base_end)) in safexcel_ring_next_cwptr()
91 if (ring->write == ring->base_end) { in safexcel_ring_next_cwptr()
92 ring->write = ring->base; in safexcel_ring_next_cwptr()
93 ring->shwrite = ring->shbase; in safexcel_ring_next_cwptr()
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