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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/usb/
Dmediatek,mtu3.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Chunfeng Yun <chunfeng.yun@mediatek.com>
14 - $ref: usb-drd.yaml
23 - enum:
24 - mediatek,mt2712-mtu3
25 - mediatek,mt8173-mtu3
26 - mediatek,mt8183-mtu3
27 - mediatek,mt8186-mtu3
[all …]
Dusb-drd.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/usb/usb-drd.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Greg Kroah-Hartman <gregkh@linuxfoundation.org>
13 otg-rev:
16 which the device and its descriptors are compliant, in binary-coded
18 features (HNP/SRP/ADP) is enabled. If ADP is required, otg-rev should be
25 Tells Dual-Role USB controllers that we want to work on a particular
26 mode. In case this attribute isn't passed via DT, USB DRD controllers
[all …]
Ddwc2.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rob Herring <robh@kernel.org>
13 - $ref: usb-drd.yaml#
14 - $ref: usb-hcd.yaml#
19 - const: brcm,bcm2835-usb
20 - const: hisilicon,hi6220-usb
21 - const: ingenic,jz4775-otg
22 - const: ingenic,jz4780-otg
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/kernel/linux/linux-6.6/drivers/usb/cdns3/
DKconfig8 dual-role controller.
9 It supports: dual-role switch, Host-only, and Peripheral-only.
17 tristate "Cadence USB3 Dual-Role Controller"
20 Say Y here if your system has a Cadence USB3 dual-role controller.
21 It supports: dual-role switch, Host-only, and Peripheral-only.
34 Cadence USBSS-DEV driver.
36 This controller supports FF, HS and SS mode. It doesn't support
37 LS and SSP mode.
51 tristate "Cadence USB3 support on PCIe-based platforms"
53 default USB_CDNS3
[all …]
Dcore.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2018-2019 Cadence.
6 * Copyright (C) 2017-2018 NXP
14 #include <linux/dma-mapping.h>
24 #include "host-export.h"
29 static int cdns_role_start(struct cdns *cdns, enum usb_role role) in cdns_role_start() argument
33 if (WARN_ON(role > USB_ROLE_DEVICE)) in cdns_role_start()
36 mutex_lock(&cdns->mutex); in cdns_role_start()
37 cdns->role = role; in cdns_role_start()
38 mutex_unlock(&cdns->mutex); in cdns_role_start()
[all …]
Dcore.h1 /* SPDX-License-Identifier: GPL-2.0 */
5 * Copyright (C) 2017-2018 NXP
6 * Copyright (C) 2018-2019 Cadence.
15 #include <linux/usb/role.h>
20 * struct cdns_role_driver - host/gadget role driver
21 * @start: start this role
22 * @stop: stop this role
23 * @suspend: suspend callback for this role
24 * @resume: resume callback for this role
25 * @irq: irq handler for this role
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/usb/
Dgeneric.txt4 - maximum-speed: tells USB controllers we want to work up to a certain
5 speed. Valid arguments are "super-speed-plus",
6 "super-speed", "high-speed", "full-speed" and
7 "low-speed". In case this isn't passed via DT, USB
8 controllers should default to their maximum HW
10 - dr_mode: tells Dual-Role USB controllers that we want to work on a
11 particular mode. Valid arguments are "host",
13 passed via DT, USB DRD controllers should default to
15 - phy_type: tells USB controllers that we want to configure the core to support
16 a UTMI+ PHY with an 8- or 16-bit interface if UTMI+ is
[all …]
Dmediatek,mtu3.txt4 - compatible : should be "mediatek,<soc-model>-mtu3", "mediatek,mtu3",
5 soc-model is the name of SoC, such as mt8173, mt2712 etc,
8 - "mediatek,mt8173-mtu3"
9 - reg : specifies physical base address and size of the registers
10 - reg-names: should be "mac" for device IP and "ippc" for IP port control
11 - interrupts : interrupt used by the device IP
12 - power-domains : a phandle to USB power domain node to control USB's
14 - vusb33-supply : regulator of USB avdd3.3v
15 - clocks : a list of phandle + clock-specifier pairs, one for each
16 entry in clock-names
[all …]
/kernel/linux/linux-6.6/drivers/usb/mtu3/
Dmtu3_dr.c1 // SPDX-License-Identifier: GPL-2.0
3 * mtu3_dr.c - dual role switch and host glue layer
24 mtu3_setbits(ssusb->mac_base, U3D_DEVICE_CONTROL, DC_SESSION); in toggle_opstate()
25 mtu3_setbits(ssusb->mac_base, U3D_POWER_MANAGEMENT, SOFT_CONN); in toggle_opstate()
28 /* only port0 supports dual-role mode */
32 void __iomem *ibase = ssusb->ippc_base; in ssusb_port0_switch()
35 dev_dbg(ssusb->dev, "%s (switch u%d port0 to %s)\n", __func__, in ssusb_port0_switch()
44 /* 2. power on, enable u2 port0 and select its mode */ in ssusb_port0_switch()
56 /* 2. power on, enable u3 port0 and select its mode */ in ssusb_port0_switch()
71 dev_dbg(ssusb->dev, "%s\n", __func__); in switch_port_to_host()
[all …]
Dmtu3.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * mtu3.h - MediaTek USB3 DRD header
26 #include <linux/usb/role.h>
35 #define MU3D_EP_TXCR0(epnum) (U3D_TX1CSR0 + (((epnum) - 1) * 0x10))
36 #define MU3D_EP_TXCR1(epnum) (U3D_TX1CSR1 + (((epnum) - 1) * 0x10))
37 #define MU3D_EP_TXCR2(epnum) (U3D_TX1CSR2 + (((epnum) - 1) * 0x10))
39 #define MU3D_EP_RXCR0(epnum) (U3D_RX1CSR0 + (((epnum) - 1) * 0x10))
40 #define MU3D_EP_RXCR1(epnum) (U3D_RX1CSR1 + (((epnum) - 1) * 0x10))
41 #define MU3D_EP_RXCR2(epnum) (U3D_RX1CSR2 + (((epnum) - 1) * 0x10))
43 #define USB_QMU_TQHIAR(epnum) (U3D_TXQHIAR1 + (((epnum) - 1) * 0x4))
[all …]
/kernel/linux/linux-5.10/drivers/usb/mtu3/
Dmtu3_dr.c1 // SPDX-License-Identifier: GPL-2.0
3 * mtu3_dr.c - dual role switch and host glue layer
10 #include <linux/usb/role.h>
28 switch (state) { in mailbox_state_string()
37 default: in mailbox_state_string()
44 mtu3_setbits(ssusb->mac_base, U3D_DEVICE_CONTROL, DC_SESSION); in toggle_opstate()
45 mtu3_setbits(ssusb->mac_base, U3D_POWER_MANAGEMENT, SOFT_CONN); in toggle_opstate()
48 /* only port0 supports dual-role mode */
52 void __iomem *ibase = ssusb->ippc_base; in ssusb_port0_switch()
55 dev_dbg(ssusb->dev, "%s (switch u%d port0 to %s)\n", __func__, in ssusb_port0_switch()
[all …]
/kernel/linux/linux-5.10/drivers/usb/dwc3/
Ddrd.c1 // SPDX-License-Identifier: GPL-2.0
3 * drd.c - DesignWare USB3 DRD Controller Dual-role support
5 * Copyright (C) 2017 Texas Instruments Incorporated - https://www.ti.com
21 u32 reg = dwc3_readl(dwc->regs, DWC3_OEVTEN); in dwc3_otg_disable_events()
24 dwc3_writel(dwc->regs, DWC3_OEVTEN, reg); in dwc3_otg_disable_events()
29 u32 reg = dwc3_readl(dwc->regs, DWC3_OEVTEN); in dwc3_otg_enable_events()
32 dwc3_writel(dwc->regs, DWC3_OEVTEN, reg); in dwc3_otg_enable_events()
37 u32 reg = dwc3_readl(dwc->regs, DWC3_OEVT); in dwc3_otg_clear_events()
39 dwc3_writel(dwc->regs, DWC3_OEVTEN, reg); in dwc3_otg_clear_events()
56 spin_lock(&dwc->lock); in dwc3_otg_thread_irq()
[all …]
/kernel/linux/linux-6.6/drivers/usb/dwc3/
Ddrd.c1 // SPDX-License-Identifier: GPL-2.0
3 * drd.c - DesignWare USB3 DRD Controller Dual-role support
5 * Copyright (C) 2017 Texas Instruments Incorporated - https://www.ti.com
21 u32 reg = dwc3_readl(dwc->regs, DWC3_OEVTEN); in dwc3_otg_disable_events()
24 dwc3_writel(dwc->regs, DWC3_OEVTEN, reg); in dwc3_otg_disable_events()
29 u32 reg = dwc3_readl(dwc->regs, DWC3_OEVTEN); in dwc3_otg_enable_events()
32 dwc3_writel(dwc->regs, DWC3_OEVTEN, reg); in dwc3_otg_enable_events()
37 u32 reg = dwc3_readl(dwc->regs, DWC3_OEVT); in dwc3_otg_clear_events()
39 dwc3_writel(dwc->regs, DWC3_OEVTEN, reg); in dwc3_otg_clear_events()
56 spin_lock(&dwc->lock); in dwc3_otg_thread_irq()
[all …]
/kernel/linux/linux-5.10/drivers/usb/cdns3/
Dcore.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2018-2019 Cadence.
6 * Copyright (C) 2017-2018 NXP
14 #include <linux/dma-mapping.h>
24 #include "host-export.h"
25 #include "gadget-export.h"
30 static int cdns3_role_start(struct cdns3 *cdns, enum usb_role role) in cdns3_role_start() argument
34 if (WARN_ON(role > USB_ROLE_DEVICE)) in cdns3_role_start()
37 mutex_lock(&cdns->mutex); in cdns3_role_start()
38 cdns->role = role; in cdns3_role_start()
[all …]
DKconfig2 tristate "Cadence USB3 Dual-Role Controller"
7 Say Y here if your system has a Cadence USB3 dual-role controller.
8 It supports: dual-role switch, Host-only, and Peripheral-only.
20 Cadence USBSS-DEV driver.
22 This controller supports FF, HS and SS mode. It doesn't support
23 LS and SSP mode.
36 tristate "Cadence USB3 support on PCIe-based platforms"
38 default USB_CDNS3
44 be dynamically linked and module will be called cdns3-pci.ko
49 default USB_CDNS3
[all …]
/kernel/linux/linux-6.6/drivers/usb/dwc2/
Ddrd.c1 // SPDX-License-Identifier: GPL-2.0
3 * drd.c - DesignWare USB2 DRD Controller Dual-role support
13 #include <linux/usb/role.h>
25 spin_lock_irqsave(&hsotg->lock, flags); in dwc2_ovr_init()
30 if (hsotg->role_sw_default_mode == USB_DR_MODE_HOST) in dwc2_ovr_init()
32 else if (hsotg->role_sw_default_mode == USB_DR_MODE_PERIPHERAL) in dwc2_ovr_init()
36 spin_unlock_irqrestore(&hsotg->lock, flags); in dwc2_ovr_init()
38 dwc2_force_mode(hsotg, (hsotg->dr_mode == USB_DR_MODE_HOST) || in dwc2_ovr_init()
39 (hsotg->role_sw_default_mode == USB_DR_MODE_HOST)); in dwc2_ovr_init()
46 /* Check if A-Session is already in the right state */ in dwc2_ovr_avalid()
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/net/dsa/
Dsja1105.txt1 NXP SJA1105 switch driver
6 - compatible:
8 - "nxp,sja1105e"
9 - "nxp,sja1105t"
10 - "nxp,sja1105p"
11 - "nxp,sja1105q"
12 - "nxp,sja1105r"
13 - "nxp,sja1105s"
18 and the non-SGMII devices, while pin-compatible, are not equal in terms
24 - sja1105,role-mac:
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/kernel/linux/linux-5.10/Documentation/driver-api/usb/
Dtypec.rst3 USB Type-C connector class
7 ------------
9 The typec class is meant for describing the USB Type-C ports in a system to the
14 The platforms are expected to register every USB Type-C port they have with the
15 class. In a normal case the registration will be done by a USB Type-C or PD PHY
18 considers the component registering the USB Type-C ports with the class as "port
26 attributes are described in Documentation/ABI/testing/sysfs-class-typec.
29 --------------------
36 "port0-partner". Full path to the device would be
37 /sys/class/typec/port0/port0-partner/.
[all …]
/kernel/linux/linux-6.6/Documentation/driver-api/usb/
Dtypec.rst3 USB Type-C connector class
7 ------------
9 The typec class is meant for describing the USB Type-C ports in a system to the
14 The platforms are expected to register every USB Type-C port they have with the
15 class. In a normal case the registration will be done by a USB Type-C or PD PHY
18 considers the component registering the USB Type-C ports with the class as "port
26 attributes are described in Documentation/ABI/testing/sysfs-class-typec.
29 --------------------
36 "port0-partner". Full path to the device would be
37 /sys/class/typec/port0/port0-partner/.
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/phy/
Dnvidia,tegra194-xusb-padctl.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/nvidia,tegra194-xusb-padctl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
21 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or
22 super-speed USB. Other lanes are for various types of low-speed, full-speed
23 or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller
24 contains a software-configurable mux that sits between the I/O controller
[all …]
/kernel/linux/linux-6.6/drivers/usb/musb/
Dmediatek.c1 // SPDX-License-Identifier: GPL-2.0
11 #include <linux/dma-mapping.h>
16 #include <linux/usb/role.h>
51 enum usb_role role; member
57 struct device *dev = glue->dev; in mtk_musb_clks_get()
59 glue->clks[0].id = "main"; in mtk_musb_clks_get()
60 glue->clks[1].id = "mcu"; in mtk_musb_clks_get()
61 glue->clks[2].id = "univpll"; in mtk_musb_clks_get()
63 return devm_clk_bulk_get(dev, MTK_MUSB_CLKS_NUM, glue->clks); in mtk_musb_clks_get()
66 static int mtk_otg_switch_set(struct mtk_glue *glue, enum usb_role role) in mtk_otg_switch_set() argument
[all …]
/kernel/linux/linux-6.6/drivers/usb/fotg210/
Dfotg210-core.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Central probing code for the FOTG210 dual role driver
21 /* Role Register 0x80 */
23 #define FOTG210_RR_ID BIT(21) /* 1 = B-device, 0 = A-device */
27 * Gemini-specific initialization function, only executed on the
30 * The gemini USB blocks are connected to either Mini-A (host mode) or
31 * Mini-B (peripheral mode) plugs. There is no role switch support on the
32 * Gemini SoC, just either-or.
43 enum usb_dr_mode mode) in fotg210_gemini_init() argument
45 struct device *dev = fotg->dev; in fotg210_gemini_init()
[all …]
/kernel/linux/linux-5.10/drivers/usb/musb/
Dmediatek.c1 // SPDX-License-Identifier: GPL-2.0
11 #include <linux/dma-mapping.h>
15 #include <linux/usb/role.h>
50 enum usb_role role; member
56 struct device *dev = glue->dev; in mtk_musb_clks_get()
58 glue->main = devm_clk_get(dev, "main"); in mtk_musb_clks_get()
59 if (IS_ERR(glue->main)) { in mtk_musb_clks_get()
61 return PTR_ERR(glue->main); in mtk_musb_clks_get()
64 glue->mcu = devm_clk_get(dev, "mcu"); in mtk_musb_clks_get()
65 if (IS_ERR(glue->mcu)) { in mtk_musb_clks_get()
[all …]
/kernel/linux/linux-5.10/drivers/usb/typec/
Dtps6598x.c1 // SPDX-License-Identifier: GPL-2.0
15 #include <linux/usb/role.h>
113 return -EINVAL; in tps6598x_block_read()
115 if (!tps->i2c_protocol) in tps6598x_block_read()
116 return regmap_raw_read(tps->regmap, reg, val, len); in tps6598x_block_read()
118 ret = regmap_raw_read(tps->regmap, reg, data, sizeof(data)); in tps6598x_block_read()
123 return -EIO; in tps6598x_block_read()
134 if (!tps->i2c_protocol) in tps6598x_block_write()
135 return regmap_raw_write(tps->regmap, reg, val, len); in tps6598x_block_write()
140 return regmap_raw_write(tps->regmap, reg, data, sizeof(data)); in tps6598x_block_write()
[all …]
/kernel/linux/linux-6.6/drivers/usb/phy/
DKconfig1 # SPDX-License-Identifier: GPL-2.0
21 in host mode, low speed.
42 depends on USB_GADGET || !USB_GADGET # if USB_GADGET=m, NOP can't be built-in
46 built-in with usb ip or which are autonomous and doesn't require any
73 The definition of internal PHY APIs are in the mach-omap2 layer.
76 tristate "GPIO based peripheral-only VBUS sensing 'transceiver'"
86 NOT support role switch. OTG devices that can do role switch
95 controller is needed to switch between host and peripheral modes.
98 will be called phy-omap-otg.
111 bool "Device in USB host mode by default"
[all …]

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