| /kernel/linux/linux-6.6/drivers/gpu/drm/omapdrm/ |
| D | tcm-sita.c | 1 // SPDX-License-Identifier: GPL-2.0-only 9 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/ 26 * stride slots in a row 29 unsigned long *map, u16 stride) in free_slots() argument 33 for (i = 0; i < h; i++, pos += stride) in free_slots() 50 *pos = num_bits - w; in r2l_b2t_1d() 55 if (bit - *pos >= w) { in r2l_b2t_1d() 62 search_count = num_bits - bit + w; in r2l_b2t_1d() 63 *pos = bit - w; in r2l_b2t_1d() 66 return (area_found) ? 0 : -ENOMEM; in r2l_b2t_1d() [all …]
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| D | omap_gem.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/ 7 #include <linux/dma-mapping.h> 23 /* note: we use upper 8 bits of flags for driver-internal flags: */ 47 * - buffers allocated through the DMA mapping API (with the 50 * - buffers imported from dmabuf (with the OMAP_BO_MEM_DMABUF flag set) 51 * if they are physically contiguous (when sgt->orig_nents == 1) 53 * - buffers mapped through the TILER when pin_cnt is not zero, in which 103 * regions in each of the 2d containers to use as a user-GART where we 104 * can create a second page-aligned mapping of parts of the buffer [all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/omapdrm/ |
| D | tcm-sita.c | 8 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ 34 * stride slots in a row 37 unsigned long *map, u16 stride) in free_slots() argument 41 for (i = 0; i < h; i++, pos += stride) in free_slots() 58 *pos = num_bits - w; in r2l_b2t_1d() 63 if (bit - *pos >= w) { in r2l_b2t_1d() 70 search_count = num_bits - bit + w; in r2l_b2t_1d() 71 *pos = bit - w; in r2l_b2t_1d() 74 return (area_found) ? 0 : -ENOMEM; in r2l_b2t_1d() 80 * a = align in slots (mask, 2^n-1, 0 is unaligned) [all …]
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| D | omap_gem.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ 7 #include <linux/dma-mapping.h> 23 /* note: we use upper 8 bits of flags for driver-internal flags: */ 47 * - buffers allocated through the DMA mapping API (with the 50 * - buffers imported from dmabuf (with the OMAP_BO_MEM_DMABUF flag set) 51 * if they are physically contiguous (when sgt->orig_nents == 1) 53 * - buffers mapped through the TILER when dma_addr_cnt is not zero, in 103 * regions in each of the 2d containers to use as a user-GART where we 104 * can create a second page-aligned mapping of parts of the buffer [all …]
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| /kernel/linux/linux-5.10/drivers/gpu/ipu-v3/ |
| D | ipu-image-convert.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * Copyright (C) 2012-2016 Mentor Graphics Inc. 9 #include <linux/dma-mapping.h> 10 #include <video/imx-ipu-image-convert.h> 11 #include "ipu-prv.h" 25 * tile (but taking care to pass the full frame stride length to 26 * the DMA channel's parameter memory!). IDMA double-buffering is used 27 * to convert each tile back-to-back when possible (see note below 33 * +---------+-----+ 34 * +-----+---+ | A | B | [all …]
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| /kernel/linux/linux-6.6/drivers/gpu/ipu-v3/ |
| D | ipu-image-convert.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * Copyright (C) 2012-2016 Mentor Graphics Inc. 9 #include <linux/dma-mapping.h> 12 #include <video/imx-ipu-image-convert.h> 14 #include "ipu-prv.h" 28 * tile (but taking care to pass the full frame stride length to 29 * the DMA channel's parameter memory!). IDMA double-buffering is used 30 * to convert each tile back-to-back when possible (see note below 36 * +---------+-----+ 37 * +-----+---+ | A | B | [all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/display/ |
| D | xylon,logicvc-display.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/display/xylon,logicvc-display.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Paul Kocialkowski <paul.kocialkowski@bootlin.com> 16 with Xilinx Zynq-7000 SoCs and Xilinx FPGAs. 20 synthesis time. As a result, many of the device-tree bindings are meant to 24 Layers are declared in the "layers" sub-node and have dedicated configuration. 32 - xylon,logicvc-3.02.a-display 33 - xylon,logicvc-4.01.a-display [all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/i915/gem/selftests/ |
| D | i915_gem_mman.c | 2 * SPDX-License-Identifier: MIT 22 unsigned int stride; member 30 return (offset & BIT_ULL(bit)) >> (bit - 6); in swizzle_bit() 37 if (tile->tiling == I915_TILING_NONE) in tiled_offset() 40 y = div64_u64_rem(v, tile->stride, &x); in tiled_offset() 41 v = div64_u64_rem(y, tile->height, &y) * tile->stride * tile->height; in tiled_offset() 43 if (tile->tiling == I915_TILING_X) { in tiled_offset() 44 v += y * tile->width; in tiled_offset() 45 v += div64_u64_rem(x, tile->width, &x) << tile->size; in tiled_offset() 47 } else if (tile->width == 128) { in tiled_offset() [all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/sun4i/ |
| D | sun4i_frontend.h | 1 // SPDX-License-Identifier: GPL-2.0+ 4 * Maxime Ripard <maxime.ripard@free-electrons.com> 40 * In tiled mode, the stride is defined as the distance between the start of the 44 * Tiles are represented in row-major order, thus the end line of current tile 46 * 32-bit-aligned-width * 32 and the distance is: 47 * 32 * (32-bit-aligned-width - 31). 49 #define SUN4I_FRONTEND_LINESTRD_TILED(stride) (((stride) - 31) * 32) argument 78 #define SUN4I_FRONTEND_INSIZE(h, w) ((((h) - 1) << 16) | (((w) - 1))) 81 #define SUN4I_FRONTEND_OUTSIZE(h, w) ((((h) - 1) << 16) | (((w) - 1)))
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| /kernel/linux/linux-6.6/drivers/gpu/drm/sun4i/ |
| D | sun4i_frontend.h | 1 // SPDX-License-Identifier: GPL-2.0+ 4 * Maxime Ripard <maxime.ripard@free-electrons.com> 41 * In tiled mode, the stride is defined as the distance between the start of the 45 * Tiles are represented in row-major order, thus the end line of current tile 47 * 32-bit-aligned-width * 32 and the distance is: 48 * 32 * (32-bit-aligned-width - 31). 50 #define SUN4I_FRONTEND_LINESTRD_TILED(stride) (((stride) - 31) * 32) argument 79 #define SUN4I_FRONTEND_INSIZE(h, w) ((((h) - 1) << 16) | (((w) - 1))) 82 #define SUN4I_FRONTEND_OUTSIZE(h, w) ((((h) - 1) << 16) | (((w) - 1)))
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| /kernel/linux/linux-6.6/include/xen/interface/io/ |
| D | fbif.h | 1 /* SPDX-License-Identifier: MIT */ 3 * fbif.h -- Xen virtual frame buffer device 12 /* Out events (frontend -> backend) */ 22 * Capable frontend sets feature-update in xenstore. 23 * Backend requests it by setting request-update in xenstore. 37 * Capable backend sets feature-resize in xenstore. 45 int32_t stride; /* stride in bytes */ member 59 /* In events (backend -> frontend) */ 97 uint32_t line_length; /* length of a row of pixels (in bytes) */
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| /kernel/linux/linux-5.10/drivers/gpu/drm/i915/gt/ |
| D | intel_ggtt.c | 1 // SPDX-License-Identifier: MIT 38 if (node->color != color) in i915_ggtt_color_adjust() 39 *end -= I915_GTT_PAGE_SIZE; in i915_ggtt_color_adjust() 44 struct drm_i915_private *i915 = ggtt->vm.i915; in ggtt_init_hw() 46 i915_address_space_init(&ggtt->vm, VM_CLASS_GGTT); in ggtt_init_hw() 48 ggtt->vm.is_ggtt = true; in ggtt_init_hw() 50 /* Only VLV supports read-only GGTT mappings */ in ggtt_init_hw() 51 ggtt->vm.has_read_only = IS_VALLEYVIEW(i915); in ggtt_init_hw() 54 ggtt->vm.mm.color_adjust = i915_ggtt_color_adjust; in ggtt_init_hw() 56 if (ggtt->mappable_end) { in ggtt_init_hw() [all …]
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| /kernel/linux/linux-6.6/drivers/staging/media/atomisp/pci/isp/kernels/sdis/sdis_2/ |
| D | ia_css_sdis2.host.c | 1 // SPDX-License-Identifier: GPL-2.0 41 unsigned int aligned_width = from->grid.aligned_width * in ia_css_sdis2_horicoef_vmem_encode() 42 from->grid.bqs_per_grid_cell; in ia_css_sdis2_horicoef_vmem_encode() 43 unsigned int width = from->grid.num_hor_coefs; in ia_css_sdis2_horicoef_vmem_encode() 44 int padding = aligned_width - width; in ia_css_sdis2_horicoef_vmem_encode() 45 unsigned int stride = size / IA_CSS_DVS2_NUM_COEF_TYPES / sizeof(short); in ia_css_sdis2_horicoef_vmem_encode() local 55 fill_row(&private[0 * stride], from->hor_coefs.odd_real, width, padding); in ia_css_sdis2_horicoef_vmem_encode() 56 fill_row(&private[1 * stride], from->hor_coefs.odd_imag, width, padding); in ia_css_sdis2_horicoef_vmem_encode() 57 fill_row(&private[2 * stride], from->hor_coefs.even_real, width, padding); in ia_css_sdis2_horicoef_vmem_encode() 58 fill_row(&private[3 * stride], from->hor_coefs.even_imag, width, padding); in ia_css_sdis2_horicoef_vmem_encode() [all …]
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| /kernel/linux/linux-5.10/drivers/staging/media/atomisp/pci/isp/kernels/sdis/sdis_2/ |
| D | ia_css_sdis2.host.c | 1 // SPDX-License-Identifier: GPL-2.0 41 unsigned int aligned_width = from->grid.aligned_width * in ia_css_sdis2_horicoef_vmem_encode() 42 from->grid.bqs_per_grid_cell; in ia_css_sdis2_horicoef_vmem_encode() 43 unsigned int width = from->grid.num_hor_coefs; in ia_css_sdis2_horicoef_vmem_encode() 44 int padding = aligned_width - width; in ia_css_sdis2_horicoef_vmem_encode() 45 unsigned int stride = size / IA_CSS_DVS2_NUM_COEF_TYPES / sizeof(short); in ia_css_sdis2_horicoef_vmem_encode() local 55 fill_row(&private[0 * stride], from->hor_coefs.odd_real, width, padding); in ia_css_sdis2_horicoef_vmem_encode() 56 fill_row(&private[1 * stride], from->hor_coefs.odd_imag, width, padding); in ia_css_sdis2_horicoef_vmem_encode() 57 fill_row(&private[2 * stride], from->hor_coefs.even_real, width, padding); in ia_css_sdis2_horicoef_vmem_encode() 58 fill_row(&private[3 * stride], from->hor_coefs.even_imag, width, padding); in ia_css_sdis2_horicoef_vmem_encode() [all …]
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| /kernel/linux/linux-6.6/drivers/gpu/drm/i915/gem/selftests/ |
| D | i915_gem_mman.c | 2 * SPDX-License-Identifier: MIT 33 unsigned int stride; member 41 return (offset & BIT_ULL(bit)) >> (bit - 6); in swizzle_bit() 48 if (tile->tiling == I915_TILING_NONE) in tiled_offset() 51 y = div64_u64_rem(v, tile->stride, &x); in tiled_offset() 52 v = div64_u64_rem(y, tile->height, &y) * tile->stride * tile->height; in tiled_offset() 54 if (tile->tiling == I915_TILING_X) { in tiled_offset() 55 v += y * tile->width; in tiled_offset() 56 v += div64_u64_rem(x, tile->width, &x) << tile->size; in tiled_offset() 58 } else if (tile->width == 128) { in tiled_offset() [all …]
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| /kernel/linux/linux-6.6/drivers/nvmem/ |
| D | bcm-ocotp.c | 1 // SPDX-License-Identifier: GPL-2.0-only 9 #include <linux/nvmem-provider.h> 45 #define OTPC_CMD_MASK (BIT(OTPC_COMMAND_COMMAND_WIDTH) - 1) 46 #define OTPC_ADDR_MASK (BIT(OTPC_CPUADDR_REG_OTPC_CPU_ADDRESS_WIDTH) - 1) 52 /* 128 bit row / 4 words support. */ 54 /* 128 bit row / 4 words support. */ 114 return -EAGAIN; in poll_cpu_status() 157 u32 address = offset / priv->config->word_size; in bcm_otpc_read() 161 set_command(priv->base, OTPC_CMD_READ); in bcm_otpc_read() 162 set_cpu_address(priv->base, address++); in bcm_otpc_read() [all …]
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| /kernel/linux/linux-5.10/include/xen/interface/io/ |
| D | fbif.h | 2 * fbif.h -- Xen virtual frame buffer device 29 /* Out events (frontend -> backend) */ 39 * Capable frontend sets feature-update in xenstore. 40 * Backend requests it by setting request-update in xenstore. 54 * Capable backend sets feature-resize in xenstore. 62 int32_t stride; /* stride in bytes */ member 76 /* In events (backend -> frontend) */ 114 uint32_t line_length; /* length of a row of pixels (in bytes) */
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| /kernel/linux/linux-5.10/drivers/nvmem/ |
| D | bcm-ocotp.c | 19 #include <linux/nvmem-provider.h> 56 #define OTPC_CMD_MASK (BIT(OTPC_COMMAND_COMMAND_WIDTH) - 1) 57 #define OTPC_ADDR_MASK (BIT(OTPC_CPUADDR_REG_OTPC_CPU_ADDRESS_WIDTH) - 1) 63 /* 128 bit row / 4 words support. */ 65 /* 128 bit row / 4 words support. */ 125 return -EAGAIN; in poll_cpu_status() 168 u32 address = offset / priv->config->word_size; in bcm_otpc_read() 172 set_command(priv->base, OTPC_CMD_READ); in bcm_otpc_read() 173 set_cpu_address(priv->base, address++); in bcm_otpc_read() 174 set_start_bit(priv->base); in bcm_otpc_read() [all …]
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| /kernel/linux/linux-6.6/drivers/gpu/drm/logicvc/ |
| D | logicvc_of.c | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Copyright (C) 2019-2022 Bootlin 14 { "lvds-4bits", LOGICVC_DISPLAY_INTERFACE_LVDS_4BITS }, 15 { "lvds-3bits", LOGICVC_DISPLAY_INTERFACE_LVDS_3BITS }, 40 .name = "xylon,display-interface", 48 .name = "xylon,display-colorspace", 56 .name = "xylon,display-depth", 60 .name = "xylon,row-stride", 67 .name = "xylon,background-layer", 71 .name = "xylon,layers-configurable", [all …]
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| /kernel/linux/linux-6.6/drivers/thermal/intel/ |
| D | intel_hfi.c | 1 // SPDX-License-Identifier: GPL-2.0-only 8 * Ricardo Neri <ricardo.neri-calderon@linux.intel.com> 22 #define pr_fmt(fmt) "intel-hfi: " fmt 33 #include <linux/percpu-defs.h> 79 * struct hfi_cpu_data - HFI capabilities per CPU 92 * struct hfi_hdr - Header of the HFI table 104 * struct hfi_instance - Representation of an HFI instance (i.e., a table) 133 * struct hfi_features - Supported HFI features 135 * @cpu_stride: Stride size to locate the capability data of a logical 136 * processor within the table (i.e., row stride) [all …]
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| /kernel/linux/linux-5.10/include/uapi/drm/ |
| D | drm_fourcc.h | 39 * further describe the buffer's format - for example tiling or compression. 42 * ---------------- 56 * vendor-namespaced, and as such the relationship between a fourcc code and a 58 * may preserve meaning - such as number of planes - from the fourcc code, 149 * IEEE 754-2008 binary16 half-precision float 167 …010 fourcc_code('V', 'U', '3', '0') /* Y followed by U then V, 10:10:10. Non-linear modifier only … 171 * 16-xx padding occupy lsb 179 * 16-xx padding occupy lsb except Y410 204 * 1-plane YUV 4:2:0 207 * These formats can only be used with a non-Linear modifier. [all …]
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| /kernel/linux/linux-5.10/drivers/dma/ipu/ |
| D | ipu_idmac.c | 1 // SPDX-License-Identifier: GPL-2.0-only 6 * Copyright (C) 2005-2007 Freescale Semiconductor, Inc. All Rights Reserved. 9 #include <linux/dma-mapping.h> 22 #include <linux/dma/ipu-dma.h> 36 * struct ipu *ipu = to_ipu(to_idmac(ichan->dma_chan.device)); 45 return __raw_readl(ipu->reg_ic + reg); in __idmac_read_icreg() 48 #define idmac_read_icreg(ipu, reg) __idmac_read_icreg(ipu, reg - IC_CONF) 52 __raw_writel(value, ipu->reg_ic + reg); in __idmac_write_icreg() 55 #define idmac_write_icreg(ipu, v, reg) __idmac_write_icreg(ipu, v, reg - IC_CONF) 59 return __raw_readl(ipu->reg_ipu + reg); in idmac_read_ipureg() [all …]
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| /kernel/linux/linux-6.6/drivers/net/ethernet/sfc/ |
| D | mae.c | 1 // SPDX-License-Identifier: GPL-2.0-only 5 * Copyright 2020-2022 Xilinx Inc. 29 return -EINVAL; in efx_mae_allocate_mport() 31 return -EINVAL; in efx_mae_allocate_mport() 42 return -EIO; in efx_mae_allocate_mport() 64 MAE_MPORT_SELECTOR_PPORT_ID, efx->port_num); in efx_mae_mport_wire() 115 return -EIO; in efx_mae_fw_lookup_mport() 131 efx->net_dev->mtu); in efx_mae_start_counters() 140 return -EIO; in efx_mae_start_counters() 143 netif_dbg(efx, drv, efx->net_dev, in efx_mae_start_counters() [all …]
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| /kernel/linux/linux-6.6/Documentation/userspace-api/media/v4l/ |
| D | pixfmt-yuv-planar.rst | 1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later 3 .. planar-yuv: 12 - Semi-planar formats use two planes. The first plane is the luma plane and 16 - Fully planar formats use three planes to store the Y, Cb and Cr components 20 tiled. Padding may be supported at the end of the lines, and the line stride of 21 the chroma planes may be constrained by the line stride of the luma plane. 26 and applications that support the multi-planar API, described in 27 :ref:`planar-apis`. Unless explicitly documented as supporting non-contiguous 31 Semi-Planar YUV Formats 42 subsampling, the chroma line stride (in bytes) is thus equal to twice the luma [all …]
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| /kernel/linux/linux-6.6/include/uapi/drm/ |
| D | drm_fourcc.h | 39 * further describe the buffer's format - for example tiling or compression. 42 * ---------------- 56 * vendor-namespaced, and as such the relationship between a fourcc code and a 58 * may preserve meaning - such as number of planes - from the fourcc code, 64 * a modifier: a buffer may match a 64-pixel aligned modifier and a 32-pixel 76 * - Kernel and user-space drivers: for drivers it's important that modifiers 80 * - Higher-level programs interfacing with KMS/GBM/EGL/Vulkan/etc: these users 93 * ----------------------- 98 * upstream in-kernel or open source userspace user does not apply. 222 * IEEE 754-2008 binary16 half-precision float [all …]
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