Searched +full:rs485 +full:- +full:rts +full:- +full:active +full:- +full:low (Results 1 – 25 of 38) sorted by relevance
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/serial/ |
| D | rs485.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/serial/rs485.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: RS485 serial communications 9 description: The RTS signal is capable of automatically controlling line 10 direction for the built-in half-duplex mode. The properties described 11 hereafter shall be given to a half-duplex capable UART node. 14 - Rob Herring <robh@kernel.org> 17 rs485-rts-delay: [all …]
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| D | st,stm32-uart.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/serial/st,stm32-uart.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 8 - Erwan Le Ray <erwan.leray@foss.st.com> 15 - st,stm32-uart 16 - st,stm32f7-uart 17 - st,stm32h7-uart 34 st,hw-flow-ctrl: 38 rx-tx-swap: true [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/serial/ |
| D | st,stm32-uart.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/serial/st,stm32-uart.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 8 - Erwan Le Ray <erwan.leray@st.com> 13 - $ref: rs485.yaml 18 - st,stm32-uart 19 - st,stm32f7-uart 20 - st,stm32h7-uart 37 st,hw-flow-ctrl: [all …]
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| D | rs485.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/serial/rs485.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: RS485 serial communications Bindings 9 description: The RTS signal is capable of automatically controlling line 10 direction for the built-in half-duplex mode. The properties described 11 hereafter shall be given to a half-duplex capable UART node. 14 - Rob Herring <robh@kernel.org> 17 rs485-rts-delay: [all …]
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| D | omap_serial.txt | 4 - compatible : should be "ti,j721e-uart", "ti,am654-uart" for J721E controllers 5 - compatible : should be "ti,am654-uart" for AM654 controllers 6 - compatible : should be "ti,omap2-uart" for OMAP2 controllers 7 - compatible : should be "ti,omap3-uart" for OMAP3 controllers 8 - compatible : should be "ti,omap4-uart" for OMAP4 controllers 9 - compatible : should be "ti,am4372-uart" for AM437x controllers 10 - compatible : should be "ti,am3352-uart" for AM335x controllers 11 - compatible : should be "ti,dra742-uart" for DRA7x controllers 12 - reg : address and length of the register space 13 - interrupts or interrupts-extended : Should contain the uart interrupt [all …]
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| D | fsl-imx-uart.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/serial/fsl-imx-uart.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Fabio Estevam <fabio.estevam@nxp.com> 13 - $ref: "serial.yaml" 14 - $ref: "rs485.yaml" 19 - const: fsl,imx1-uart 20 - const: fsl,imx21-uart 21 - items: [all …]
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| D | fsl-lpuart.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/serial/fsl-lpuart.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Freescale low power universal asynchronous receiver/transmitter (lpuart) 10 - Fugang Duan <fugang.duan@nxp.com> 13 - $ref: "rs485.yaml" 18 - enum: 19 - fsl,vf610-lpuart 20 - fsl,ls1021a-lpuart [all …]
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| /kernel/linux/linux-6.6/arch/arm64/boot/dts/freescale/ |
| D | imx8mm-venice-gw73xx-0x-rs422.dtso | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 5 * GW73xx RS422 (RS485 full duplex): 6 * - GPIO1_0 rs485_term selects on-chip termination 7 * - GPIO4_0 rs485_en needs to be driven high (active) 8 * - GPIO4_2 rs485_hd needs to be driven low (in-active) 9 * - UART4_TX is DE for RS485 transmitter 10 * - RS485_EN needs to be pulled high 11 * - RS485_HALF needs to be low 14 #include <dt-bindings/gpio/gpio.h> 16 #include "imx8mm-pinfunc.h" [all …]
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| D | imx8mm-venice-gw72xx-0x-rs422.dtso | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 5 * GW72xx RS422 (RS485 full duplex): 6 * - GPIO1_0 rs485_term selects on-chip termination 7 * - GPIO4_0 rs485_en needs to be driven high (active) 8 * - GPIO4_2 rs485_hd needs to be driven low (in-active) 9 * - UART4_TX is DE for RS485 transmitter 10 * - RS485_EN needs to be pulled high 11 * - RS485_HALF needs to be low 14 #include <dt-bindings/gpio/gpio.h> 16 #include "imx8mm-pinfunc.h" [all …]
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| D | imx8mm-verdin-dev.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT 7 sound_card: sound-card { 8 compatible = "simple-audio-card"; 9 simple-audio-card,bitclock-master = <&dailink_master>; 10 simple-audio-card,format = "i2s"; 11 simple-audio-card,frame-master = <&dailink_master>; 12 simple-audio-card,mclk-fs = <256>; 13 simple-audio-card,name = "imx8mm-nau8822"; 14 simple-audio-card,routing = 25 simple-audio-card,widgets = [all …]
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| D | imx8mp-verdin-dev.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT 7 reg_eth2phy: regulator-eth2phy { 8 compatible = "regulator-fixed"; 9 enable-active-high; 11 off-on-delay-us = <500000>; 12 regulator-max-microvolt = <3300000>; 13 regulator-min-microvolt = <3300000>; 14 regulator-name = "+V3.3_ETH"; 15 startup-delay-us = <200000>; 16 vin-supply = <®_3p3v>; [all …]
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| /kernel/linux/linux-6.6/drivers/tty/serial/ |
| D | serial_core.c | 1 // SPDX-License-Identifier: GPL-2.0+ 8 * Copyright (C) 2000-2001 Deep Blue Solutions Ltd. 43 * lockdep: port->lock is initialized in two places, but we 44 * want only one lock-class: 48 #define HIGH_BITS_OFFSET ((sizeof(long)-sizeof(int))*8) 51 * Max time with active RTS before/after data is sent. 62 return !!(uport->status & UPSTAT_DCD_ENABLE); in uart_dcd_enabled() 67 if (atomic_add_unless(&state->refcount, 1, 0)) in uart_port_ref() 68 return state->uart_port; in uart_port_ref() 74 if (atomic_dec_and_test(&uport->state->refcount)) in uart_port_deref() [all …]
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| D | imx.c | 1 // SPDX-License-Identifier: GPL-2.0+ 30 #include <linux/dma-mapping.h> 33 #include <linux/dma/imx-dma.h> 74 #define UCR1_RTSDEN (1<<5) /* RTS delta interrupt enable */ 82 #define UCR2_IRTS (1<<14) /* Ignore RTS pin */ 125 #define UFCR_RFDIV_REG(x) (((x) < 7 ? 6 - (x) : 6) << 7) 128 #define USR1_RTSS (1<<14) /* RTS pin status */ 130 #define USR1_RTSD (1<<12) /* RTS delta */ 148 #define USR2_RTSF (1<<4) /* RTS edge interrupt flag */ 161 /* We've been assigned a range on the "Low-density serial ports" major */ [all …]
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| D | sc16is7xx.c | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * SC16IS7xx tty serial driver - Copyright (C) 2014 GridPoint 47 * - only on 75x/76x 50 * - only on 75x/76x 53 * - only on 75x/76x 56 * - only on 75x/76x 65 #define SC16IS7XX_DLL_REG (0x00) /* Divisor Latch Low */ 84 /* IER register bits - write only if (EFR[4] == 1) */ 97 /* FCR register bits - write only if (EFR[4] == 1) */ 107 #define SC16IS7XX_IIR_RTOI_SRC 0x0c /* RX time-out interrupt */ [all …]
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | imx6ul-kontron-n6x1x-s.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 8 #include <dt-bindings/gpio/gpio.h> 11 gpio-leds { 12 compatible = "gpio-leds"; 13 pinctrl-names = "default"; 14 pinctrl-0 = <&pinctrl_gpio_leds>; 17 label = "debug-led1"; 19 default-state = "off"; 20 linux,default-trigger = "heartbeat"; 24 label = "debug-led2"; [all …]
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| /kernel/linux/linux-6.6/arch/arm/boot/dts/nxp/imx/ |
| D | imx6ul-kontron-bl-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 8 #include <dt-bindings/gpio/gpio.h> 11 gpio-leds { 12 compatible = "gpio-leds"; 13 pinctrl-names = "default"; 14 pinctrl-0 = <&pinctrl_gpio_leds>; 17 label = "debug-led1"; 19 default-state = "off"; 20 linux,default-trigger = "heartbeat"; 24 label = "debug-led2"; [all …]
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| D | imx7-mba7.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 OR X11 3 * Device Tree Include file for TQ-Systems MBa7 carrier board. 5 * Copyright (C) 2016 TQ-Systems GmbH 6 * Author: Markus Niebel <Markus.Niebel@tq-group.com> 13 #include <dt-bindings/input/input.h> 14 #include <dt-bindings/net/ti-dp83867.h> 20 /delete-property/ mmc2; 24 compatible = "gpio-beeper"; 29 stdout-path = &uart6; 32 gpio_buttons: gpio-keys { [all …]
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| D | mba6ulx.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) 3 * Copyright 2018-2022 TQ-Systems GmbH 4 * Author: Markus Niebel <Markus.Niebel@tq-group.com> 8 model = "TQ-Systems MBA6ULx Baseboard"; 18 stdout-path = &uart1; 22 compatible = "pwm-backlight"; 23 power-supply = <®_mba6ul_3v3>; 24 enable-gpios = <&expander_out0 4 GPIO_ACTIVE_HIGH>; 29 compatible = "gpio-beeper"; 33 gpio_buttons: gpio-keys { [all …]
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| D | imx6qdl-mba6.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 5 * Copyright 2013-2021 TQ-Systems GmbH 6 * Author: Markus Niebel <Markus.Niebel@tq-group.com> 9 #include <dt-bindings/clock/imx6qdl-clock.h> 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/input/input.h> 12 #include <dt-bindings/sound/fsl-imx-audmux.h> 18 /delete-property/ mmc2; 19 /delete-property/ mmc3; 24 stdout-path = &uart2; [all …]
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| D | imx6dl-plybas.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT 7 /dts-v1/; 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/leds/common.h> 17 stdout-path = &uart4; 21 compatible = "gpio-keys"; 24 button-start { 30 button-clean { 38 compatible = "gpio-leds"; 39 pinctrl-names = "default"; [all …]
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| /kernel/linux/linux-6.6/drivers/usb/serial/ |
| D | xr_serial.c | 1 // SPDX-License-Identifier: GPL-2.0+ 10 * https://lore.kernel.org/r/20180404070634.nhspvmxcjwfgjkcv@advantechmxl-desktop 240 u8 channel; /* zero-based index or interface number */ 241 struct serial_rs485 rs485; member 247 const struct xr_type *type = data->type; in xr_set_reg() 248 struct usb_serial *serial = port->serial; in xr_set_reg() 251 ret = usb_control_msg(serial->dev, usb_sndctrlpipe(serial->dev, 0), in xr_set_reg() 252 type->set_reg, in xr_set_reg() 253 USB_DIR_OUT | USB_TYPE_VENDOR | type->reg_recipient, in xr_set_reg() 257 dev_err(&port->dev, "Failed to set reg 0x%02x: %d\n", reg, ret); in xr_set_reg() [all …]
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| /kernel/linux/linux-5.10/drivers/tty/serial/ |
| D | serial_core.c | 1 // SPDX-License-Identifier: GPL-2.0+ 8 * Copyright (C) 2000-2001 Deep Blue Solutions Ltd. 38 * lockdep: port->lock is initialized in two places, but we 39 * want only one lock-class: 43 #define HIGH_BITS_OFFSET ((sizeof(long)-sizeof(int))*8) 46 * Max time with active RTS before/after data is sent. 60 return !!(uport->status & UPSTAT_DCD_ENABLE); in uart_dcd_enabled() 65 if (atomic_add_unless(&state->refcount, 1, 0)) in uart_port_ref() 66 return state->uart_port; in uart_port_ref() 72 if (atomic_dec_and_test(&uport->state->refcount)) in uart_port_deref() [all …]
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| D | imx.c | 1 // SPDX-License-Identifier: GPL-2.0+ 30 #include <linux/dma-mapping.h> 33 #include <linux/platform_data/serial-imx.h> 34 #include <linux/platform_data/dma-imx.h> 75 #define UCR1_RTSDEN (1<<5) /* RTS delta interrupt enable */ 83 #define UCR2_IRTS (1<<14) /* Ignore RTS pin */ 125 #define UFCR_RFDIV_REG(x) (((x) < 7 ? 6 - (x) : 6) << 7) 128 #define USR1_RTSS (1<<14) /* RTS pin status */ 130 #define USR1_RTSD (1<<12) /* RTS delta */ 148 #define USR2_RTSF (1<<4) /* RTS edge interrupt flag */ [all …]
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| D | sc16is7xx.c | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * SC16IS7xx tty serial driver - Copyright (C) 2014 GridPoint 47 * - only on 75x/76x 50 * - only on 75x/76x 53 * - only on 75x/76x 56 * - only on 75x/76x 65 #define SC16IS7XX_DLL_REG (0x00) /* Divisor Latch Low */ 84 /* IER register bits - write only if (EFR[4] == 1) */ 97 /* FCR register bits - write only if (EFR[4] == 1) */ 107 #define SC16IS7XX_IIR_RTOI_SRC 0x0c /* RX time-out interrupt */ [all …]
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| D | atmel_serial.c | 1 // SPDX-License-Identifier: GPL-2.0+ 23 #include <linux/dma-mapping.h> 45 * These two offsets are substracted from the RX FIFO size to define the RTS 46 * high and low thresholds 61 /* Use device name ttyAT, major 204 and minor 154-169. This is necessary if we 70 /* Use device name ttyS, major 4, minor 64-68. This is the usual serial port 162 bool hd_start_rx; /* can start RX during half-duplex operation */ 194 { .compatible = "atmel,at91rm9200-usart-serial" }, 207 return __raw_readl(port->membase + reg); in atmel_uart_readl() 212 __raw_writel(value, port->membase + reg); in atmel_uart_writel() [all …]
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