| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/serial/ |
| D | rs485.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/serial/rs485.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: RS485 serial communications 9 description: The RTS signal is capable of automatically controlling line 10 direction for the built-in half-duplex mode. The properties described 11 hereafter shall be given to a half-duplex capable UART node. 14 - Rob Herring <robh@kernel.org> 17 rs485-rts-delay: [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/serial/ |
| D | rs485.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/serial/rs485.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: RS485 serial communications Bindings 9 description: The RTS signal is capable of automatically controlling line 10 direction for the built-in half-duplex mode. The properties described 11 hereafter shall be given to a half-duplex capable UART node. 14 - Rob Herring <robh@kernel.org> 17 rs485-rts-delay: [all …]
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| D | st,stm32-uart.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/serial/st,stm32-uart.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 8 - Erwan Le Ray <erwan.leray@st.com> 13 - $ref: rs485.yaml 18 - st,stm32-uart 19 - st,stm32f7-uart 20 - st,stm32h7-uart 37 st,hw-flow-ctrl: [all …]
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| D | omap_serial.txt | 4 - compatible : should be "ti,j721e-uart", "ti,am654-uart" for J721E controllers 5 - compatible : should be "ti,am654-uart" for AM654 controllers 6 - compatible : should be "ti,omap2-uart" for OMAP2 controllers 7 - compatible : should be "ti,omap3-uart" for OMAP3 controllers 8 - compatible : should be "ti,omap4-uart" for OMAP4 controllers 9 - compatible : should be "ti,am4372-uart" for AM437x controllers 10 - compatible : should be "ti,am3352-uart" for AM335x controllers 11 - compatible : should be "ti,dra742-uart" for DRA7x controllers 12 - reg : address and length of the register space 13 - interrupts or interrupts-extended : Should contain the uart interrupt [all …]
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| D | fsl-imx-uart.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/serial/fsl-imx-uart.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Fabio Estevam <fabio.estevam@nxp.com> 13 - $ref: "serial.yaml" 14 - $ref: "rs485.yaml" 19 - const: fsl,imx1-uart 20 - const: fsl,imx21-uart 21 - items: [all …]
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| /kernel/linux/linux-5.10/Documentation/driver-api/serial/ |
| D | serial-rs485.rst | 2 RS485 Serial Communications 8 EIA-485, also known as TIA/EIA-485 or RS-485, is a standard defining the 15 2. Hardware-related Considerations 18 Some CPUs/UARTs (e.g., Atmel AT91 or 16C950 UART) contain a built-in 19 half-duplex mode capable of automatically controlling line direction by 20 toggling RTS or DTR signals. That can be used to control external 21 half-duplex hardware like an RS485 transceiver or any RS232-connected 22 half-duplex devices like some modems. 26 available at user-level to allow switching from one mode to the other, and 33 RS485 communications. This data structure is used to set and configure RS485 [all …]
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| /kernel/linux/linux-6.6/Documentation/driver-api/serial/ |
| D | serial-rs485.rst | 2 RS485 Serial Communications 8 EIA-485, also known as TIA/EIA-485 or RS-485, is a standard defining the 15 2. Hardware-related Considerations 18 Some CPUs/UARTs (e.g., Atmel AT91 or 16C950 UART) contain a built-in 19 half-duplex mode capable of automatically controlling line direction by 20 toggling RTS or DTR signals. That can be used to control external 21 half-duplex hardware like an RS485 transceiver or any RS232-connected 22 half-duplex devices like some modems. 26 available at user-level to allow switching from one mode to the other, and 32 The Linux kernel provides the struct serial_rs485 to handle RS485 [all …]
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| /kernel/linux/linux-6.6/arch/arm/boot/dts/ti/omap/ |
| D | am335x-nano.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2013 Newflow Ltd - http://www.newflow.co.uk/ 5 /dts-v1/; 15 cpu0-supply = <&dcdc2_reg>; 25 compatible = "gpio-leds"; 30 default-state = "off"; 36 pinctrl-names = "default"; 37 pinctrl-0 = <&misc_pins>; 39 misc_pins: misc-pins { 40 pinctrl-single,pins = < [all …]
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | aks-cdu.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * aks-cdu.dts - Device Tree file for AK signal CDU 9 /dts-v1/; 11 #include "ge863-pro3.dtsi" 20 clock-frequency = <32768>; 32 linux,rs485-enabled-at-boot-time; 33 rs485-rts-delay = <0 0>; 38 linux,rs485-enabled-at-boot-time; 39 rs485-rts-delay = <0 0>; 44 linux,rs485-enabled-at-boot-time; [all …]
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| D | am335x-nano.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2013 Newflow Ltd - http://www.newflow.co.uk/ 5 /dts-v1/; 15 cpu0-supply = <&dcdc2_reg>; 25 compatible = "gpio-leds"; 30 default-state = "off"; 36 pinctrl-names = "default"; 37 pinctrl-0 = <&misc_pins>; 40 pinctrl-single,pins = < 46 pinctrl-single,pins = < [all …]
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| /kernel/linux/linux-6.6/arch/arm/boot/dts/microchip/ |
| D | aks-cdu.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * aks-cdu.dts - Device Tree file for AK signal CDU 9 /dts-v1/; 11 #include "ge863-pro3.dtsi" 20 clock-frequency = <32768>; 32 linux,rs485-enabled-at-boot-time; 33 rs485-rts-delay = <0 0>; 38 linux,rs485-enabled-at-boot-time; 39 rs485-rts-delay = <0 0>; 44 linux,rs485-enabled-at-boot-time; [all …]
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| /kernel/linux/linux-6.6/include/uapi/linux/ |
| D | serial.h | 1 /* SPDX-License-Identifier: GPL-1.0+ WITH Linux-syscall-note */ 63 #define PORT_RSA 13 /* RSA-DV II/S card */ 82 * Multiport serial configuration structure --- external structure 99 * Serial input interrupt line counters -- external structure 111 * struct serial_rs485 - serial interface for controlling RS485 settings. 112 * @flags: RS485 feature flags. 113 * @delay_rts_before_send: Delay before send (milliseconds). 114 * @delay_rts_after_send: Delay after send (milliseconds). 115 * @addr_recv: Receive filter for RS485 addressing mode 117 * @addr_dest: Destination address for RS485 addressing mode [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/mfd/ |
| D | atmel-usart.txt | 4 - compatible: Should be one of the following: 5 - "atmel,at91rm9200-usart" 6 - "atmel,at91sam9260-usart" 7 - "microchip,sam9x60-usart" 8 - "atmel,at91rm9200-dbgu", "atmel,at91rm9200-usart" 9 - "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart" 10 - "microchip,sam9x60-dbgu", "microchip,sam9x60-usart" 11 - reg: Should contain registers location and length 12 - interrupts: Should contain interrupt 13 - clock-names: tuple listing input clock names. [all …]
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| /kernel/linux/linux-5.10/drivers/tty/serial/8250/ |
| D | 8250_lpc18xx.c | 1 // SPDX-License-Identifier: GPL-2.0 36 struct serial_rs485 *rs485) in lpc18xx_rs485_config() argument 43 if (rs485->flags & SER_RS485_ENABLED) in lpc18xx_rs485_config() 44 memset(rs485->padding, 0, sizeof(rs485->padding)); in lpc18xx_rs485_config() 46 memset(rs485, 0, sizeof(*rs485)); in lpc18xx_rs485_config() 48 rs485->flags &= SER_RS485_ENABLED | SER_RS485_RTS_ON_SEND | in lpc18xx_rs485_config() 51 if (rs485->flags & SER_RS485_ENABLED) { in lpc18xx_rs485_config() 55 if (rs485->flags & SER_RS485_RTS_ON_SEND) { in lpc18xx_rs485_config() 57 rs485->flags &= ~SER_RS485_RTS_AFTER_SEND; in lpc18xx_rs485_config() 59 rs485->flags |= SER_RS485_RTS_AFTER_SEND; in lpc18xx_rs485_config() [all …]
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| /kernel/linux/linux-5.10/include/uapi/linux/ |
| D | serial.h | 1 /* SPDX-License-Identifier: GPL-1.0+ WITH Linux-syscall-note */ 63 #define PORT_RSA 13 /* RSA-DV II/S card */ 82 * Multiport serial configuration structure --- external structure 99 * Serial input interrupt line counters -- external structure 111 * Serial interface for controlling RS485 settings on chips with suitable 118 __u32 flags; /* RS485 feature flags */ 121 RTS pin when 124 RTS pin after sent*/ 129 __u32 delay_rts_before_send; /* Delay before send (milliseconds) */ 130 __u32 delay_rts_after_send; /* Delay after send (milliseconds) */
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| /kernel/linux/linux-6.6/arch/arm64/boot/dts/freescale/ |
| D | imx8mp-verdin-dev.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT 7 reg_eth2phy: regulator-eth2phy { 8 compatible = "regulator-fixed"; 9 enable-active-high; 11 off-on-delay-us = <500000>; 12 regulator-max-microvolt = <3300000>; 13 regulator-min-microvolt = <3300000>; 14 regulator-name = "+V3.3_ETH"; 15 startup-delay-us = <200000>; 16 vin-supply = <®_3p3v>; [all …]
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| /kernel/linux/linux-6.6/drivers/tty/serial/8250/ |
| D | 8250_lpc18xx.c | 1 // SPDX-License-Identifier: GPL-2.0 36 struct serial_rs485 *rs485) in lpc18xx_rs485_config() argument 43 if (rs485->flags & SER_RS485_ENABLED) { in lpc18xx_rs485_config() 47 if (rs485->flags & SER_RS485_RTS_ON_SEND) in lpc18xx_rs485_config() 51 if (rs485->delay_rts_after_send) { in lpc18xx_rs485_config() 52 baud_clk = port->uartclk / up->dl_read(up); in lpc18xx_rs485_config() 53 rs485_dly_reg = DIV_ROUND_UP(rs485->delay_rts_after_send in lpc18xx_rs485_config() 59 /* Calculate the resulting delay in ms */ in lpc18xx_rs485_config() 60 rs485->delay_rts_after_send = (rs485_dly_reg * MSEC_PER_SEC) in lpc18xx_rs485_config() 80 offset = offset << p->regshift; in lpc18xx_uart_serial_out() [all …]
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| D | 8250_pci1xxxx.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * Probe module for 8250/16550-type MCHP PCI serial ports. 91 {0, 1, 2, -1}, /* PCI3p012 */ 92 {0, 1, 3, -1}, /* PCI3p013 */ 93 {0, 2, 3, -1}, /* PCI3p023 */ 94 {1, 2, 3, -1}, /* PCI3p123 */ 95 {0, 1, -1, -1}, /* PCI2p01 */ 96 {0, 2, -1, -1}, /* PCI2p02 */ 97 {0, 3, -1, -1}, /* PCI2p03 */ 98 {1, 2, -1, -1}, /* PCI2p12 */ [all …]
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| /kernel/linux/linux-6.6/drivers/tty/serial/ |
| D | serial_core.c | 1 // SPDX-License-Identifier: GPL-2.0+ 8 * Copyright (C) 2000-2001 Deep Blue Solutions Ltd. 27 #include <linux/delay.h> 43 * lockdep: port->lock is initialized in two places, but we 44 * want only one lock-class: 48 #define HIGH_BITS_OFFSET ((sizeof(long)-sizeof(int))*8) 51 * Max time with active RTS before/after data is sent. 62 return !!(uport->status & UPSTAT_DCD_ENABLE); in uart_dcd_enabled() 67 if (atomic_add_unless(&state->refcount, 1, 0)) in uart_port_ref() 68 return state->uart_port; in uart_port_ref() [all …]
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| D | imx.c | 1 // SPDX-License-Identifier: GPL-2.0+ 22 #include <linux/delay.h> 30 #include <linux/dma-mapping.h> 33 #include <linux/dma/imx-dma.h> 74 #define UCR1_RTSDEN (1<<5) /* RTS delta interrupt enable */ 82 #define UCR2_IRTS (1<<14) /* Ignore RTS pin */ 125 #define UFCR_RFDIV_REG(x) (((x) < 7 ? 6 - (x) : 6) << 7) 128 #define USR1_RTSS (1<<14) /* RTS pin status */ 130 #define USR1_RTSD (1<<12) /* RTS delta */ 148 #define USR2_RTSF (1<<4) /* RTS edge interrupt flag */ [all …]
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| D | omap-serial.c | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Driver for OMAP-UART controller. 16 * this driver as required for the omap-platform. 24 #include <linux/delay.h> 38 #include <linux/platform_data/serial-omap.h> 79 #define OMAP_UART_DMA_CH_FREE -1 176 offset <<= up->port.regshift; in serial_in() 177 return readw(up->port.membase + offset); in serial_in() 182 offset <<= up->port.regshift; in serial_out() 183 writew(value, up->port.membase + offset); in serial_out() [all …]
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| /kernel/linux/linux-5.10/drivers/tty/serial/ |
| D | max310x.c | 1 // SPDX-License-Identifier: GPL-2.0+ 5 * Copyright (C) 2012-2016 Alexander Shiyan <shc_work@mail.ru> 14 #include <linux/delay.h> 102 #define MAX310X_SPCHR_MULTIDROP_BIT (1 << 5) /* 9-bit multidrop addr char */ 115 #define MAX310X_MODE1_TXHIZ_BIT (1 << 2) /* TX pin three-state */ 116 #define MAX310X_MODE1_RTSHIZ_BIT (1 << 3) /* RTS pin three-state */ 129 #define MAX310X_MODE2_MULTIDROP_BIT (1 << 6) /* 9-bit multidrop enable */ 137 * 00 -> 5 bit words 138 * 01 -> 6 bit words 139 * 10 -> 7 bit words [all …]
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| D | sc16is7xx.c | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * SC16IS7xx tty serial driver - Copyright (C) 2014 GridPoint 13 #include <linux/delay.h> 47 * - only on 75x/76x 50 * - only on 75x/76x 53 * - only on 75x/76x 56 * - only on 75x/76x 84 /* IER register bits - write only if (EFR[4] == 1) */ 97 /* FCR register bits - write only if (EFR[4] == 1) */ 107 #define SC16IS7XX_IIR_RTOI_SRC 0x0c /* RX time-out interrupt */ [all …]
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| D | serial_core.c | 1 // SPDX-License-Identifier: GPL-2.0+ 8 * Copyright (C) 2000-2001 Deep Blue Solutions Ltd. 25 #include <linux/delay.h> 38 * lockdep: port->lock is initialized in two places, but we 39 * want only one lock-class: 43 #define HIGH_BITS_OFFSET ((sizeof(long)-sizeof(int))*8) 46 * Max time with active RTS before/after data is sent. 60 return !!(uport->status & UPSTAT_DCD_ENABLE); in uart_dcd_enabled() 65 if (atomic_add_unless(&state->refcount, 1, 0)) in uart_port_ref() 66 return state->uart_port; in uart_port_ref() [all …]
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| D | omap-serial.c | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Driver for OMAP-UART controller. 16 * this driver as required for the omap-platform. 23 #include <linux/delay.h> 37 #include <linux/platform_data/serial-omap.h> 78 #define OMAP_UART_DMA_CH_FREE -1 175 offset <<= up->port.regshift; in serial_in() 176 return readw(up->port.membase + offset); in serial_in() 181 offset <<= up->port.regshift; in serial_out() 182 writew(value, up->port.membase + offset); in serial_out() [all …]
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