Home
last modified time | relevance | path

Searched +full:rtc32k +full:- +full:clock (Results 1 – 18 of 18) sorted by relevance

/kernel/linux/linux-6.6/Documentation/devicetree/bindings/clock/
Dstericsson,u8500-clks.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/stericsson,u8500-clks.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ST-Ericsson DB8500 (U8500) clocks
10 - Ulf Hansson <ulf.hansson@linaro.org>
11 - Linus Walleij <linus.walleij@linaro.org>
14 DB8500 digital baseband system-on-chip and its siblings such as
16 itself, not off-chip clocks. There are four different on-chip
17 clocks - RTC (32 kHz), CPU clock (SMP TWD), PRCMU (power reset and
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/clock/
Dux500.txt1 Clock bindings for ST-Ericsson Ux500 clocks
4 - compatible : shall contain only one of the following:
5 "stericsson,u8500-clks"
6 "stericsson,u8540-clks"
7 "stericsson,u9540-clks"
8 - reg : shall contain base register location and length for
13 - prcmu-clock: a subnode with one clock cell for PRCMU (power,
15 clock in the prcmu-clock node the consumer wants to use.
16 - prcc-periph-clock: a subnode with two clock cells for
17 PRCC (programmable reset- and clock controller) peripheral clocks.
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dmeson8b-odroidc1.dts1 // SPDX-License-Identifier: GPL-2.0 OR MIT
7 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
12 model = "Hardkernel ODROID-C1";
13 compatible = "hardkernel,odroid-c1", "amlogic,meson8b";
22 stdout-path = "serial0:115200n8";
30 emmc_pwrseq: emmc-pwrseq {
31 compatible = "mmc-pwrseq-emmc";
32 reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
36 compatible = "gpio-leds";
[all …]
Dmeson8b-ec100.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
22 stdout-path = "serial0:115200n8";
30 emmc_pwrseq: emmc-pwrseq {
31 compatible = "mmc-pwrseq-emmc";
32 reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
35 gpio-keys {
36 compatible = "gpio-keys-polled";
[all …]
Dmt7623.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2017-2018 MediaTek Inc.
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/clock/mt2701-clk.h>
13 #include <dt-bindings/pinctrl/mt7623-pinfunc.h>
14 #include <dt-bindings/power/mt2701-power.h>
15 #include <dt-bindings/gpio/gpio.h>
16 #include <dt-bindings/phy/phy.h>
17 #include <dt-bindings/reset/mt2701-resets.h>
[all …]
Dmt2701.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/clock/mt2701-clk.h>
9 #include <dt-bindings/phy/phy.h>
10 #include <dt-bindings/power/mt2701-power.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/memory/mt2701-larb-port.h>
14 #include <dt-bindings/reset/mt2701-resets.h>
15 #include "mt2701-pinfunc.h"
18 #address-cells = <2>;
[all …]
Dste-dbx5x0.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
6 #include <dt-bindings/interrupt-controller/irq.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/mfd/dbx500-prcmu.h>
9 #include <dt-bindings/arm/ux500_pm_domains.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/thermal/thermal.h>
14 #address-cells = <1>;
15 #size-cells = <1>;
37 #address-cells = <1>;
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/amlogic/
Dmeson8b-odroidc1.dts1 // SPDX-License-Identifier: GPL-2.0 OR MIT
7 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
12 model = "Hardkernel ODROID-C1";
13 compatible = "hardkernel,odroid-c1", "amlogic,meson8b";
22 stdout-path = "serial0:115200n8";
30 emmc_pwrseq: emmc-pwrseq {
31 compatible = "mmc-pwrseq-emmc";
32 reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
36 compatible = "gpio-leds";
[all …]
Dmeson8b-ec100.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
22 stdout-path = "serial0:115200n8";
30 emmc_pwrseq: emmc-pwrseq {
31 compatible = "mmc-pwrseq-emmc";
32 reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
35 gpio-keys {
36 compatible = "gpio-keys-polled";
[all …]
/kernel/linux/linux-5.10/drivers/clk/ux500/
Du8500_of_clk.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Clock definitions for u8500 platform.
5 * Copyright (C) 2012 ST-Ericsson SA
11 #include <linux/clk-provider.h>
12 #include <linux/mfd/dbx500-prcmu.h>
35 if (clkspec->args_count != 2) in ux500_twocell_get()
36 return ERR_PTR(-EINVAL); in ux500_twocell_get()
38 base = clkspec->args[0]; in ux500_twocell_get()
39 bit = clkspec->args[1]; in ux500_twocell_get()
43 return ERR_PTR(-EINVAL); in ux500_twocell_get()
[all …]
/kernel/linux/linux-6.6/drivers/clk/ux500/
Du8500_of_clk.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Clock definitions for u8500 platform.
5 * Copyright (C) 2012 ST-Ericsson SA
11 #include <linux/clk-provider.h>
12 #include <linux/mfd/dbx500-prcmu.h>
16 #include "reset-prcc.h"
35 if (clkspec->args_count != 2) in ux500_twocell_get()
36 return ERR_PTR(-EINVAL); in ux500_twocell_get()
38 base = clkspec->args[0]; in ux500_twocell_get()
39 bit = clkspec->args[1]; in ux500_twocell_get()
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/mediatek/
Dmt7623.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2017-2018 MediaTek Inc.
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/clock/mt2701-clk.h>
13 #include <dt-bindings/pinctrl/mt7623-pinfunc.h>
14 #include <dt-bindings/power/mt2701-power.h>
15 #include <dt-bindings/gpio/gpio.h>
16 #include <dt-bindings/phy/phy.h>
17 #include <dt-bindings/reset/mt2701-resets.h>
[all …]
Dmt2701.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/clock/mt2701-clk.h>
9 #include <dt-bindings/phy/phy.h>
10 #include <dt-bindings/power/mt2701-power.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/memory/mt2701-larb-port.h>
14 #include <dt-bindings/reset/mt2701-resets.h>
15 #include "mt2701-pinfunc.h"
18 #address-cells = <2>;
[all …]
/kernel/linux/linux-5.10/drivers/clk/mediatek/
Dclk-mt8135.c1 // SPDX-License-Identifier: GPL-2.0-only
12 #include <dt-bindings/clock/mt8135-clk.h>
14 #include "clk-mtk.h"
15 #include "clk-gate.h"
249 "rtc32k",
535 clk_prepare_enable(clk_data->clks[CLK_TOP_CCI_SEL]); in mtk_topckgen_init()
539 pr_err("%s(): could not register clock provider: %d\n", in mtk_topckgen_init()
542 CLK_OF_DECLARE(mtk_topckgen, "mediatek,mt8135-topckgen", mtk_topckgen_init);
554 clk_prepare_enable(clk_data->clks[CLK_INFRA_M4U]); in mtk_infrasys_init()
558 pr_err("%s(): could not register clock provider: %d\n", in mtk_infrasys_init()
[all …]
Dclk-mt2701.c1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <linux/clk-provider.h>
13 #include "clk-mtk.h"
14 #include "clk-gate.h"
15 #include "clk-cpumux.h"
17 #include <dt-bindings/clock/mt2701-clk.h>
140 FACTOR(CLK_TOP_32K_EXTERNAL, "32k_external", "rtc32k", 1, 1),
670 struct device_node *node = pdev->dev.of_node; in mtk_topckgen_init()
673 base = devm_ioremap_resource(&pdev->dev, res); in mtk_topckgen_init()
679 return -ENOMEM; in mtk_topckgen_init()
[all …]
/kernel/linux/linux-6.6/drivers/clk/mediatek/
Dclk-mt8135.c1 // SPDX-License-Identifier: GPL-2.0-only
14 #include <dt-bindings/clock/mt8135-clk.h>
16 #include "clk-gate.h"
17 #include "clk-mtk.h"
18 #include "clk-pll.h"
251 "rtc32k",
548 { .compatible = "mediatek,mt8135-infracfg", .data = &infra_desc },
549 { .compatible = "mediatek,mt8135-pericfg", .data = &peri_desc },
550 { .compatible = "mediatek,mt8135-topckgen", .data = &topck_desc },
557 .name = "clk-mt8135",
Dclk-mt2701.c1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <linux/clk-provider.h>
11 #include "clk-cpumux.h"
12 #include "clk-gate.h"
13 #include "clk-mtk.h"
14 #include "clk-pll.h"
16 #include <dt-bindings/clock/mt2701-clk.h>
139 FACTOR(CLK_TOP_32K_EXTERNAL, "32k_external", "rtc32k", 1, 1),
663 struct device_node *node = pdev->dev.of_node; in mtk_topckgen_init()
671 return -ENOMEM; in mtk_topckgen_init()
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/st/
Dste-dbx5x0.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
6 #include <dt-bindings/interrupt-controller/irq.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/clock/ste-db8500-clkout.h>
9 #include <dt-bindings/reset/stericsson,db8500-prcc-reset.h>
10 #include <dt-bindings/mfd/dbx500-prcmu.h>
11 #include <dt-bindings/arm/ux500_pm_domains.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/thermal/thermal.h>
16 #address-cells = <1>;
[all …]