| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/net/ |
| D | nvidia,tegra234-mgbe.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/nvidia,tegra234-mgbe.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Tegra234 MGBE Multi-Gigabit Ethernet Controller
10 - Thierry Reding <treding@nvidia.com>
11 - Jon Hunter <jonathanh@nvidia.com>
15 const: nvidia,tegra234-mgbe
20 reg-names:
22 - const: hypervisor
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| /kernel/linux/linux-5.10/drivers/net/ethernet/freescale/dpaa2/ |
| D | dpaa2-mac.c | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
4 #include "dpaa2-eth.h"
5 #include "dpaa2-mac.h"
31 return -EINVAL; in phy_mode()
90 return (interface != mac->if_mode); in dpaa2_mac_phy_mode_mismatch()
103 if (state->interface != PHY_INTERFACE_MODE_NA && in dpaa2_mac_validate()
104 dpaa2_mac_phy_mode_mismatch(mac, state->interface)) { in dpaa2_mac_validate()
113 switch (state->interface) { in dpaa2_mac_validate()
118 if (state->interface == PHY_INTERFACE_MODE_10GBASER) in dpaa2_mac_validate()
138 linkmode_and(state->advertising, state->advertising, mask); in dpaa2_mac_validate()
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| /kernel/linux/linux-6.6/drivers/net/ethernet/freescale/dpaa2/ |
| D | dpaa2-mac.c | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
5 #include <linux/pcs-lynx.h>
9 #include "dpaa2-eth.h"
10 #include "dpaa2-mac.h"
23 if (mac->ver_major == ver_major) in dpaa2_mac_cmp_ver()
24 return mac->ver_minor - ver_minor; in dpaa2_mac_cmp_ver()
25 return mac->ver_major - ver_major; in dpaa2_mac_cmp_ver()
30 mac->features = 0; in dpaa2_mac_detect_features()
34 mac->features |= DPAA2_MAC_FEATURE_PROTOCOL_CHANGE; in dpaa2_mac_detect_features()
61 return -EINVAL; in phy_mode()
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| /kernel/linux/linux-6.6/include/uapi/linux/ |
| D | mdio.h | 1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
4 * Copyright 2006-2009 Solarflare Communications Inc.
25 #define MDIO_MMD_AN 7 /* Auto-Negotiation */
58 /* Media-dependent registers. */
59 #define MDIO_PMA_10GBT_SWAPPOL 130 /* 10GBASE-T pair swap & polarity */
60 #define MDIO_PMA_10GBT_TXPWR 131 /* 10GBASE-T TX power control */
61 #define MDIO_PMA_10GBT_SNR 133 /* 10GBASE-T SNR margin, lane A.
62 * Lanes B-D are numbered 134-136. */
63 #define MDIO_PMA_10GBR_FSRT_CSR 147 /* 10GBASE-R fast retrain status and control */
64 #define MDIO_PMA_10GBR_FECABLE 170 /* 10GBASE-R FEC ability */
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| /kernel/linux/linux-5.10/include/uapi/linux/ |
| D | mdio.h | 1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
4 * Copyright 2006-2009 Solarflare Communications Inc.
25 #define MDIO_MMD_AN 7 /* Auto-Negotiation */
57 /* Media-dependent registers. */
58 #define MDIO_PMA_10GBT_SWAPPOL 130 /* 10GBASE-T pair swap & polarity */
59 #define MDIO_PMA_10GBT_TXPWR 131 /* 10GBASE-T TX power control */
60 #define MDIO_PMA_10GBT_SNR 133 /* 10GBASE-T SNR margin, lane A.
61 * Lanes B-D are numbered 134-136. */
62 #define MDIO_PMA_10GBR_FECABLE 170 /* 10GBASE-R FEC ability */
63 #define MDIO_PCS_10GBX_STAT1 24 /* 10GBASE-X PCS status 1 */
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| /kernel/linux/linux-6.6/drivers/thunderbolt/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
14 Apple hardware or on PCs with Intel Falcon Ridge or newer.
16 To compile this driver a module, choose M here. The module will be
51 dongle that has TX/RX lines crossed, or by simply connecting a
55 To compile this driver a module, choose M here. The module will be
|
| /kernel/linux/linux-6.6/drivers/net/ethernet/freescale/fman/ |
| D | fman_memac.c | 1 // SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-or-later
3 * Copyright 2008 - 2015 Freescale Semiconductor Inc.
14 #include <linux/pcs-lynx.h>
24 #define CMD_CFG_REG_LOWP_RXETY 0x01000000 /* 07 Rx low power indication */
56 #define IF_MODE_MASK 0x00000003 /* 30-31 Mask on i/f mode bits */
57 #define IF_MODE_10G 0x00000000 /* 30-31 10G interface */
58 #define IF_MODE_MII 0x00000001 /* 30-31 MII interface */
59 #define IF_MODE_GMII 0x00000002 /* 30-31 GMII (1G) interface */
62 #define IF_MODE_RGMII_1000 0x00004000 /* 10 - 1000Mbps RGMII */
63 #define IF_MODE_RGMII_100 0x00000000 /* 00 - 100Mbps RGMII */
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| /kernel/linux/linux-6.6/drivers/net/ethernet/stmicro/stmmac/ |
| D | stmmac_ethtool.c | 1 // SPDX-License-Identifier: GPL-2.0-only
5 Copyright (C) 2007-2009 STMicroelectronics Ltd
44 #define STMMAC_STAT(m) \ argument
45 { #m, sizeof_field(struct stmmac_extra_stats, m), \
46 offsetof(struct stmmac_priv, xstats.m)}
79 /* Tx/Rx IRQ error info */
89 /* Tx/Rx IRQ Events */
129 /* PCS */
167 /* statistics collected in queue which will be summed up for all TX or RX
168 * queues, or summed up for both TX and RX queues(napi_poll, normal_irq_n).
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| /kernel/linux/linux-5.10/drivers/net/ethernet/stmicro/stmmac/ |
| D | stmmac_ethtool.c | 1 // SPDX-License-Identifier: GPL-2.0-only
5 Copyright (C) 2007-2009 STMicroelectronics Ltd
44 #define STMMAC_STAT(m) \ argument
45 { #m, sizeof_field(struct stmmac_extra_stats, m), \
46 offsetof(struct stmmac_priv, xstats.m)}
79 /* Tx/Rx IRQ error info */
89 /* Tx/Rx IRQ Events */
137 /* PCS */
173 #define STMMAC_MMC_STAT(m) \ argument
174 { #m, sizeof_field(struct stmmac_counters, m), \
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| /kernel/linux/linux-6.6/drivers/net/ethernet/sun/ |
| D | cassini.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */
29 /* cassini register map: 2M memory mapped in 32-bit memory space accessible as
30 * 32-bit words. there is no i/o port access. REG_ addresses are
42 * if rx weight == 1 and tx weight == 0, rx == 2x tx transfer credit
62 /* top level interrupts [0-9] are auto-cleared to 0 when the status
63 * register is read. second level interrupts [13 - 18] are cleared at
64 * the source. tx completion register 3 is replicated in [19 - 31]
81 from RX FIFO to host mem.
82 RX completion reg updated.
86 RX Kick == RX complete */
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| /kernel/linux/linux-5.10/drivers/net/ethernet/sun/ |
| D | cassini.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */
29 /* cassini register map: 2M memory mapped in 32-bit memory space accessible as
30 * 32-bit words. there is no i/o port access. REG_ addresses are
42 * if rx weight == 1 and tx weight == 0, rx == 2x tx transfer credit
62 /* top level interrupts [0-9] are auto-cleared to 0 when the status
63 * register is read. second level interrupts [13 - 18] are cleared at
64 * the source. tx completion register 3 is replicated in [19 - 31]
81 from RX FIFO to host mem.
82 RX completion reg updated.
86 RX Kick == RX complete */
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| /kernel/linux/linux-6.6/arch/arm64/boot/dts/nvidia/ |
| D | tegra234.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
3 #include <dt-bindings/clock/tegra234-clock.h>
4 #include <dt-bindings/gpio/tegra234-gpio.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/mailbox/tegra186-hsp.h>
7 #include <dt-bindings/memory/tegra234-mc.h>
8 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
9 #include <dt-bindings/power/tegra234-powergate.h>
10 #include <dt-bindings/reset/tegra234-reset.h>
11 #include <dt-bindings/thermal/tegra234-bpmp-thermal.h>
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| /kernel/linux/linux-6.6/drivers/net/ethernet/intel/igb/ |
| D | e1000_82575.c | 1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2007 - 2018 Intel Corporation. */
61 * igb_write_vfta_i350 - Write value to VLAN filter table
71 struct igb_adapter *adapter = hw->back; in igb_write_vfta_i350()
74 for (i = 10; i--;) in igb_write_vfta_i350()
78 adapter->shadow_vfta[offset] = value; in igb_write_vfta_i350()
82 * igb_sgmii_uses_mdio_82575 - Determine if I2C pins are for external MDIO
93 switch (hw->mac.type) { in igb_sgmii_uses_mdio_82575()
114 * igb_check_for_link_media_swap - Check which M88E1112 interface linked
121 struct e1000_phy_info *phy = &hw->phy; in igb_check_for_link_media_swap()
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| D | e1000_defines.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright(c) 2007 - 2018 Intel Corporation. */
62 /* Interrupt acknowledge Auto-mask */
118 #define E1000_MANC_SMBUS_EN 0x00000001 /* SMBus Enabled - RO */
119 #define E1000_MANC_ASF_EN 0x00000002 /* ASF Enabled - RO */
135 #define E1000_RCTL_RDMTS_HALF 0x00000000 /* rx desc min threshold size */
138 #define E1000_RCTL_SZ_512 0x00020000 /* rx buffer size 512 */
139 #define E1000_RCTL_SZ_256 0x00030000 /* rx buffer size 256 */
184 #define E1000_CTRL_ASDE 0x00000020 /* Auto-speed detect enable */
186 #define E1000_CTRL_ILOS 0x00000080 /* Invert Loss-Of Signal */
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| /kernel/linux/linux-5.10/drivers/net/ethernet/intel/igb/ |
| D | e1000_82575.c | 1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2007 - 2018 Intel Corporation. */
61 * igb_write_vfta_i350 - Write value to VLAN filter table
71 struct igb_adapter *adapter = hw->back; in igb_write_vfta_i350()
74 for (i = 10; i--;) in igb_write_vfta_i350()
78 adapter->shadow_vfta[offset] = value; in igb_write_vfta_i350()
82 * igb_sgmii_uses_mdio_82575 - Determine if I2C pins are for external MDIO
93 switch (hw->mac.type) { in igb_sgmii_uses_mdio_82575()
114 * igb_check_for_link_media_swap - Check which M88E1112 interface linked
121 struct e1000_phy_info *phy = &hw->phy; in igb_check_for_link_media_swap()
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| D | e1000_defines.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright(c) 2007 - 2018 Intel Corporation. */
62 /* Interrupt acknowledge Auto-mask */
118 #define E1000_MANC_SMBUS_EN 0x00000001 /* SMBus Enabled - RO */
119 #define E1000_MANC_ASF_EN 0x00000002 /* ASF Enabled - RO */
135 #define E1000_RCTL_RDMTS_HALF 0x00000000 /* rx desc min threshold size */
138 #define E1000_RCTL_SZ_512 0x00020000 /* rx buffer size 512 */
139 #define E1000_RCTL_SZ_256 0x00030000 /* rx buffer size 256 */
184 #define E1000_CTRL_ASDE 0x00000020 /* Auto-speed detect enable */
186 #define E1000_CTRL_ILOS 0x00000080 /* Invert Loss-Of Signal */
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| /kernel/linux/linux-5.10/drivers/phy/ti/ |
| D | phy-ti-pipe3.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * phy-ti-pipe3 - PIPE3 PHY driver.
5 * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com
130 u16 m; member
179 unsigned int pcie_pcs_reg; /* pcs reg. index in syscon */
215 /* DRA75x TRM Table 26-17 Preferred USB3_PHY_RX SCP Register Settings */
241 /* DRA75x TRM Table 26-9 Preferred SATA_PHY_RX SCP Register Settings */
266 /* DRA75x TRM Table 26-62 Preferred PCIe_PHY_RX SCP Register Settings */
302 struct pipe3_dpll_map *dpll_map = phy->dpll_map; in ti_pipe3_get_dpll_params()
304 rate = clk_get_rate(phy->sys_clk); in ti_pipe3_get_dpll_params()
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| /kernel/linux/linux-6.6/drivers/phy/ti/ |
| D | phy-ti-pipe3.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * phy-ti-pipe3 - PIPE3 PHY driver.
5 * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com
130 u16 m; member
179 unsigned int pcie_pcs_reg; /* pcs reg. index in syscon */
215 /* DRA75x TRM Table 26-17 Preferred USB3_PHY_RX SCP Register Settings */
241 /* DRA75x TRM Table 26-9 Preferred SATA_PHY_RX SCP Register Settings */
266 /* DRA75x TRM Table 26-62 Preferred PCIe_PHY_RX SCP Register Settings */
302 struct pipe3_dpll_map *dpll_map = phy->dpll_map; in ti_pipe3_get_dpll_params()
304 rate = clk_get_rate(phy->sys_clk); in ti_pipe3_get_dpll_params()
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| /kernel/linux/linux-5.10/drivers/net/ethernet/chelsio/cxgb/ |
| D | vsc7326_reg.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
8 * Straight off the data sheet, VMDS-10038 Rev 2.0 and
9 * PD0011-01-14-Meigs-II 2002-12-12
69 * fn = FIFO number, 0-9
84 * bn = bucket number 0-10 (yes, 11 buckets)
114 #define REG_SPI4_DBG_CNT(n) CRA(0x5,0x0,0x10+n) /* Debug counters 0-9 */
133 * tri-speed are only defined with the version that needs a port number.
140 /* 10GbE specific, and different from tri-speed */
144 #define REG_STICKY_RX CRA(0x1,0xa,0x06) /* RX debug register */
147 #define REG_MAX_RXHIGH CRA(0x1,0xa,0x0a) /* XGMII lane 0-3 debug */
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| /kernel/linux/linux-6.6/drivers/net/ethernet/chelsio/cxgb/ |
| D | vsc7326_reg.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
8 * Straight off the data sheet, VMDS-10038 Rev 2.0 and
9 * PD0011-01-14-Meigs-II 2002-12-12
69 * fn = FIFO number, 0-9
84 * bn = bucket number 0-10 (yes, 11 buckets)
114 #define REG_SPI4_DBG_CNT(n) CRA(0x5,0x0,0x10+n) /* Debug counters 0-9 */
133 * tri-speed are only defined with the version that needs a port number.
140 /* 10GbE specific, and different from tri-speed */
144 #define REG_STICKY_RX CRA(0x1,0xa,0x06) /* RX debug register */
147 #define REG_MAX_RXHIGH CRA(0x1,0xa,0x0a) /* XGMII lane 0-3 debug */
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| /kernel/linux/linux-5.10/drivers/net/ethernet/hisilicon/hns/ |
| D | hns_dsaf_gmac.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (c) 2014-2015 Hisilicon Limited.
65 /*enable GE rX/tX */ in hns_gmac_enable()
70 /* enable rx pcs */ in hns_gmac_enable()
80 /*disable GE rX/tX */ in hns_gmac_disable()
85 /* disable rx pcs */ in hns_gmac_disable()
91 /* hns_gmac_get_en - get port enable
93 * @rx:rx enable
96 static void hns_gmac_get_en(void *mac_drv, u32 *rx, u32 *tx) in hns_gmac_get_en() argument
103 *rx = dsaf_get_bit(porten, GMAC_PORT_RX_EN_B); in hns_gmac_get_en()
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| /kernel/linux/linux-6.6/drivers/net/ethernet/hisilicon/hns/ |
| D | hns_dsaf_gmac.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (c) 2014-2015 Hisilicon Limited.
65 /*enable GE rX/tX */ in hns_gmac_enable()
70 /* enable rx pcs */ in hns_gmac_enable()
80 /*disable GE rX/tX */ in hns_gmac_disable()
85 /* disable rx pcs */ in hns_gmac_disable()
91 /* hns_gmac_get_en - get port enable
93 * @rx:rx enable
96 static void hns_gmac_get_en(void *mac_drv, u32 *rx, u32 *tx) in hns_gmac_get_en() argument
103 *rx = dsaf_get_bit(porten, GMAC_PORT_RX_EN_B); in hns_gmac_get_en()
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| /kernel/linux/linux-5.10/Documentation/networking/device_drivers/ethernet/cirrus/ |
| D | cs89x0.rst | 1 .. SPDX-License-Identifier: GPL-2.0
33 2.1 CS8900-based Adapter Configuration
34 2.2 CS8920-based Adapter Configuration
41 4.3 Compiling the driver to support Rx DMA
46 5.2.1 Diagnostic Self-Test
66 The CS8900-based ISA Ethernet Adapters from Cirrus Logic follow
67 IEEE 802.3 standards and support half or full-duplex operation in ISA bus
69 in 16-bit ISA or EISA bus expansion slots and are available in
70 10BaseT-only or 3-media configurations (10BaseT, 10Base2, and AUI for 10Base-5
73 CS8920-based adapters are similar to the CS8900-based adapter with additional
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| /kernel/linux/linux-6.6/Documentation/networking/device_drivers/ethernet/cirrus/ |
| D | cs89x0.rst | 1 .. SPDX-License-Identifier: GPL-2.0
33 2.1 CS8900-based Adapter Configuration
34 2.2 CS8920-based Adapter Configuration
41 4.3 Compiling the driver to support Rx DMA
46 5.2.1 Diagnostic Self-Test
66 The CS8900-based ISA Ethernet Adapters from Cirrus Logic follow
67 IEEE 802.3 standards and support half or full-duplex operation in ISA bus
69 in 16-bit ISA or EISA bus expansion slots and are available in
70 10BaseT-only or 3-media configurations (10BaseT, 10Base2, and AUI for 10Base-5
73 CS8920-based adapters are similar to the CS8900-based adapter with additional
[all …]
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| /kernel/linux/linux-5.10/drivers/net/ethernet/freescale/fman/ |
| D | fman_memac.c | 2 * Copyright 2008-2015 Freescale Semiconductor Inc.
44 /* PCS registers */
80 #define CMD_CFG_REG_LOWP_RXETY 0x01000000 /* 07 Rx low power indication */
112 #define IF_MODE_MASK 0x00000003 /* 30-31 Mask on i/f mode bits */
113 #define IF_MODE_10G 0x00000000 /* 30-31 10G interface */
114 #define IF_MODE_GMII 0x00000002 /* 30-31 GMII (1G) interface */
117 #define IF_MODE_RGMII_1000 0x00004000 /* 10 - 1000Mbps RGMII */
118 #define IF_MODE_RGMII_100 0x00000000 /* 00 - 100Mbps RGMII */
119 #define IF_MODE_RGMII_10 0x00002000 /* 01 - 10Mbps RGMII */
126 /* 26-31 Hash table address code */
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