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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/spi/
Dsnps,dw-apb-ssi.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/spi/snps,dw-apb-ssi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Mark Brown <broonie@kernel.org>
13 - $ref: "spi-controller.yaml#"
14 - if:
19 - mscc,ocelot-spi
20 - mscc,jaguar2-spi
25 - if:
[all …]
Dspi-rockchip.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/spi/spi-rockchip.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
14 - $ref: "spi-controller.yaml#"
17 - Heiko Stuebner <heiko@sntech.de>
23 - const: rockchip,rk3036-spi
24 - const: rockchip,rk3066-spi
25 - const: rockchip,rk3228-spi
26 - const: rockchip,rv1108-spi
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/spi/
Dsnps,dw-apb-ssi.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/spi/snps,dw-apb-ssi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Mark Brown <broonie@kernel.org>
13 - $ref: spi-controller.yaml#
14 - if:
19 - mscc,ocelot-spi
20 - mscc,jaguar2-spi
25 - if:
[all …]
Dspi-peripheral-props.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/spi-peripheral-props.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Peripheral-specific properties for a SPI bus.
11 be common properties like spi-max-frequency, spi-cpha, etc. or they could be
12 controller specific like delay in clock or data lines, etc. These properties
13 need to be defined in the peripheral node because they are per-peripheral and
19 - Mark Brown <broonie@kernel.org>
27 - minimum: 0
[all …]
Dspi-rockchip.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/spi/spi-rockchip.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
14 - $ref: spi-controller.yaml#
17 - Heiko Stuebner <heiko@sntech.de>
23 - const: rockchip,rk3036-spi
24 - const: rockchip,rk3066-spi
25 - const: rockchip,rk3228-spi
26 - const: rockchip,rv1108-spi
[all …]
/kernel/linux/linux-6.6/drivers/spi/
Dspi-dw-core.c1 // SPDX-License-Identifier: GPL-2.0-only
9 #include <linux/dma-mapping.h>
14 #include <linux/delay.h>
17 #include <linux/spi/spi-mem.h>
21 #include "spi-dw.h"
30 u32 rx_sample_dly; /* RX sample delay */
64 snprintf(name, 32, "dw_spi%d", dws->host->bus_num); in dw_spi_debugfs_init()
65 dws->debugfs = debugfs_create_dir(name, NULL); in dw_spi_debugfs_init()
67 dws->regset.regs = dw_spi_dbgfs_regs; in dw_spi_debugfs_init()
68 dws->regset.nregs = ARRAY_SIZE(dw_spi_dbgfs_regs); in dw_spi_debugfs_init()
[all …]
Dspi-rockchip.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Author: Addy Ke <addy.ke@rock-chips.com>
18 #define DRIVER_NAME "rockchip-spi"
67 /* ss_n to sclk_out delay */
158 * SPI_CTRLR1 is 16-bits, so we should support lengths of 0xffff + 1. However,
163 /* 2 for native cs, 2 for cs-gpio */
181 void *rx; member
199 bool cs_high_supported; /* native CS supports active-high polarity */
206 writel_relaxed((enable ? 1U : 0U), rs->regs + ROCKCHIP_SPI_SSIENR); in spi_enable_chip()
215 if (!(readl_relaxed(rs->regs + ROCKCHIP_SPI_SR) & SR_TARGET_TX_BUSY) && in wait_for_tx_idle()
[all …]
/kernel/linux/linux-5.10/drivers/spi/
Dspi-dw-core.c1 // SPDX-License-Identifier: GPL-2.0-only
8 #include <linux/dma-mapping.h>
13 #include <linux/delay.h>
16 #include <linux/spi/spi-mem.h>
20 #include "spi-dw.h"
29 u32 rx_sample_dly; /* RX sample delay */
63 snprintf(name, 32, "dw_spi%d", dws->master->bus_num); in dw_spi_debugfs_init()
64 dws->debugfs = debugfs_create_dir(name, NULL); in dw_spi_debugfs_init()
65 if (!dws->debugfs) in dw_spi_debugfs_init()
66 return -ENOMEM; in dw_spi_debugfs_init()
[all …]
Dspi-rockchip.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Author: Addy Ke <addy.ke@rock-chips.com>
18 #define DRIVER_NAME "rockchip-spi"
67 /* ss_n to sclk_out delay */
154 * SPI_CTRLR1 is 16-bits, so we should support lengths of 0xffff + 1. However,
174 void *rx; member
195 writel_relaxed((enable ? 1U : 0U), rs->regs + ROCKCHIP_SPI_SSIENR); in spi_enable_chip()
203 if (!(readl_relaxed(rs->regs + ROCKCHIP_SPI_SR) & SR_BUSY)) in wait_for_idle()
207 dev_warn(rs->dev, "spi controller is in busy state!\n"); in wait_for_idle()
214 ver = readl_relaxed(rs->regs + ROCKCHIP_SPI_VERSION); in get_fifo_len()
[all …]
/kernel/linux/linux-5.10/drivers/iio/resolver/
Dad2s1200.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * Copyright (c) 2018-2018 David Veenstra <davidjulianveenstra@gmail.com>
7 * Copyright (c) 2010-2010 Analog Devices Inc.
11 #include <linux/delay.h>
32 * struct ad2s1200_state - driver instance specific data.
33 * @lock: protects both the GPIO pins and the rx buffer.
35 * @sample: GPIO pin SAMPLE.
37 * @rx: buffer for spi transfers.
42 struct gpio_desc *sample; member
44 __be16 rx ____cacheline_aligned;
[all …]
/kernel/linux/linux-6.6/drivers/iio/resolver/
Dad2s1200.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * Copyright (c) 2018-2018 David Veenstra <davidjulianveenstra@gmail.com>
7 * Copyright (c) 2010-2010 Analog Devices Inc.
11 #include <linux/delay.h>
32 * struct ad2s1200_state - driver instance specific data.
33 * @lock: protects both the GPIO pins and the rx buffer.
35 * @sample: GPIO pin SAMPLE.
37 * @rx: buffer for spi transfers.
42 struct gpio_desc *sample; member
44 __be16 rx __aligned(IIO_DMA_MINALIGN);
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/microchip/
Dsparx5_nand.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 cs14_pins: cs14-pins {
14 pinctrl-0 = <&si2_pins>;
15 pinctrl-names = "default";
17 compatible = "spi-mux";
18 mux-controls = <&mux>;
19 #address-cells = <1>;
20 #size-cells = <0>;
22 spi-flash@6 {
23 compatible = "spi-nand";
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/microchip/
Dsparx5_nand.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 cs14_pins: cs14-pins {
14 pinctrl-0 = <&si2_pins>;
15 pinctrl-names = "default";
17 compatible = "spi-mux";
18 mux-controls = <&mux>;
19 #address-cells = <1>;
20 #size-cells = <0>;
23 compatible = "spi-nand";
24 pinctrl-0 = <&cs14_pins>;
[all …]
/kernel/linux/linux-6.6/Documentation/networking/
Dpktgen.rst1 .. SPDX-License-Identifier: GPL-2.0
7 Enable CONFIG_NET_PKTGEN to compile and build pktgen either in-kernel
11 suitable sample script and configure that.
31 overload type of benchmarking, as this could hurt the normal use-case.
35 # ethtool -G ethX tx 1024
43 TX ring cause delay. Drivers usually delay cleaning up the
44 ring-buffers for various performance reasons, and packets stalling
48 (Intel 82599 chip). This driver (ixgbe) combines TX+RX ring cleanups,
49 and the cleanup interval is affected by the ethtool --coalesce setting
50 of parameter "rx-usecs".
[all …]
/kernel/linux/linux-5.10/drivers/net/phy/
Drealtek.c1 // SPDX-License-Identifier: GPL-2.0+
13 #include <linux/delay.h>
106 if (phydev->interrupts == PHY_INTERRUPT_ENABLED) in rtl8201_config_intr()
118 if (phydev->interrupts == PHY_INTERRUPT_ENABLED) in rtl8211b_config_intr()
131 if (phydev->interrupts == PHY_INTERRUPT_ENABLED) in rtl8211e_config_intr()
144 if (phydev->interrupts == PHY_INTERRUPT_ENABLED) in rtl8211f_config_intr()
163 if (phydev->speed == SPEED_100 && phydev->autoneg == AUTONEG_DISABLE) { in rtl8211_config_aneg()
183 struct device *dev = &phydev->mdio.dev; in rtl8211f_config_init()
191 switch (phydev->interface) { in rtl8211f_config_init()
212 default: /* the rest of the modes imply leaving delay as is. */ in rtl8211f_config_init()
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/rockchip/
Drk3288-veyron.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/clock/rockchip,rk808.h>
9 #include <dt-bindings/input/input.h>
18 stdout-path = "serial2:115200n8";
31 power_button: power-button {
32 compatible = "gpio-keys";
33 pinctrl-names = "default";
34 pinctrl-0 = <&pwr_key_l>;
36 key-power {
40 debounce-interval = <100>;
[all …]
Drv1108.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/interrupt-controller/irq.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/clock/rv1108-cru.h>
7 #include <dt-bindings/pinctrl/rockchip.h>
8 #include <dt-bindings/thermal/thermal.h>
10 #address-cells = <1>;
11 #size-cells = <1>;
15 interrupt-parent = <&gic>;
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Drk3288-veyron.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/clock/rockchip,rk808.h>
9 #include <dt-bindings/input/input.h>
14 stdout-path = "serial2:115200n8";
27 power_button: power-button {
28 compatible = "gpio-keys";
29 pinctrl-names = "default";
30 pinctrl-0 = <&pwr_key_l>;
36 debounce-interval = <100>;
37 wakeup-source;
[all …]
Dsun8i-a83t.dtsi6 * This file is dual-licensed: you can use it either under the terms
45 #include <dt-bindings/interrupt-controller/arm-gic.h>
47 #include <dt-bindings/clock/sun8i-a83t-ccu.h>
48 #include <dt-bindings/clock/sun8i-de2.h>
49 #include <dt-bindings/clock/sun8i-r-ccu.h>
50 #include <dt-bindings/reset/sun8i-a83t-ccu.h>
51 #include <dt-bindings/reset/sun8i-de2.h>
52 #include <dt-bindings/reset/sun8i-r-ccu.h>
53 #include <dt-bindings/thermal/thermal.h>
56 interrupt-parent = <&gic>;
[all …]
Drv1108.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/interrupt-controller/irq.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/clock/rv1108-cru.h>
7 #include <dt-bindings/pinctrl/rockchip.h>
8 #include <dt-bindings/thermal/thermal.h>
10 #address-cells = <1>;
11 #size-cells = <1>;
15 interrupt-parent = <&gic>;
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/st/
Dstm32mp157c-phycore-stm32mp15-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) 2022-2023 Steffen Trumtrar <kernel@pengutronix.de>
4 * Copyright (C) Phytec GmbH 2019-2020 - All Rights Reserved
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/leds/common.h>
13 #include <dt-bindings/leds/leds-pca9532.h>
14 #include <dt-bindings/mfd/st,stpmic1.h>
[all …]
/kernel/linux/linux-6.6/drivers/net/phy/
Drealtek.c1 // SPDX-License-Identifier: GPL-2.0+
14 #include <linux/delay.h>
99 struct device *dev = &phydev->mdio.dev; in rtl821x_probe()
101 u32 phy_id = phydev->drv->phy_id; in rtl821x_probe()
106 return -ENOMEM; in rtl821x_probe()
108 priv->clk = devm_clk_get_optional_enabled(dev, NULL); in rtl821x_probe()
109 if (IS_ERR(priv->clk)) in rtl821x_probe()
110 return dev_err_probe(dev, PTR_ERR(priv->clk), in rtl821x_probe()
117 priv->phycr1 = ret & (RTL8211F_ALDPS_PLL_OFF | RTL8211F_ALDPS_ENABLE | RTL8211F_ALDPS_XTAL_OFF); in rtl821x_probe()
118 if (of_property_read_bool(dev->of_node, "realtek,aldps-enable")) in rtl821x_probe()
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/allwinner/
Dsun8i-a83t.dtsi6 * This file is dual-licensed: you can use it either under the terms
45 #include <dt-bindings/interrupt-controller/arm-gic.h>
47 #include <dt-bindings/clock/sun8i-a83t-ccu.h>
48 #include <dt-bindings/clock/sun8i-de2.h>
49 #include <dt-bindings/clock/sun8i-r-ccu.h>
50 #include <dt-bindings/reset/sun8i-a83t-ccu.h>
51 #include <dt-bindings/reset/sun8i-de2.h>
52 #include <dt-bindings/reset/sun8i-r-ccu.h>
53 #include <dt-bindings/thermal/thermal.h>
56 interrupt-parent = <&gic>;
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/microchip/
Dsama7g5.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * sama7g5.dtsi - Device Tree Include file for SAMA7G5 family SoC
12 #include <dt-bindings/iio/adc/at91-sama5d2_adc.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
14 #include <dt-bindings/interrupt-controller/arm-gic.h>
15 #include <dt-bindings/clock/at91.h>
16 #include <dt-bindings/dma/at91.h>
17 #include <dt-bindings/gpio/gpio.h>
18 #include <dt-bindings/mfd/at91-usart.h>
19 #include <dt-bindings/nvmem/microchip,sama7g5-otpc.h>
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/rockchip/
Drk3328.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/rk3328-cru.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/pinctrl/rockchip.h>
11 #include <dt-bindings/power/rk3328-power.h>
12 #include <dt-bindings/soc/rockchip,boot-mode.h>
13 #include <dt-bindings/thermal/thermal.h>
18 interrupt-parent = <&gic>;
[all …]

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