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3 DWC3- USB3 CONTROLLER. Complies to the generic USB binding properties7 - compatible: must be "snps,dwc3"8 - reg : Address and length of the register set for the device9 - interrupts: Interrupts used by the dwc3 controller.10 - clock-names: list of clock names. Ideally should be "ref",12 - clocks: list of phandle and clock specifier pairs corresponding to13 entries in the clock-names property.16 clocks are optional if the parent node (i.e. glue-layer) is compatible to18 "cavium,octeon-7130-usb-uctl"20 "samsung,exynos5250-dwusb3"[all …]
1 # SPDX-License-Identifier: GPL-2.03 ---5 $schema: http://devicetree.org/meta-schemas/core.yaml#10 - Felipe Balbi <balbi@kernel.org>14 be presented as a standalone DT node with an optional vendor-specific18 - $ref: usb-drd.yaml#19 - if:25 - dr_mode29 $ref: usb-xhci.yaml#35 - const: snps,dwc3[all …]
1 // SPDX-License-Identifier: GPL-2.03 * core.c - DesignWare USB3 DRD Controller Core file5 * Copyright (C) 2010-2011 Texas Instruments Incorporated - https://www.ti.com24 #include <linux/dma-mapping.h>46 * dwc3_get_dr_mode - Validates and sets dr_mode52 struct device *dev = dwc->dev; in dwc3_get_dr_mode()55 if (dwc->dr_mode == USB_DR_MODE_UNKNOWN) in dwc3_get_dr_mode()56 dwc->dr_mode = USB_DR_MODE_OTG; in dwc3_get_dr_mode()58 mode = dwc->dr_mode; in dwc3_get_dr_mode()59 hw_mode = DWC3_GHWPARAMS0_MODE(dwc->hwparams.hwparams0); in dwc3_get_dr_mode()[all …]
1 // SPDX-License-Identifier: GPL-2.03 * core.c - DesignWare USB3 DRD Controller Core file5 * Copyright (C) 2010-2011 Texas Instruments Incorporated - https://www.ti.com24 #include <linux/dma-mapping.h>44 * dwc3_get_dr_mode - Validates and sets dr_mode50 struct device *dev = dwc->dev; in dwc3_get_dr_mode()53 if (dwc->dr_mode == USB_DR_MODE_UNKNOWN) in dwc3_get_dr_mode()54 dwc->dr_mode = USB_DR_MODE_OTG; in dwc3_get_dr_mode()56 mode = dwc->dr_mode; in dwc3_get_dr_mode()57 hw_mode = DWC3_GHWPARAMS0_MODE(dwc->hwparams.hwparams0); in dwc3_get_dr_mode()[all …]