| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/iio/adc/ |
| D | rockchip-saradc.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/iio/adc/rockchip-saradc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Heiko Stuebner <heiko@sntech.de> 15 - const: rockchip,saradc 16 - const: rockchip,rk3066-tsadc 17 - const: rockchip,rk3399-saradc 18 - const: rockchip,rk3588-saradc 19 - items: [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/iio/adc/ |
| D | rockchip-saradc.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/iio/adc/rockchip-saradc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Heiko Stuebner <heiko@sntech.de> 15 - const: rockchip,saradc 16 - const: rockchip,rk3066-tsadc 17 - const: rockchip,rk3399-saradc 18 - items: 19 - enum: [all …]
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | rk3xxx.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 #include <dt-bindings/interrupt-controller/irq.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/soc/rockchip,boot-mode.h> 12 #address-cells = <1>; 13 #size-cells = <1>; 15 interrupt-parent = <&gic>; 36 compatible = "simple-bus"; 37 #address-cells = <1>; 38 #size-cells = <1>; [all …]
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| D | rk3066a.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/pinctrl/rockchip.h> 9 #include <dt-bindings/clock/rk3066a-cru.h> 10 #include <dt-bindings/power/rk3066-power.h> 17 #address-cells = <1>; 18 #size-cells = <0>; 19 enable-method = "rockchip,rk3066-smp"; 23 compatible = "arm,cortex-a9"; 24 next-level-cache = <&L2>; [all …]
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| D | rv1108.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 #include <dt-bindings/gpio/gpio.h> 4 #include <dt-bindings/interrupt-controller/irq.h> 5 #include <dt-bindings/interrupt-controller/arm-gic.h> 6 #include <dt-bindings/clock/rv1108-cru.h> 7 #include <dt-bindings/pinctrl/rockchip.h> 8 #include <dt-bindings/thermal/thermal.h> 10 #address-cells = <1>; 11 #size-cells = <1>; 15 interrupt-parent = <&gic>; [all …]
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| D | rk3288.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 #include <dt-bindings/gpio/gpio.h> 4 #include <dt-bindings/interrupt-controller/irq.h> 5 #include <dt-bindings/interrupt-controller/arm-gic.h> 6 #include <dt-bindings/pinctrl/rockchip.h> 7 #include <dt-bindings/clock/rk3288-cru.h> 8 #include <dt-bindings/power/rk3288-power.h> 9 #include <dt-bindings/thermal/thermal.h> 10 #include <dt-bindings/soc/rockchip,boot-mode.h> 13 #address-cells = <2>; [all …]
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| D | meson8b.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 OR MIT 7 #include <dt-bindings/clock/meson8-ddr-clkc.h> 8 #include <dt-bindings/clock/meson8b-clkc.h> 9 #include <dt-bindings/gpio/meson8b-gpio.h> 10 #include <dt-bindings/power/meson8-power.h> 11 #include <dt-bindings/reset/amlogic,meson8b-reset.h> 12 #include <dt-bindings/reset/amlogic,meson8b-clkc-reset.h> 17 #address-cells = <1>; 18 #size-cells = <0>; 22 compatible = "arm,cortex-a5"; [all …]
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| /kernel/linux/linux-6.6/arch/arm/boot/dts/rockchip/ |
| D | rk3xxx.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 #include <dt-bindings/interrupt-controller/irq.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/soc/rockchip,boot-mode.h> 12 #address-cells = <1>; 13 #size-cells = <1>; 15 interrupt-parent = <&gic>; 33 compatible = "fixed-clock"; 34 clock-frequency = <24000000>; 35 #clock-cells = <0>; [all …]
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| D | rv1126.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/rockchip,rv1126-cru.h> 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include <dt-bindings/pinctrl/rockchip.h> 11 #include <dt-bindings/power/rockchip,rv1126-power.h> 12 #include <dt-bindings/soc/rockchip,boot-mode.h> 15 #address-cells = <1>; 16 #size-cells = <1>; [all …]
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| D | rk3128.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 6 #include <dt-bindings/clock/rk3128-cru.h> 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include <dt-bindings/pinctrl/rockchip.h> 14 interrupt-parent = <&gic>; 15 #address-cells = <1>; 16 #size-cells = <1>; 18 arm-pmu { [all …]
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| D | rk3066a.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/pinctrl/rockchip.h> 9 #include <dt-bindings/clock/rk3066a-cru.h> 10 #include <dt-bindings/power/rk3066-power.h> 17 #address-cells = <1>; 18 #size-cells = <0>; 19 enable-method = "rockchip,rk3066-smp"; 23 compatible = "arm,cortex-a9"; 24 next-level-cache = <&L2>; [all …]
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| D | rv1108.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 #include <dt-bindings/gpio/gpio.h> 4 #include <dt-bindings/interrupt-controller/irq.h> 5 #include <dt-bindings/interrupt-controller/arm-gic.h> 6 #include <dt-bindings/clock/rv1108-cru.h> 7 #include <dt-bindings/pinctrl/rockchip.h> 8 #include <dt-bindings/thermal/thermal.h> 10 #address-cells = <1>; 11 #size-cells = <1>; 15 interrupt-parent = <&gic>; [all …]
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| D | rk3288.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 #include <dt-bindings/gpio/gpio.h> 4 #include <dt-bindings/interrupt-controller/irq.h> 5 #include <dt-bindings/interrupt-controller/arm-gic.h> 6 #include <dt-bindings/pinctrl/rockchip.h> 7 #include <dt-bindings/clock/rk3288-cru.h> 8 #include <dt-bindings/power/rk3288-power.h> 9 #include <dt-bindings/thermal/thermal.h> 10 #include <dt-bindings/soc/rockchip,boot-mode.h> 13 #address-cells = <2>; [all …]
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| /kernel/linux/linux-6.6/drivers/iio/adc/ |
| D | rockchip_saradc.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 89 writel_relaxed(8, info->regs + SARADC_DLY_PU_SOC); in rockchip_saradc_start_v1() 92 SARADC_CTRL_IRQ_ENABLE, info->regs + SARADC_CTRL); in rockchip_saradc_start_v1() 99 if (info->reset) in rockchip_saradc_start_v2() 100 rockchip_saradc_reset_controller(info->reset); in rockchip_saradc_start_v2() 102 writel_relaxed(0xc, info->regs + SARADC_T_DAS_SOC); in rockchip_saradc_start_v2() 103 writel_relaxed(0x20, info->regs + SARADC_T_PD_SOC); in rockchip_saradc_start_v2() 106 writel_relaxed(val, info->regs + SARADC2_END_INT_EN); in rockchip_saradc_start_v2() 111 writel(val, info->regs + SARADC2_CONV_CON); in rockchip_saradc_start_v2() 116 info->data->start(info, chn); in rockchip_saradc_start() [all …]
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| /kernel/linux/linux-5.10/arch/arm64/boot/dts/amlogic/ |
| D | meson-gxm.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 #include "meson-gxl.dtsi" 10 compatible = "amlogic,meson-gxm"; 13 cpu-map { 47 compatible = "arm,cortex-a53"; 49 enable-method = "psci"; 50 next-level-cache = <&l2>; 52 #cooling-cells = <2>; 57 compatible = "arm,cortex-a53"; 59 enable-method = "psci"; [all …]
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| /kernel/linux/linux-6.6/arch/arm64/boot/dts/amlogic/ |
| D | meson-gxm.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 #include "meson-gxl.dtsi" 10 compatible = "amlogic,meson-gxm"; 13 cpu-map { 46 capacity-dmips-mhz = <1024>; 50 capacity-dmips-mhz = <1024>; 54 capacity-dmips-mhz = <1024>; 58 capacity-dmips-mhz = <1024>; 63 compatible = "arm,cortex-a53"; 65 enable-method = "psci"; [all …]
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| /kernel/linux/linux-5.10/drivers/iio/adc/ |
| D | rockchip_saradc.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 61 writel_relaxed(0, info->regs + SARADC_CTRL); in rockchip_saradc_power_down() 67 reinit_completion(&info->completion); in rockchip_saradc_conversion() 70 writel_relaxed(8, info->regs + SARADC_DLY_PU_SOC); in rockchip_saradc_conversion() 72 info->last_chan = chan; in rockchip_saradc_conversion() 76 | (chan->channel & SARADC_CTRL_CHN_MASK) in rockchip_saradc_conversion() 78 info->regs + SARADC_CTRL); in rockchip_saradc_conversion() 80 if (!wait_for_completion_timeout(&info->completion, SARADC_TIMEOUT)) in rockchip_saradc_conversion() 81 return -ETIMEDOUT; in rockchip_saradc_conversion() 95 mutex_lock(&indio_dev->mlock); in rockchip_saradc_read_raw() [all …]
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| /kernel/linux/linux-5.10/arch/arm64/boot/dts/rockchip/ |
| D | rk3368.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/rk3368-cru.h> 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/interrupt-controller/irq.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/pinctrl/rockchip.h> 11 #include <dt-bindings/soc/rockchip,boot-mode.h> 12 #include <dt-bindings/thermal/thermal.h> 16 interrupt-parent = <&gic>; 17 #address-cells = <2>; [all …]
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| D | rk3308.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 #include <dt-bindings/clock/rk3308-cru.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 11 #include <dt-bindings/pinctrl/rockchip.h> 12 #include <dt-bindings/soc/rockchip,boot-mode.h> 13 #include <dt-bindings/thermal/thermal.h> 18 interrupt-parent = <&gic>; 19 #address-cells = <2>; [all …]
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| D | px30.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/px30-cru.h> 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include <dt-bindings/pinctrl/rockchip.h> 11 #include <dt-bindings/power/px30-power.h> 12 #include <dt-bindings/soc/rockchip,boot-mode.h> 13 #include <dt-bindings/thermal/thermal.h> 18 interrupt-parent = <&gic>; [all …]
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| /kernel/linux/linux-6.6/arch/arm64/boot/dts/rockchip/ |
| D | rk356x.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/rk3568-cru.h> 7 #include <dt-bindings/interrupt-controller/arm-gic.h> 8 #include <dt-bindings/interrupt-controller/irq.h> 9 #include <dt-bindings/phy/phy.h> 10 #include <dt-bindings/pinctrl/rockchip.h> 11 #include <dt-bindings/power/rk3568-power.h> 12 #include <dt-bindings/soc/rockchip,boot-mode.h> 13 #include <dt-bindings/thermal/thermal.h> 16 interrupt-parent = <&gic>; [all …]
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| D | rk3368.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/rk3368-cru.h> 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/interrupt-controller/irq.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/pinctrl/rockchip.h> 11 #include <dt-bindings/power/rk3368-power.h> 12 #include <dt-bindings/soc/rockchip,boot-mode.h> 13 #include <dt-bindings/thermal/thermal.h> 17 interrupt-parent = <&gic>; [all …]
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| D | rk3308.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 #include <dt-bindings/clock/rk3308-cru.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 11 #include <dt-bindings/pinctrl/rockchip.h> 12 #include <dt-bindings/soc/rockchip,boot-mode.h> 13 #include <dt-bindings/thermal/thermal.h> 18 interrupt-parent = <&gic>; 19 #address-cells = <2>; [all …]
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| D | px30.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/px30-cru.h> 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include <dt-bindings/pinctrl/rockchip.h> 11 #include <dt-bindings/power/px30-power.h> 12 #include <dt-bindings/soc/rockchip,boot-mode.h> 13 #include <dt-bindings/thermal/thermal.h> 18 interrupt-parent = <&gic>; [all …]
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| D | rk3588s.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/rockchip,rk3588-cru.h> 7 #include <dt-bindings/interrupt-controller/arm-gic.h> 8 #include <dt-bindings/interrupt-controller/irq.h> 9 #include <dt-bindings/power/rk3588-power.h> 10 #include <dt-bindings/reset/rockchip,rk3588-cru.h> 11 #include <dt-bindings/phy/phy.h> 12 #include <dt-bindings/ata/ahci.h> 17 interrupt-parent = <&gic>; 18 #address-cells = <2>; [all …]
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