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/kernel/linux/linux-6.6/drivers/reset/
Dreset-ti-sci.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Texas Instrument's System Control Interface (TI-SCI) reset driver
5 * Copyright (C) 2015-2017 Texas Instruments Incorporated - https://www.ti.com/
14 #include <linux/reset-controller.h>
18 * struct ti_sci_reset_control - reset control structure
19 * @dev_id: SoC-specific device identifier
20 * @reset_mask: reset mask to use for toggling reset
21 * @lock: synchronize reset_mask read-modify-writes
30 * struct ti_sci_reset_data - reset controller information structure
31 * @rcdev: reset controller entity
[all …]
/kernel/linux/linux-5.10/drivers/reset/
Dreset-ti-sci.c2 * Texas Instrument's System Control Interface (TI-SCI) reset driver
4 * Copyright (C) 2015-2017 Texas Instruments Incorporated - https://www.ti.com/
22 #include <linux/reset-controller.h>
26 * struct ti_sci_reset_control - reset control structure
27 * @dev_id: SoC-specific device identifier
28 * @reset_mask: reset mask to use for toggling reset
29 * @lock: synchronize reset_mask read-modify-writes
38 * struct ti_sci_reset_data - reset controller information structure
39 * @rcdev: reset controller entity
40 * @dev: reset controller device pointer
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/reset/
Dti,sci-reset.txt1 Texas Instruments System Control Interface (TI-SCI) Reset Controller
8 through a protocol called TI System Control Interface (TI-SCI protocol).
9 For TI SCI details, please refer to the document,
10 Documentation/devicetree/bindings/arm/keystone/ti,sci.txt
12 TI-SCI Reset Controller Node
14 This reset controller node uses the TI SCI protocol to perform the reset
16 node of the associated TI-SCI system controller node.
19 --------------------
20 - compatible : Should be "ti,sci-reset"
21 - #reset-cells : Should be 2. Please see the reset consumer node below for
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/arm/keystone/
Dti,sci.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/arm/keystone/ti,sci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: TI-SCI controller
10 - Nishanth Menon <nm@ti.com>
25 The TI-SCI node describes the Texas Instrument's System Controller entity node.
27 specific functionality such as clocks, power domain, reset or additional
29 relationship between the TI-SCI parent node to the child node.
33 pattern: "^system-controller@[0-9a-f]+$"
[all …]
Dti,k3-sci-common.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/arm/keystone/ti,k3-sci-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Common K3 TI-SCI
10 - Nishanth Menon <nm@ti.com>
14 that is responsible for managing various SoC-level resources like clocks,
16 through the TI-SCI protocol.
18 Each specific device management node like a clock controller node, a reset
19 controller node or an interrupt-controller node should define a common set
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/reset/
Dti,sci-reset.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/reset/ti,sci-reset.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: TI-SCI reset controller
10 - Nishanth Menon <nm@ti.com>
17 through a protocol called TI System Control Interface (TI-SCI protocol).
19 This reset controller node uses the TI SCI protocol to perform the reset
21 node of the associated TI-SCI system controller node.
25 pattern: "^reset-controller$"
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/ti/
Dk3-am65-wakeup.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2016-2018 Texas Instruments Incorporated - https://www.ti.com/
10 compatible = "ti,am654-sci";
11 ti,host-id = <12>;
12 #address-cells = <1>;
13 #size-cells = <1>;
16 mbox-names = "rx", "tx";
21 k3_pds: power-controller {
22 compatible = "ti,sci-pm-domain";
23 #power-domain-cells = <2>;
[all …]
Dk3-j7200-mcu-wakeup.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2020 Texas Instruments Incorporated - https://www.ti.com/
10 compatible = "ti,k2g-sci";
11 ti,host-id = <12>;
13 mbox-names = "rx", "tx";
18 reg-names = "debug_messages";
21 k3_pds: power-controller {
22 compatible = "ti,sci-pm-domain";
23 #power-domain-cells = <2>;
27 compatible = "ti,k2g-sci-clk";
[all …]
Dk3-j721e-mcu-wakeup.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2016-2019 Texas Instruments Incorporated - https://www.ti.com/
10 compatible = "ti,k2g-sci";
11 ti,host-id = <12>;
13 mbox-names = "rx", "tx";
18 reg-names = "debug_messages";
21 k3_pds: power-controller {
22 compatible = "ti,sci-pm-domain";
23 #power-domain-cells = <2>;
27 compatible = "ti,k2g-sci-clk";
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/ti/
Dk3-am65-wakeup.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2016-2018 Texas Instruments Incorporated - https://www.ti.com/
9 dmsc: system-controller@44083000 {
10 compatible = "ti,am654-sci";
11 ti,host-id = <12>;
13 mbox-names = "rx", "tx";
18 reg-names = "debug_messages";
21 k3_pds: power-controller {
22 compatible = "ti,sci-pm-domain";
23 #power-domain-cells = <2>;
[all …]
Dk3-am62p-main.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 * Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/
9 compatible = "mmio-sram";
11 #address-cells = <1>;
12 #size-cells = <1>;
16 gic500: interrupt-controller@1800000 {
17 compatible = "arm,gic-v3";
18 #address-cells = <2>;
19 #size-cells = <2>;
21 #interrupt-cells = <3>;
[all …]
Dk3-j7200-mcu-wakeup.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/
9 dmsc: system-controller@44083000 {
10 compatible = "ti,k2g-sci";
11 ti,host-id = <12>;
13 mbox-names = "rx", "tx";
18 reg-names = "debug_messages";
21 k3_pds: power-controller {
22 compatible = "ti,sci-pm-domain";
23 #power-domain-cells = <2>;
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/arm/keystone/
Dti,k3-sci-common.yaml1 # SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/arm/keystone/ti,k3-sci-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Common K3 TI-SCI bindings
10 - Nishanth Menon <nm@ti.com>
14 that is responsible for managing various SoC-level resources like clocks,
16 through the TI-SCI protocol.
18 Each specific device management node like a clock controller node, a reset
19 controller node or an interrupt-controller node should define a common set
[all …]
Dti,sci.txt1 Texas Instruments System Control Interface (TI-SCI) Message Protocol
2 --------------------------------------------------------------------
16 TI-SCI controller Device Node:
19 The TI-SCI node describes the Texas Instrument's System Controller entity node.
21 specific functionality such as clocks, power domain, reset or additional
23 relationship between the TI-SCI parent node to the child node.
26 -------------------
27 - compatible: should be "ti,k2g-sci" for TI 66AK2G SoC
28 should be "ti,am654-sci" for for TI AM654 SoC
29 - mbox-names:
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/remoteproc/
Dti,k3-dsp-rproc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/ti,k3-dsp-rproc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Suman Anna <s-anna@ti.com>
13 The TI K3 family of SoCs usually have one or more TI DSP Core sub-systems
14 that are used to offload some of the processor-intensive tasks or algorithms,
17 These processor sub-systems usually contain additional sub-modules like
23 Each DSP Core sub-system is represented as a single DT node. Each node has a
29 - $ref: /schemas/arm/keystone/ti,k3-sci-common.yaml#
[all …]
Dti,k3-r5f-rproc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/ti,k3-r5f-rproc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Suman Anna <s-anna@ti.com>
13 The TI K3 family of SoCs usually have one or more dual-core Arm Cortex R5F
20 Each Dual-Core R5F sub-system is represented as a single DTS node
33 - ti,am654-r5fss
34 - ti,j721e-r5fss
36 power-domains:
[all …]
/kernel/linux/linux-5.10/drivers/remoteproc/
Dti_k3_dsp_remoteproc.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2018-2020 Texas Instruments Incorporated - https://www.ti.com/
6 * Suman Anna <s-anna@ti.com>
14 #include <linux/omap-mailbox.h>
17 #include <linux/reset.h>
24 #define KEYSTONE_RPROC_LOCAL_ADDRESS_MASK (SZ_16M - 1)
27 * struct k3_dsp_mem - internal memory structure
41 * struct k3_dsp_mem_data - memory definitions for a DSP
51 * struct k3_dsp_dev_data - device data structure for a DSP
55 * @uses_lreset: flag to denote the need for local reset management
[all …]
Dti_k3_r5_remoteproc.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2017-2020 Texas Instruments Incorporated - https://www.ti.com/
6 * Suman Anna <s-anna@ti.com>
9 #include <linux/dma-mapping.h>
18 #include <linux/omap-mailbox.h>
22 #include <linux/reset.h>
32 /* R5 TI-SCI Processor Configuration Flags */
42 /* R5 TI-SCI Processor Control Flags */
45 /* R5 TI-SCI Processor Status Flags */
52 * struct k3_r5_mem - internal memory structure
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/remoteproc/
Dti,k3-dsp-rproc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/ti,k3-dsp-rproc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Suman Anna <s-anna@ti.com>
13 The TI K3 family of SoCs usually have one or more TI DSP Core sub-systems
14 that are used to offload some of the processor-intensive tasks or algorithms,
17 These processor sub-systems usually contain additional sub-modules like
23 Each DSP Core sub-system is represented as a single DT node. Each node has a
29 - $ref: /schemas/arm/keystone/ti,k3-sci-common.yaml#
[all …]
Dti,k3-r5f-rproc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/ti,k3-r5f-rproc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Suman Anna <s-anna@ti.com>
13 The TI K3 family of SoCs usually have one or more dual-core Arm Cortex R5F
20 AM64x SoCs do not support LockStep mode, but rather a new non-safety mode
21 called "Single-CPU" mode, where only Core0 is used, but with ability to use
27 Each Dual-Core R5F sub-system is represented as a single DTS node
40 - ti,am62-r5fss
[all …]
/kernel/linux/linux-6.6/drivers/remoteproc/
Dti_k3_dsp_remoteproc.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2018-2022 Texas Instruments Incorporated - https://www.ti.com/
6 * Suman Anna <s-anna@ti.com>
14 #include <linux/omap-mailbox.h>
17 #include <linux/reset.h>
24 #define KEYSTONE_RPROC_LOCAL_ADDRESS_MASK (SZ_16M - 1)
27 * struct k3_dsp_mem - internal memory structure
41 * struct k3_dsp_mem_data - memory definitions for a DSP
51 * struct k3_dsp_dev_data - device data structure for a DSP
55 * @uses_lreset: flag to denote the need for local reset management
[all …]
/kernel/linux/linux-6.6/arch/sh/kernel/cpu/sh2a/
Dclock-sh7264.c1 // SPDX-License-Identifier: GPL-2.0
3 * arch/sh/kernel/cpu/sh2a/clock-sh7264.c
34 * Default rate for the root input clock, reset this with clk_set_rate()
43 unsigned long rate = clk->parent->rate / pll1_div; in pll_recalc()
115 CLKDEV_ICK_ID("fck", "sh-sci.0", &mstp_clks[MSTP77]),
116 CLKDEV_ICK_ID("fck", "sh-sci.1", &mstp_clks[MSTP77]),
117 CLKDEV_ICK_ID("fck", "sh-sci.2", &mstp_clks[MSTP77]),
118 CLKDEV_ICK_ID("fck", "sh-sci.3", &mstp_clks[MSTP77]),
119 CLKDEV_ICK_ID("fck", "sh-sci.4", &mstp_clks[MSTP77]),
120 CLKDEV_ICK_ID("fck", "sh-sci.5", &mstp_clks[MSTP77]),
[all …]
Dclock-sh7269.c1 // SPDX-License-Identifier: GPL-2.0
3 * arch/sh/kernel/cpu/sh2a/clock-sh7269.c
31 * Default rate for the root input clock, reset this with clk_set_rate()
40 return clk->parent->rate * PLL_RATE; in pll_recalc()
55 return clk->parent->rate / 8; in peripheral0_recalc()
70 return clk->parent->rate / 4; in peripheral1_recalc()
150 CLKDEV_ICK_ID("fck", "sh-sci.0", &mstp_clks[MSTP47]),
151 CLKDEV_ICK_ID("fck", "sh-sci.1", &mstp_clks[MSTP46]),
152 CLKDEV_ICK_ID("fck", "sh-sci.2", &mstp_clks[MSTP45]),
153 CLKDEV_ICK_ID("fck", "sh-sci.3", &mstp_clks[MSTP44]),
[all …]
/kernel/linux/linux-5.10/arch/sh/kernel/cpu/sh2a/
Dclock-sh7264.c1 // SPDX-License-Identifier: GPL-2.0
3 * arch/sh/kernel/cpu/sh2a/clock-sh7264.c
34 * Default rate for the root input clock, reset this with clk_set_rate()
43 unsigned long rate = clk->parent->rate / pll1_div; in pll_recalc()
115 CLKDEV_ICK_ID("fck", "sh-sci.0", &mstp_clks[MSTP77]),
116 CLKDEV_ICK_ID("fck", "sh-sci.1", &mstp_clks[MSTP77]),
117 CLKDEV_ICK_ID("fck", "sh-sci.2", &mstp_clks[MSTP77]),
118 CLKDEV_ICK_ID("fck", "sh-sci.3", &mstp_clks[MSTP77]),
119 CLKDEV_ICK_ID("fck", "sh-sci.4", &mstp_clks[MSTP77]),
120 CLKDEV_ICK_ID("fck", "sh-sci.5", &mstp_clks[MSTP77]),
[all …]
Dclock-sh7269.c1 // SPDX-License-Identifier: GPL-2.0
3 * arch/sh/kernel/cpu/sh2a/clock-sh7269.c
31 * Default rate for the root input clock, reset this with clk_set_rate()
40 return clk->parent->rate * PLL_RATE; in pll_recalc()
55 return clk->parent->rate / 8; in peripheral0_recalc()
70 return clk->parent->rate / 4; in peripheral1_recalc()
150 CLKDEV_ICK_ID("fck", "sh-sci.0", &mstp_clks[MSTP47]),
151 CLKDEV_ICK_ID("fck", "sh-sci.1", &mstp_clks[MSTP46]),
152 CLKDEV_ICK_ID("fck", "sh-sci.2", &mstp_clks[MSTP45]),
153 CLKDEV_ICK_ID("fck", "sh-sci.3", &mstp_clks[MSTP44]),
[all …]

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