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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/i2c/
Di2c-gpio.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/i2c/i2c-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Wolfram Sang <wsa@kernel.org>
13 - $ref: /schemas/i2c/i2c-controller.yaml#
18 - const: i2c-gpio
20 sda-gpios:
23 active high using open drain with (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)
24 from <dt-bindings/gpio/gpio.h> since the signal is by definition
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/i2c/
Di2c-gpio.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/i2c/i2c-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Wolfram Sang <wolfram@the-dreams.de>
13 - $ref: /schemas/i2c/i2c-controller.yaml#
18 - const: i2c-gpio
20 sda-gpios:
23 active high using open drain with (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)
24 from <dt-bindings/gpio/gpio.h> since the signal is by definition
[all …]
/kernel/linux/linux-6.6/include/linux/platform_data/
Di2c-gpio.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * i2c-gpio interface to platform code
11 * struct i2c_gpio_platform_data - Platform-dependent data for i2c-gpio
12 * @udelay: signal toggle delay. SCL frequency is (500 / udelay) kHz
14 * SCL low for longer than this, the transfer will time out.
15 * @sda_is_open_drain: SDA is configured as open drain, i.e. the pin
20 * This is for clients that can only read SDA/SCL.
21 * @sda_has_no_pullup: SDA is used in a non-compliant way and has no pull-up.
22 * Therefore disable open-drain.
23 * @scl_is_open_drain: SCL is set up as open drain. Same requirements
[all …]
/kernel/linux/linux-6.6/drivers/i2c/busses/
Di2c-gpio.c1 // SPDX-License-Identifier: GPL-2.0-only
11 #include <linux/i2c-algo-bit.h>
16 #include <linux/platform_data/i2c-gpio.h>
23 struct gpio_desc *scl; member
37 * valid for pins configured as open drain (i.e. setting the value
44 gpiod_set_value_cansleep(priv->sda, state); in i2c_gpio_setsda_val()
48 * Toggle SCL by changing the output value of the pin. This is used
49 * for pins that are configured as open drain and for output-only
57 gpiod_set_value_cansleep(priv->scl, state); in i2c_gpio_setscl_val()
64 return gpiod_get_value_cansleep(priv->sda); in i2c_gpio_getsda()
[all …]
/kernel/linux/linux-5.10/drivers/i2c/busses/
Di2c-gpio.c1 // SPDX-License-Identifier: GPL-2.0-only
11 #include <linux/i2c-algo-bit.h>
17 #include <linux/platform_data/i2c-gpio.h>
23 struct gpio_desc *scl; member
37 * valid for pins configured as open drain (i.e. setting the value
44 gpiod_set_value_cansleep(priv->sda, state); in i2c_gpio_setsda_val()
48 * Toggle SCL by changing the output value of the pin. This is used
49 * for pins that are configured as open drain and for output-only
57 gpiod_set_value_cansleep(priv->scl, state); in i2c_gpio_setscl_val()
64 return gpiod_get_value_cansleep(priv->sda); in i2c_gpio_getsda()
[all …]
/kernel/linux/linux-5.10/include/linux/platform_data/
Di2c-gpio.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * i2c-gpio interface to platform code
11 * struct i2c_gpio_platform_data - Platform-dependent data for i2c-gpio
12 * @udelay: signal toggle delay. SCL frequency is (500 / udelay) kHz
14 * SCL low for longer than this, the transfer will time out.
15 * @sda_is_open_drain: SDA is configured as open drain, i.e. the pin
19 * @scl_is_open_drain: SCL is set up as open drain. Same requirements
21 * @scl_is_output_only: SCL output drivers cannot be turned off.
/kernel/linux/linux-6.6/arch/arm/boot/dts/microchip/
Dat91-foxg20.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * at91-foxg20.dts - Device Tree file for Acme Systems FoxG20 board
9 /dts-v1/;
26 clock-frequency = <32768>;
30 clock-frequency = <18432000>;
38 compatible = "atmel,tcb-timer";
43 compatible = "atmel,tcb-timer";
49 atmel,vbus-gpio = <&pioC 6 GPIO_ACTIVE_HIGH>;
54 pinctrl-0 = <
58 pinctrl-names = "default";
[all …]
Dat91sam9x5.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * at91sam9x5.dtsi - Device Tree Include file for AT91SAM9x5 family SoC
11 #include <dt-bindings/dma/at91.h>
12 #include <dt-bindings/pinctrl/at91.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
14 #include <dt-bindings/gpio/gpio.h>
15 #include <dt-bindings/clock/at91.h>
16 #include <dt-bindings/mfd/at91-usart.h>
19 #address-cells = <1>;
20 #size-cells = <1>;
[all …]
Dat91sam9rl.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * at91sam9rl.dtsi - Device Tree Include file for AT91SAM9RL family SoC
6 * Alexandre Belloni <alexandre.belloni@free-electrons.com>
9 #include <dt-bindings/pinctrl/at91.h>
10 #include <dt-bindings/clock/at91.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/pwm/pwm.h>
14 #include <dt-bindings/mfd/at91-usart.h>
17 #address-cells = <1>;
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dat91-foxg20.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * at91-foxg20.dts - Device Tree file for Acme Systems FoxG20 board
9 /dts-v1/;
26 clock-frequency = <32768>;
30 clock-frequency = <18432000>;
38 compatible = "atmel,tcb-timer";
43 compatible = "atmel,tcb-timer";
49 atmel,vbus-gpio = <&pioC 6 GPIO_ACTIVE_HIGH>;
54 pinctrl-0 = <
58 pinctrl-names = "default";
[all …]
Dat91sam9x5.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * at91sam9x5.dtsi - Device Tree Include file for AT91SAM9x5 family SoC
11 #include <dt-bindings/dma/at91.h>
12 #include <dt-bindings/pinctrl/at91.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
14 #include <dt-bindings/gpio/gpio.h>
15 #include <dt-bindings/clock/at91.h>
18 #address-cells = <1>;
19 #size-cells = <1>;
22 interrupt-parent = <&aic>;
[all …]
Dtegra30-apalis-v1.1.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
16 avdd-pexa-supply = <&vdd2_reg>;
17 avdd-pexb-supply = <&vdd2_reg>;
18 avdd-pex-pll-supply = <&vdd2_reg>;
19 avdd-plle-supply = <&ldo6_reg>;
20 hvdd-pex-supply = <&reg_module_3v3>;
21 vddio-pex-ctl-supply = <&reg_module_3v3>;
22 vdd-pexa-supply = <&vdd2_reg>;
23 vdd-pexb-supply = <&vdd2_reg>;
27 nvidia,num-lanes = <4>;
[all …]
Dtegra30-apalis.dtsi1 // SPDX-License-Identifier: GPL-2.0
15 avdd-pexa-supply = <&vdd2_reg>;
16 avdd-pexb-supply = <&vdd2_reg>;
17 avdd-pex-pll-supply = <&vdd2_reg>;
18 avdd-plle-supply = <&ldo6_reg>;
19 hvdd-pex-supply = <&reg_module_3v3>;
20 vddio-pex-ctl-supply = <&reg_module_3v3>;
21 vdd-pexa-supply = <&vdd2_reg>;
22 vdd-pexb-supply = <&vdd2_reg>;
26 nvidia,num-lanes = <4>;
[all …]
Dat91sam9rl.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * at91sam9rl.dtsi - Device Tree Include file for AT91SAM9RL family SoC
6 * Alexandre Belloni <alexandre.belloni@free-electrons.com>
9 #include <dt-bindings/pinctrl/at91.h>
10 #include <dt-bindings/clock/at91.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/pwm/pwm.h>
16 #address-cells = <1>;
17 #size-cells = <1>;
[all …]
Dtegra30-colibri.dtsi1 // SPDX-License-Identifier: GPL-2.0
15 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
16 nvidia,hpd-gpio =
18 pll-supply = <&reg_1v8_avdd_hdmi_pll>;
19 vdd-supply = <&reg_3v3_avdd_hdmi>;
24 pinctrl-names = "default";
25 pinctrl-0 = <&state_default>;
28 /* Analogue Audio (On-module) */
29 clk1-out-pw4 {
34 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/mfd/
Das3722.txt4 -------------------
5 - compatible: Must be "ams,as3722".
6 - reg: I2C device address.
7 - interrupt-controller: AS3722 has internal interrupt controller which takes the
8 interrupt request from internal sub-blocks like RTC, regulators, GPIOs as well
10 - #interrupt-cells: Should be set to 2 for IRQ number and flags.
12 of AS3722 are defined at dt-bindings/mfd/as3722.h
14 interrupts.txt, using dt-bindings/irq.
17 --------------------
18 - ams,enable-internal-int-pullup: Boolean property, to enable internal pullup on
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/mfd/
Das3722.txt4 -------------------
5 - compatible: Must be "ams,as3722".
6 - reg: I2C device address.
7 - interrupt-controller: AS3722 has internal interrupt controller which takes the
8 interrupt request from internal sub-blocks like RTC, regulators, GPIOs as well
10 - #interrupt-cells: Should be set to 2 for IRQ number and flags.
12 of AS3722 are defined at dt-bindings/mfd/as3722.h
14 interrupts.txt, using dt-bindings/irq.
17 --------------------
18 - ams,enable-internal-int-pullup: Boolean property, to enable internal pullup on
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/nvidia/
Dtegra30-apalis-v1.1.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
16 avdd-pexa-supply = <&vdd2_reg>;
17 avdd-pexb-supply = <&vdd2_reg>;
18 avdd-pex-pll-supply = <&vdd2_reg>;
19 avdd-plle-supply = <&ldo6_reg>;
20 hvdd-pex-supply = <&reg_module_3v3>;
21 vddio-pex-ctl-supply = <&reg_module_3v3>;
22 vdd-pexa-supply = <&vdd2_reg>;
23 vdd-pexb-supply = <&vdd2_reg>;
27 nvidia,num-lanes = <4>;
[all …]
Dtegra30-apalis.dtsi1 // SPDX-License-Identifier: GPL-2.0
15 avdd-pexa-supply = <&vdd2_reg>;
16 avdd-pexb-supply = <&vdd2_reg>;
17 avdd-pex-pll-supply = <&vdd2_reg>;
18 avdd-plle-supply = <&ldo6_reg>;
19 hvdd-pex-supply = <&reg_module_3v3>;
20 vddio-pex-ctl-supply = <&reg_module_3v3>;
21 vdd-pexa-supply = <&vdd2_reg>;
22 vdd-pexb-supply = <&vdd2_reg>;
26 nvidia,num-lanes = <4>;
[all …]
Dtegra30-colibri.dtsi1 // SPDX-License-Identifier: GPL-2.0
15 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
16 nvidia,hpd-gpio =
18 pll-supply = <&reg_1v8_avdd_hdmi_pll>;
19 vdd-supply = <&reg_3v3_avdd_hdmi>;
24 lan-reset-n-hog {
25 gpio-hog;
27 output-high;
28 line-name = "LAN_RESET#";
33 pinctrl-names = "default";
[all …]
/kernel/linux/linux-5.10/Documentation/driver-api/
Di2c.rst5 the "Inter-IC" bus, a simple bus protocol which is widely used where low
7 some vendors use another name (such as "Two-Wire Interface", TWI) for
8 the same bus. I2C only needs two signals (SCL for clock, SDA for data),
12 I2C is a multi-master bus; open drain signaling is used to arbitrate
38 .. kernel-doc:: include/linux/i2c.h
41 .. kernel-doc:: drivers/i2c/i2c-boardinfo.c
44 .. kernel-doc:: drivers/i2c/i2c-core-base.c
47 .. kernel-doc:: drivers/i2c/i2c-core-smbus.c
/kernel/linux/linux-6.6/Documentation/driver-api/
Di2c.rst5 the "Inter-IC" bus, a simple bus protocol which is widely used where low
7 some vendors use another name (such as "Two-Wire Interface", TWI) for
8 the same bus. I2C only needs two signals (SCL for clock, SDA for data),
12 I2C is a multi-master bus; open drain signaling is used to arbitrate
38 .. kernel-doc:: include/linux/i2c.h
41 .. kernel-doc:: drivers/i2c/i2c-boardinfo.c
44 .. kernel-doc:: drivers/i2c/i2c-core-base.c
47 .. kernel-doc:: drivers/i2c/i2c-core-smbus.c
/kernel/linux/linux-5.10/Documentation/driver-api/gpio/
Ddriver.rst26 between 0 and n-1, n being the number of GPIOs managed by the chip.
29 example if a system uses a memory-mapped set of I/O-registers where 32 GPIO
30 lines are handled by one bit per line in a 32-bit register, it makes sense to
44 So for example one platform could use global numbers 32-159 for GPIOs, with a
46 global numbers 0..63 with one set of GPIO controllers, 64-79 with another type
47 of GPIO controller, and on one particular board 80-95 with an FPGA. The legacy
49 2000-2063 to identify GPIO lines in a bank of I2C GPIO expanders.
60 - methods to establish GPIO line direction
61 - methods used to access GPIO line values
62 - method to set electrical configuration for a given GPIO line
[all …]
/kernel/linux/linux-6.6/arch/powerpc/boot/dts/
Dwii.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * Copyright (C) 2008-2009 The GameCube Linux Team
10 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/input/input.h>
15 * This is commented-out for now.
25 #address-cells = <1>;
26 #size-cells = <1>;
29 bootargs = "root=/dev/mmcblk0p2 rootwait udbg-immortal";
34 reg = <0x00000000 0x01800000 /* MEM1 24MB 1T-SRAM */
[all …]
/kernel/linux/linux-5.10/arch/powerpc/boot/dts/
Dwii.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * Copyright (C) 2008-2009 The GameCube Linux Team
10 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/input/input.h>
15 * This is commented-out for now.
25 #address-cells = <1>;
26 #size-cells = <1>;
29 bootargs = "root=/dev/mmcblk0p2 rootwait udbg-immortal";
34 reg = <0x00000000 0x01800000 /* MEM1 24MB 1T-SRAM */
[all …]

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