| /kernel/linux/linux-6.6/drivers/clk/hisilicon/ |
| D | clkgate-separated.c | 34 struct clkgate_separated *sclk; in clkgate_separated_enable() local
38 sclk = container_of(hw, struct clkgate_separated, hw); in clkgate_separated_enable()
39 if (sclk->lock) in clkgate_separated_enable()
40 spin_lock_irqsave(sclk->lock, flags); in clkgate_separated_enable()
41 reg = BIT(sclk->bit_idx); in clkgate_separated_enable()
42 writel_relaxed(reg, sclk->enable); in clkgate_separated_enable()
43 readl_relaxed(sclk->enable + CLKGATE_SEPERATED_STATUS); in clkgate_separated_enable()
44 if (sclk->lock) in clkgate_separated_enable()
45 spin_unlock_irqrestore(sclk->lock, flags); in clkgate_separated_enable()
51 struct clkgate_separated *sclk; in clkgate_separated_disable() local
[all …]
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| /kernel/linux/linux-5.10/drivers/clk/hisilicon/ |
| D | clkgate-separated.c | 34 struct clkgate_separated *sclk; in clkgate_separated_enable() local
38 sclk = container_of(hw, struct clkgate_separated, hw); in clkgate_separated_enable()
39 if (sclk->lock) in clkgate_separated_enable()
40 spin_lock_irqsave(sclk->lock, flags); in clkgate_separated_enable()
41 reg = BIT(sclk->bit_idx); in clkgate_separated_enable()
42 writel_relaxed(reg, sclk->enable); in clkgate_separated_enable()
43 readl_relaxed(sclk->enable + CLKGATE_SEPERATED_STATUS); in clkgate_separated_enable()
44 if (sclk->lock) in clkgate_separated_enable()
45 spin_unlock_irqrestore(sclk->lock, flags); in clkgate_separated_enable()
51 struct clkgate_separated *sclk; in clkgate_separated_disable() local
[all …]
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| /kernel/linux/linux-5.10/drivers/clk/meson/ |
| D | sclk-div.c | 23 #include "sclk-div.h"
31 static int sclk_div_maxval(struct meson_sclk_div_data *sclk) in sclk_div_maxval() argument
33 return (1 << sclk->div.width) - 1; in sclk_div_maxval()
36 static int sclk_div_maxdiv(struct meson_sclk_div_data *sclk) in sclk_div_maxdiv() argument
38 return sclk_div_maxval(sclk) + 1; in sclk_div_maxdiv()
51 struct meson_sclk_div_data *sclk) in sclk_div_bestdiv() argument
61 maxdiv = sclk_div_maxdiv(sclk); in sclk_div_bestdiv()
92 bestdiv = sclk_div_maxdiv(sclk); in sclk_div_bestdiv()
103 struct meson_sclk_div_data *sclk = meson_sclk_div_data(clk); in sclk_div_round_rate() local
106 div = sclk_div_bestdiv(hw, rate, prate, sclk); in sclk_div_round_rate()
[all …]
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| /kernel/linux/linux-6.6/drivers/clk/meson/ |
| D | sclk-div.c | 23 #include "sclk-div.h"
31 static int sclk_div_maxval(struct meson_sclk_div_data *sclk) in sclk_div_maxval() argument
33 return (1 << sclk->div.width) - 1; in sclk_div_maxval()
36 static int sclk_div_maxdiv(struct meson_sclk_div_data *sclk) in sclk_div_maxdiv() argument
38 return sclk_div_maxval(sclk) + 1; in sclk_div_maxdiv()
51 struct meson_sclk_div_data *sclk) in sclk_div_bestdiv() argument
61 maxdiv = sclk_div_maxdiv(sclk); in sclk_div_bestdiv()
92 bestdiv = sclk_div_maxdiv(sclk); in sclk_div_bestdiv()
103 struct meson_sclk_div_data *sclk = meson_sclk_div_data(clk); in sclk_div_determine_rate() local
106 div = sclk_div_bestdiv(hw, req->rate, &req->best_parent_rate, sclk); in sclk_div_determine_rate()
[all …]
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| /kernel/linux/linux-5.10/drivers/clk/ |
| D | clk-scmi.c | 103 static int scmi_clk_ops_init(struct device *dev, struct scmi_clk *sclk) in scmi_clk_ops_init() argument
112 .name = sclk->info->name, in scmi_clk_ops_init()
115 sclk->hw.init = &init; in scmi_clk_ops_init()
116 ret = devm_clk_hw_register(dev, &sclk->hw); in scmi_clk_ops_init()
120 if (sclk->info->rate_discrete) { in scmi_clk_ops_init()
121 int num_rates = sclk->info->list.num_rates; in scmi_clk_ops_init()
126 min_rate = sclk->info->list.rates[0]; in scmi_clk_ops_init()
127 max_rate = sclk->info->list.rates[num_rates - 1]; in scmi_clk_ops_init()
129 min_rate = sclk->info->range.min_rate; in scmi_clk_ops_init()
130 max_rate = sclk->info->range.max_rate; in scmi_clk_ops_init()
[all …]
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| D | clk-scpi.c | 140 struct scpi_clk *sclk, const char *name) in scpi_clk_ops_init() argument
150 sclk->hw.init = &init; in scpi_clk_ops_init()
151 sclk->scpi_ops = get_scpi_ops(); in scpi_clk_ops_init()
154 sclk->info = sclk->scpi_ops->dvfs_get_info(sclk->id); in scpi_clk_ops_init()
155 if (IS_ERR(sclk->info)) in scpi_clk_ops_init()
156 return PTR_ERR(sclk->info); in scpi_clk_ops_init()
158 if (sclk->scpi_ops->clk_get_range(sclk->id, &min, &max) || !max) in scpi_clk_ops_init()
164 ret = devm_clk_hw_register(dev, &sclk->hw); in scpi_clk_ops_init()
166 clk_hw_set_rate_range(&sclk->hw, min, max); in scpi_clk_ops_init()
178 struct scpi_clk *sclk; in scpi_of_clk_src_get() local
[all …]
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| D | clk-nomadik.c | 302 struct clk_src *sclk = to_src(hw); in src_clk_enable() local
303 u32 enreg = sclk->group1 ? SRC_PCKEN1 : SRC_PCKEN0; in src_clk_enable()
304 u32 sreg = sclk->group1 ? SRC_PCKSR1 : SRC_PCKSR0; in src_clk_enable()
306 writel(sclk->clkbit, src_base + enreg); in src_clk_enable()
308 while (!(readl(src_base + sreg) & sclk->clkbit)) in src_clk_enable()
315 struct clk_src *sclk = to_src(hw); in src_clk_disable() local
316 u32 disreg = sclk->group1 ? SRC_PCKDIS1 : SRC_PCKDIS0; in src_clk_disable()
317 u32 sreg = sclk->group1 ? SRC_PCKSR1 : SRC_PCKSR0; in src_clk_disable()
319 writel(sclk->clkbit, src_base + disreg); in src_clk_disable()
321 while (readl(src_base + sreg) & sclk->clkbit) in src_clk_disable()
[all …]
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| D | clk-u300.c | 455 static void syscon_block_reset_enable(struct clk_syscon *sclk) in syscon_block_reset_enable() argument
461 if (!sclk->res_reg) in syscon_block_reset_enable()
464 val = readw(sclk->res_reg); in syscon_block_reset_enable()
465 val |= BIT(sclk->res_bit); in syscon_block_reset_enable()
466 writew(val, sclk->res_reg); in syscon_block_reset_enable()
468 sclk->reset = true; in syscon_block_reset_enable()
471 static void syscon_block_reset_disable(struct clk_syscon *sclk) in syscon_block_reset_disable() argument
477 if (!sclk->res_reg) in syscon_block_reset_disable()
480 val = readw(sclk->res_reg); in syscon_block_reset_disable()
481 val &= ~BIT(sclk->res_bit); in syscon_block_reset_disable()
[all …]
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| /kernel/linux/linux-6.6/drivers/clk/ralink/ |
| D | clk-mt7621.c | 134 struct mt7621_gate *sclk) in mt7621_gate_ops_init() argument
145 .parent_names = &sclk->parent_name, in mt7621_gate_ops_init()
147 .name = sclk->name, in mt7621_gate_ops_init()
150 sclk->hw.init = &init; in mt7621_gate_ops_init()
151 return devm_clk_hw_register(dev, &sclk->hw); in mt7621_gate_ops_init()
159 struct mt7621_gate *sclk; in mt7621_register_gates() local
163 sclk = &mt7621_gates[i]; in mt7621_register_gates()
164 sclk->priv = priv; in mt7621_register_gates()
165 ret = mt7621_gate_ops_init(dev, sclk); in mt7621_register_gates()
167 dev_err(dev, "Couldn't register clock %s\n", sclk->name); in mt7621_register_gates()
[all …]
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| D | clk-mtmips.c | 231 struct mtmips_clk *sclk; in mtmips_register_pherip_clocks() local
239 sclk = &priv->data->clk_periph[i]; in mtmips_register_pherip_clocks()
240 ret = of_clk_hw_register(np, &sclk->hw); in mtmips_register_pherip_clocks()
246 hws[idx] = &sclk->hw; in mtmips_register_pherip_clocks()
253 sclk = &priv->data->clk_periph[i]; in mtmips_register_pherip_clocks()
254 clk_hw_unregister(&sclk->hw); in mtmips_register_pherip_clocks()
283 struct mtmips_clk_fixed *sclk; in mtmips_register_fixed_clocks() local
290 sclk = &priv->data->clk_fixed[i]; in mtmips_register_fixed_clocks()
291 sclk->hw = clk_hw_register_fixed_rate(NULL, sclk->name, in mtmips_register_fixed_clocks()
292 sclk->parent, 0, in mtmips_register_fixed_clocks()
[all …]
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| /kernel/linux/linux-6.6/drivers/clk/ |
| D | clk-scmi.c | 134 static int scmi_clk_ops_init(struct device *dev, struct scmi_clk *sclk, in scmi_clk_ops_init() argument
144 .name = sclk->info->name, in scmi_clk_ops_init()
147 sclk->hw.init = &init; in scmi_clk_ops_init()
148 ret = devm_clk_hw_register(dev, &sclk->hw); in scmi_clk_ops_init()
152 if (sclk->info->rate_discrete) { in scmi_clk_ops_init()
153 int num_rates = sclk->info->list.num_rates; in scmi_clk_ops_init()
158 min_rate = sclk->info->list.rates[0]; in scmi_clk_ops_init()
159 max_rate = sclk->info->list.rates[num_rates - 1]; in scmi_clk_ops_init()
161 min_rate = sclk->info->range.min_rate; in scmi_clk_ops_init()
162 max_rate = sclk->info->range.max_rate; in scmi_clk_ops_init()
[all …]
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| D | clk-scpi.c | 139 struct scpi_clk *sclk, const char *name) in scpi_clk_ops_init() argument
149 sclk->hw.init = &init; in scpi_clk_ops_init()
150 sclk->scpi_ops = get_scpi_ops(); in scpi_clk_ops_init()
153 sclk->info = sclk->scpi_ops->dvfs_get_info(sclk->id); in scpi_clk_ops_init()
154 if (IS_ERR(sclk->info)) in scpi_clk_ops_init()
155 return PTR_ERR(sclk->info); in scpi_clk_ops_init()
157 if (sclk->scpi_ops->clk_get_range(sclk->id, &min, &max) || !max) in scpi_clk_ops_init()
163 ret = devm_clk_hw_register(dev, &sclk->hw); in scpi_clk_ops_init()
165 clk_hw_set_rate_range(&sclk->hw, min, max); in scpi_clk_ops_init()
177 struct scpi_clk *sclk; in scpi_of_clk_src_get() local
[all …]
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| D | clk-nomadik.c | 305 struct clk_src *sclk = to_src(hw); in src_clk_enable() local
306 u32 enreg = sclk->group1 ? SRC_PCKEN1 : SRC_PCKEN0; in src_clk_enable()
307 u32 sreg = sclk->group1 ? SRC_PCKSR1 : SRC_PCKSR0; in src_clk_enable()
309 writel(sclk->clkbit, src_base + enreg); in src_clk_enable()
311 while (!(readl(src_base + sreg) & sclk->clkbit)) in src_clk_enable()
318 struct clk_src *sclk = to_src(hw); in src_clk_disable() local
319 u32 disreg = sclk->group1 ? SRC_PCKDIS1 : SRC_PCKDIS0; in src_clk_disable()
320 u32 sreg = sclk->group1 ? SRC_PCKSR1 : SRC_PCKSR0; in src_clk_disable()
322 writel(sclk->clkbit, src_base + disreg); in src_clk_disable()
324 while (readl(src_base + sreg) & sclk->clkbit) in src_clk_disable()
[all …]
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| /kernel/linux/linux-5.10/drivers/clk/microchip/ |
| D | clk-core.c | 759 /* System mux clock(aka SCLK) */
774 struct pic32_sys_clk *sclk = clkhw_to_sys_clk(hw); in sclk_get_rate() local
777 div = (readl(sclk->slew_reg) >> SLEW_SYSDIV_SHIFT) & SLEW_SYSDIV; in sclk_get_rate()
792 struct pic32_sys_clk *sclk = clkhw_to_sys_clk(hw); in sclk_set_rate() local
799 spin_lock_irqsave(&sclk->core->reg_lock, flags); in sclk_set_rate()
802 v = readl(sclk->slew_reg); in sclk_set_rate()
808 writel(v, sclk->slew_reg); in sclk_set_rate()
811 err = readl_poll_timeout_atomic(sclk->slew_reg, v, in sclk_set_rate()
814 spin_unlock_irqrestore(&sclk->core->reg_lock, flags); in sclk_set_rate()
821 struct pic32_sys_clk *sclk = clkhw_to_sys_clk(hw); in sclk_get_parent() local
[all …]
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| /kernel/linux/linux-6.6/drivers/clk/microchip/ |
| D | clk-core.c | 759 /* System mux clock(aka SCLK) */
774 struct pic32_sys_clk *sclk = clkhw_to_sys_clk(hw); in sclk_get_rate() local
777 div = (readl(sclk->slew_reg) >> SLEW_SYSDIV_SHIFT) & SLEW_SYSDIV; in sclk_get_rate()
792 struct pic32_sys_clk *sclk = clkhw_to_sys_clk(hw); in sclk_set_rate() local
799 spin_lock_irqsave(&sclk->core->reg_lock, flags); in sclk_set_rate()
802 v = readl(sclk->slew_reg); in sclk_set_rate()
808 writel(v, sclk->slew_reg); in sclk_set_rate()
811 err = readl_poll_timeout_atomic(sclk->slew_reg, v, in sclk_set_rate()
814 spin_unlock_irqrestore(&sclk->core->reg_lock, flags); in sclk_set_rate()
821 struct pic32_sys_clk *sclk = clkhw_to_sys_clk(hw); in sclk_get_parent() local
[all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/nvkm/subdev/clk/ |
| D | gk104.c | 68 u32 sclk; in read_pll() local
77 sclk = device->crystal; in read_pll()
81 sclk = read_pll(clk, 0x132020); in read_pll()
85 sclk = read_div(clk, 0, 0x137320, 0x137330); in read_pll()
92 sclk = read_div(clk, (pll & 0xff) / 0x20, 0x137120, 0x137140); in read_pll()
101 sclk = (sclk * N) + (((u16)(fN + 4096) * sclk) >> 13); in read_pll()
102 return sclk / (M * P); in read_pll()
121 u32 sclk = read_vco(clk, dsrc + (doff * 4)); in read_div() local
123 return (sclk * 2) / sdiv; in read_div()
149 u32 sclk, sdiv; in read_clk() local
[all …]
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| D | gf100.c | 67 u32 sclk; in read_pll() local
75 sclk = device->crystal; in read_pll()
79 sclk = nvkm_clk_read(&clk->base, nv_clk_src_mpllsrc); in read_pll()
82 sclk = nvkm_clk_read(&clk->base, nv_clk_src_mpllsrcref); in read_pll()
88 sclk = read_div(clk, (pll & 0xff) / 0x20, 0x137120, 0x137140); in read_pll()
94 return sclk * N / M / P; in read_pll()
102 u32 sclk, sctl, sdiv = 2; in read_div() local
112 sclk = read_vco(clk, dsrc + (doff * 4)); in read_div()
126 return (sclk * 2) / sdiv; in read_div()
138 u32 sclk, sdiv; in read_clk() local
[all …]
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| /kernel/linux/linux-6.6/drivers/gpu/drm/nouveau/nvkm/subdev/clk/ |
| D | gk104.c | 68 u32 sclk; in read_pll() local
77 sclk = device->crystal; in read_pll()
81 sclk = read_pll(clk, 0x132020); in read_pll()
85 sclk = read_div(clk, 0, 0x137320, 0x137330); in read_pll()
92 sclk = read_div(clk, (pll & 0xff) / 0x20, 0x137120, 0x137140); in read_pll()
101 sclk = (sclk * N) + (((u16)(fN + 4096) * sclk) >> 13); in read_pll()
102 return sclk / (M * P); in read_pll()
121 u32 sclk = read_vco(clk, dsrc + (doff * 4)); in read_div() local
123 return (sclk * 2) / sdiv; in read_div()
149 u32 sclk, sdiv; in read_clk() local
[all …]
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| D | gf100.c | 67 u32 sclk; in read_pll() local
75 sclk = device->crystal; in read_pll()
79 sclk = nvkm_clk_read(&clk->base, nv_clk_src_mpllsrc); in read_pll()
82 sclk = nvkm_clk_read(&clk->base, nv_clk_src_mpllsrcref); in read_pll()
88 sclk = read_div(clk, (pll & 0xff) / 0x20, 0x137120, 0x137140); in read_pll()
94 return sclk * N / M / P; in read_pll()
102 u32 sclk, sctl, sdiv = 2; in read_div() local
112 sclk = read_vco(clk, dsrc + (doff * 4)); in read_div()
126 return (sclk * 2) / sdiv; in read_div()
138 u32 sclk, sdiv; in read_clk() local
[all …]
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| /kernel/linux/linux-6.6/drivers/gpu/drm/radeon/ |
| D | rv730_dpm.c | 39 RV770_SMC_SCLK_VALUE *sclk) in rv730_populate_sclk_value() argument
106 sclk->sclk_value = cpu_to_be32(engine_clock); in rv730_populate_sclk_value()
107 sclk->vCG_SPLL_FUNC_CNTL = cpu_to_be32(spll_func_cntl); in rv730_populate_sclk_value()
108 sclk->vCG_SPLL_FUNC_CNTL_2 = cpu_to_be32(spll_func_cntl_2); in rv730_populate_sclk_value()
109 sclk->vCG_SPLL_FUNC_CNTL_3 = cpu_to_be32(spll_func_cntl_3); in rv730_populate_sclk_value()
110 sclk->vCG_SPLL_SPREAD_SPECTRUM = cpu_to_be32(cg_spll_spread_spectrum); in rv730_populate_sclk_value()
111 sclk->vCG_SPLL_SPREAD_SPECTRUM_2 = cpu_to_be32(cg_spll_spread_spectrum_2); in rv730_populate_sclk_value()
302 table->ACPIState.levels[0].sclk.vCG_SPLL_FUNC_CNTL = cpu_to_be32(spll_func_cntl); in rv730_populate_smc_acpi_state()
303 table->ACPIState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_2 = cpu_to_be32(spll_func_cntl_2); in rv730_populate_smc_acpi_state()
304 table->ACPIState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_3 = cpu_to_be32(spll_func_cntl_3); in rv730_populate_smc_acpi_state()
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| D | rv770_dpm.c | 273 a_n = (int)state->medium.sclk * pi->lmp + in rv770_populate_smc_t()
274 (int)state->low.sclk * (R600_AH_DFLT - pi->rlp); in rv770_populate_smc_t()
275 a_d = (int)state->low.sclk * (100 - (int)pi->rlp) + in rv770_populate_smc_t()
276 (int)state->medium.sclk * pi->lmp; in rv770_populate_smc_t()
281 a_n = (int)state->high.sclk * pi->lhp + (int)state->medium.sclk * in rv770_populate_smc_t()
283 a_d = (int)state->medium.sclk * (100 - (int)pi->rmp) + in rv770_populate_smc_t()
284 (int)state->high.sclk * pi->lhp; in rv770_populate_smc_t()
487 RV770_SMC_SCLK_VALUE *sclk) in rv770_populate_sclk_value() argument
557 sclk->sclk_value = cpu_to_be32(engine_clock); in rv770_populate_sclk_value()
558 sclk->vCG_SPLL_FUNC_CNTL = cpu_to_be32(spll_func_cntl); in rv770_populate_sclk_value()
[all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/radeon/ |
| D | rv730_dpm.c | 41 RV770_SMC_SCLK_VALUE *sclk) in rv730_populate_sclk_value() argument
108 sclk->sclk_value = cpu_to_be32(engine_clock); in rv730_populate_sclk_value()
109 sclk->vCG_SPLL_FUNC_CNTL = cpu_to_be32(spll_func_cntl); in rv730_populate_sclk_value()
110 sclk->vCG_SPLL_FUNC_CNTL_2 = cpu_to_be32(spll_func_cntl_2); in rv730_populate_sclk_value()
111 sclk->vCG_SPLL_FUNC_CNTL_3 = cpu_to_be32(spll_func_cntl_3); in rv730_populate_sclk_value()
112 sclk->vCG_SPLL_SPREAD_SPECTRUM = cpu_to_be32(cg_spll_spread_spectrum); in rv730_populate_sclk_value()
113 sclk->vCG_SPLL_SPREAD_SPECTRUM_2 = cpu_to_be32(cg_spll_spread_spectrum_2); in rv730_populate_sclk_value()
304 table->ACPIState.levels[0].sclk.vCG_SPLL_FUNC_CNTL = cpu_to_be32(spll_func_cntl); in rv730_populate_smc_acpi_state()
305 table->ACPIState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_2 = cpu_to_be32(spll_func_cntl_2); in rv730_populate_smc_acpi_state()
306 table->ACPIState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_3 = cpu_to_be32(spll_func_cntl_3); in rv730_populate_smc_acpi_state()
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| D | rv770_dpm.c | 271 a_n = (int)state->medium.sclk * pi->lmp + in rv770_populate_smc_t()
272 (int)state->low.sclk * (R600_AH_DFLT - pi->rlp); in rv770_populate_smc_t()
273 a_d = (int)state->low.sclk * (100 - (int)pi->rlp) + in rv770_populate_smc_t()
274 (int)state->medium.sclk * pi->lmp; in rv770_populate_smc_t()
279 a_n = (int)state->high.sclk * pi->lhp + (int)state->medium.sclk * in rv770_populate_smc_t()
281 a_d = (int)state->medium.sclk * (100 - (int)pi->rmp) + in rv770_populate_smc_t()
282 (int)state->high.sclk * pi->lhp; in rv770_populate_smc_t()
485 RV770_SMC_SCLK_VALUE *sclk) in rv770_populate_sclk_value() argument
555 sclk->sclk_value = cpu_to_be32(engine_clock); in rv770_populate_sclk_value()
556 sclk->vCG_SPLL_FUNC_CNTL = cpu_to_be32(spll_func_cntl); in rv770_populate_sclk_value()
[all …]
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| /kernel/linux/linux-5.10/drivers/tty/serial/8250/ |
| D | 8250_em.c | 24 struct clk *sclk; member
100 priv->sclk = devm_clk_get(&pdev->dev, "sclk"); in serial8250_em_probe()
101 if (IS_ERR(priv->sclk)) { in serial8250_em_probe()
103 return PTR_ERR(priv->sclk); in serial8250_em_probe()
114 clk_prepare_enable(priv->sclk); in serial8250_em_probe()
115 up.port.uartclk = clk_get_rate(priv->sclk); in serial8250_em_probe()
126 clk_disable_unprepare(priv->sclk); in serial8250_em_probe()
140 clk_disable_unprepare(priv->sclk); in serial8250_em_remove()
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| /kernel/linux/linux-6.6/sound/soc/intel/skylake/ |
| D | skl-nhlt.c | 90 * sclk/sclkfs.
98 struct skl_ssp_clk *sclk, *sclkfs; in skl_get_ssp_clks() local
108 sclk = &ssp_clks[SKL_SCLK_OFS]; in skl_get_ssp_clks()
129 * But the sclk rate will be generated for the total in skl_get_ssp_clks()
153 /* check if the rate is added already to the given SSP's sclk */ in skl_get_ssp_clks()
155 (sclk[id].rate_cfg[j].rate != 0); j++) { in skl_get_ssp_clks()
156 if (sclk[id].rate_cfg[j].rate == rate) { in skl_get_ssp_clks()
162 /* Fill rate and parent for sclk/sclkfs */ in skl_get_ssp_clks()
192 sclk[id].rate_cfg[rate_index].rate = rate; in skl_get_ssp_clks()
193 sclk[id].rate_cfg[rate_index].config = saved_fmt_cfg; in skl_get_ssp_clks()
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