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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/mmc/
Dsdhci-am654.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/
4 ---
5 $id: "http://devicetree.org/schemas/mmc/sdhci-am654.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
11 - Ulf Hansson <ulf.hansson@linaro.org>
14 - $ref: mmc-controller.yaml#
19 - ti,am654-sdhci-5.1
20 - ti,j721e-sdhci-8bit
21 - ti,j721e-sdhci-4bit
[all …]
Dcdns,sdhci.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Cadence SD/SDIO/eMMC Host Controller (SD4HC)
10 - Masahiro Yamada <yamada.masahiro@socionext.com>
11 - Piotr Sroka <piotrs@cadence.com>
14 - $ref: mmc-controller.yaml
19 - enum:
20 - socionext,uniphier-sd4hc
21 - const: cdns,sd4hc
[all …]
Dsocionext,uniphier-sd.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/mmc/socionext,uniphier-sd.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: UniPhier SD/SDIO/eMMC controller
10 - Masahiro Yamada <yamada.masahiro@socionext.com>
16 - socionext,uniphier-sd-v2.91
17 - socionext,uniphier-sd-v3.1
18 - socionext,uniphier-sd-v3.1.1
29 reset-names:
[all …]
Dmmc-controller.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mmc/mmc-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ulf Hansson <ulf.hansson@linaro.org>
25 "#address-cells":
30 "#size-cells":
37 broken-cd:
42 cd-gpios:
46 non-removable:
[all …]
Dk3-dw-mshc.txt4 Read synopsys-dw-mshc.txt for more details
7 a SoC with storage medium such as eMMC or SD/MMC cards. This file documents
9 by synopsys-dw-mshc.txt and the properties used by the Hisilicon specific
15 - "hisilicon,hi3660-dw-mshc": for controllers with hi3660 specific extensions.
16 - "hisilicon,hi3670-dw-mshc", "hisilicon,hi3660-dw-mshc": for controllers
18 - "hisilicon,hi4511-dw-mshc": for controllers with hi4511 specific extensions.
19 - "hisilicon,hi6220-dw-mshc": for controllers with hi6220 specific extensions.
22 - hisilicon,peripheral-syscon: phandle of syscon used to control peripheral.
30 compatible = "hisilicon,hi4511-dw-mshc";
33 #address-cells = <1>;
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/mmc/
Dsdhci-am654.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/
4 ---
5 $id: http://devicetree.org/schemas/mmc/sdhci-am654.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Ulf Hansson <ulf.hansson@linaro.org>
14 - $ref: sdhci-common.yaml#
19 - enum:
20 - ti,am62-sdhci
21 - ti,am64-sdhci-4bit
[all …]
Dcdns,sdhci.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Cadence SD/SDIO/eMMC Host Controller (SD4HC)
10 - Masahiro Yamada <yamada.masahiro@socionext.com>
15 - enum:
16 - amd,pensando-elba-sd4hc
17 - microchip,mpfs-sd4hc
18 - socionext,uniphier-sd4hc
19 - const: cdns,sd4hc
[all …]
Dsocionext,uniphier-sd.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/mmc/socionext,uniphier-sd.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: UniPhier SD/SDIO/eMMC controller
10 - Masahiro Yamada <yamada.masahiro@socionext.com>
16 - socionext,uniphier-sd-v2.91
17 - socionext,uniphier-sd-v3.1
18 - socionext,uniphier-sd-v3.1.1
32 dma-names:
[all …]
Dmmc-controller.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mmc/mmc-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ulf Hansson <ulf.hansson@linaro.org>
25 "#address-cells":
30 "#size-cells":
37 broken-cd:
42 cd-gpios:
47 non-removable:
[all …]
Dk3-dw-mshc.txt4 Read synopsys-dw-mshc.txt for more details
7 a SoC with storage medium such as eMMC or SD/MMC cards. This file documents
9 by synopsys-dw-mshc.txt and the properties used by the Hisilicon specific
15 - "hisilicon,hi3660-dw-mshc": for controllers with hi3660 specific extensions.
16 - "hisilicon,hi3670-dw-mshc", "hisilicon,hi3660-dw-mshc": for controllers
18 - "hisilicon,hi4511-dw-mshc": for controllers with hi4511 specific extensions.
19 - "hisilicon,hi6220-dw-mshc": for controllers with hi6220 specific extensions.
22 - hisilicon,peripheral-syscon: phandle of syscon used to control peripheral.
30 compatible = "hisilicon,hi4511-dw-mshc";
33 #address-cells = <1>;
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dimx6qdl-colibri-v1_1-uhs.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
32 pinctrl-names = "default", "state_100mhz", "state_200mhz";
33 pinctrl-0 = <&pinctrl_usdhc1 &pinctrl_mmc_cd>;
34 pinctrl-1 = <&pinctrl_usdhc1_100mhz &pinctrl_mmc_cd>;
35 pinctrl-2 = <&pinctrl_usdhc1_200mhz &pinctrl_mmc_cd>;
36 vmmc-supply = <&reg_module_3v3>;
37 vqmmc-supply = <&vgen3_reg>;
38 wakeup-source;
39 keep-power-in-suspend;
40 sd-uhs-sdr12;
[all …]
Drk3288-veyron-sdmmc.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
9 sdcard-supply = <&vccio_sd>;
18 sdmmc_bus4: sdmmc-bus4 {
25 sdmmc_clk: sdmmc-clk {
29 sdmmc_cmd: sdmmc-cmd {
39 sdmmc_cd_disabled: sdmmc-cd-disabled {
44 sdmmc_cd_pin: sdmmc-cd-pin {
51 vcc9-supply = <&vcc_5v>;
55 regulator-name = "vccio_sd";
56 regulator-min-microvolt = <1800000>;
[all …]
Dimx6ull-colibri-eval-v3.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 stdout-path = "serial0:115200n8";
11 gpio-keys {
12 compatible = "gpio-keys";
13 pinctrl-names = "default";
14 pinctrl-0 = <&pinctrl_snvs_gpiokeys>;
17 label = "Wake-Up";
20 debounce-interval = <10>;
21 wakeup-source;
27 compatible = "fixed-clock";
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/freescale/
Dfsl-lx2160a-clearfog-itx.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 /dts-v1/;
10 #include "fsl-lx2160a-cex7.dtsi"
19 stdout-path = "serial0:115200n8";
28 sd-uhs-sdr104;
29 sd-uhs-sdr50;
30 sd-uhs-sdr25;
31 sd-uhs-sdr12;
Dfsl-ls1012a-rdb.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
10 #include "fsl-ls1012a.dtsi"
14 compatible = "fsl,ls1012a-rdb", "fsl,ls1012a";
22 sd-uhs-sdr104;
23 sd-uhs-sdr50;
24 sd-uhs-sdr25;
25 sd-uhs-sdr12;
30 mmc-hs200-1_8v;
42 compatible = "jedec,spi-nor";
[all …]
Dfsl-lx2160a-rdb.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
7 /dts-v1/;
9 #include "fsl-lx2160a.dtsi"
13 compatible = "fsl,lx2160a-rdb", "fsl,lx2160a";
21 stdout-path = "serial0:115200n8";
24 sb_3v3: regulator-sb3v3 {
25 compatible = "regulator-fixed";
26 regulator-name = "MC34717-3.3VSB";
27 regulator-min-microvolt = <3300000>;
28 regulator-max-microvolt = <3300000>;
[all …]
/kernel/linux/linux-6.6/arch/riscv/boot/dts/microchip/
Dmpfs-polarberry.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
2 /* Copyright (c) 2020-2022 Microchip Technology Inc */
4 /dts-v1/;
7 #include "mpfs-polarberry-fabric.dtsi"
22 stdout-path = "serial0:115200n8";
26 timebase-frequency = <MTIMER_FREQ>;
45 phy-mode = "sgmii";
46 phy-handle = <&phy0>;
51 phy-mode = "sgmii";
52 phy-handle = <&phy1>;
[all …]
Dmpfs-sev-kit.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
4 /dts-v1/;
7 #include "mpfs-sev-kit-fabric.dtsi"
13 #address-cells = <2>;
14 #size-cells = <2>;
15 model = "Microchip PolarFire-SoC SEV Kit";
16 compatible = "microchip,mpfs-sev-kit", "microchip,mpfs";
28 stdout-path = "serial1:115200n8";
32 timebase-frequency = <MTIMER_FREQ>;
35 reserved-memory {
[all …]
Dmpfs-m100pfsevp.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Original all-in-one devicetree:
4 * Copyright (C) 2021-2022 - Wolfgang Grandegger <wg@aries-embedded.de>
6 * Copyright (C) 2022 - Conor Dooley <conor.dooley@microchip.com>
8 /dts-v1/;
11 #include "mpfs-m100pfs-fabric.dtsi"
33 stdout-path = "serial1:115200n8";
37 timebase-frequency = <MTIMER_FREQ>;
70 pmic-irq-hog {
71 gpio-hog;
[all …]
Dmpfs-icicle-kit.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
2 /* Copyright (c) 2020-2021 Microchip Technology Inc */
4 /dts-v1/;
7 #include "mpfs-icicle-kit-fabric.dtsi"
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/leds/common.h>
15 model = "Microchip PolarFire-SoC Icicle Kit";
16 compatible = "microchip,mpfs-icicle-reference-rtlv2210", "microchip,mpfs-icicle-kit",
29 stdout-path = "serial1:115200n8";
33 timebase-frequency = <RTCCLK_FREQ>;
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/rockchip/
Drk3288-veyron-sdmmc.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
15 sdcard-supply = <&vccio_sd>;
24 sdmmc_bus4: sdmmc-bus4 {
31 sdmmc_clk: sdmmc-clk {
35 sdmmc_cmd: sdmmc-cmd {
45 sdmmc_cd_disabled: sdmmc-cd-disabled {
50 sdmmc_cd_pin: sdmmc-cd-pin {
57 vcc9-supply = <&vcc_5v>;
61 regulator-name = "vccio_sd";
62 regulator-min-microvolt = <1800000>;
[all …]
Drv1126-edgeble-neu2-io.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
9 #include "rv1126-edgeble-neu2.dtsi"
13 compatible = "edgeble,neural-compute-module-2-io",
14 "edgeble,neural-compute-module-2", "rockchip,rv1126";
21 stdout-path = "serial2:1500000n8";
24 vcc12v_dcin: vcc12v-dcin-regulator {
25 compatible = "regulator-fixed";
26 regulator-name = "vcc12v_dcin";
27 regulator-always-on;
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/freescale/
Dfsl-ls1012a-rdb.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include "fsl-ls1012a.dtsi"
15 compatible = "fsl,ls1012a-rdb", "fsl,ls1012a";
29 sd-uhs-sdr104;
30 sd-uhs-sdr50;
31 sd-uhs-sdr25;
32 sd-uhs-sdr12;
37 mmc-hs200-1_8v;
[all …]
Dfsl-lx2160a-clearfog-itx.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 /dts-v1/;
10 #include "fsl-lx2160a-cex7.dtsi"
11 #include <dt-bindings/input/linux-event-codes.h>
20 stdout-path = "serial0:115200n8";
23 gpio-keys {
24 compatible = "gpio-keys";
28 linux,can-disable;
34 sfp0: sfp-0 {
36 i2c-bus = <&sfp0_i2c>;
[all …]
Dfsl-ls1046a-rdb.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for Freescale Layerscape-1046A family SoC.
6 * Copyright 2019-2020 NXP
11 /dts-v1/;
13 #include "fsl-ls1046a.dtsi"
17 compatible = "fsl,ls1046a-rdb", "fsl,ls1046a";
27 stdout-path = "serial0:115200n8";
40 mmc-hs200-1_8v;
41 sd-uhs-sdr104;
42 sd-uhs-sdr50;
[all …]

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