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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/sound/
Drealtek,rt1015p.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Tzung-Bi Shih <tzungbi@google.com>
20 sdb-gpios:
27 - compatible
32 - |
33 #include <dt-bindings/gpio/gpio.h>
37 sdb-gpios = <&pio 175 GPIO_ACTIVE_HIGH>;
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/sound/
Drealtek,rt1015p.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Tzung-Bi Shih <tzungbi@kernel.org>
19 - realtek,rt1015p
20 - realtek,rt1019p
22 sdb-gpios:
28 "#sound-dai-cells":
32 - compatible
37 - |
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/nxp/imx/
Dimx6sx-sdb.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 /dts-v1/;
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
12 model = "Freescale i.MX6 SoloX SDB Board";
13 compatible = "fsl,imx6sx-sdb", "fsl,imx6sx";
16 stdout-path = &uart1;
24 backlight_display: backlight-display {
25 compatible = "pwm-backlight";
27 brightness-levels = <0 4 8 16 32 64 128 255>;
[all …]
Dimx7d-sdb-sht11.dts1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
5 #include "imx7d-sdb.dts"
9 pinctrl-names = "default";
10 pinctrl-0 = <&pinctrl_sensor>;
12 clk-gpios = <&gpio4 12 0>;
13 data-gpios = <&gpio4 13 0>;
14 vcc-supply = <&reg_sht15>;
17 reg_sht15: regulator-sht15 {
18 compatible = "regulator-fixed";
19 regulator-name = "reg_sht15";
[all …]
Dimx7d-sdb.dts1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
5 /dts-v1/;
11 compatible = "fsl,imx7d-sdb", "fsl,imx7d";
19 stdout-path = &uart1;
27 gpio-keys {
28 compatible = "gpio-keys";
29 pinctrl-names = "default";
30 pinctrl-0 = <&pinctrl_gpio_keys>;
32 key-volume-up {
34 gpios = <&gpio5 11 GPIO_ACTIVE_LOW>;
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dimx6sx-sdb.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 /dts-v1/;
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
12 model = "Freescale i.MX6 SoloX SDB Board";
13 compatible = "fsl,imx6sx-sdb", "fsl,imx6sx";
16 stdout-path = &uart1;
24 backlight_display: backlight-display {
25 compatible = "pwm-backlight";
27 brightness-levels = <0 4 8 16 32 64 128 255>;
[all …]
Dimx7d-sdb-sht11.dts1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
5 #include "imx7d-sdb.dts"
9 pinctrl-names = "default";
10 pinctrl-0 = <&pinctrl_sensor>;
12 clk-gpios = <&gpio4 12 0>;
13 data-gpios = <&gpio4 13 0>;
14 vcc-supply = <&reg_sht15>;
17 reg_sht15: regulator-sht15 {
18 compatible = "regulator-fixed";
19 regulator-name = "reg_sht15";
[all …]
Dtegra20-trimslice.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
6 #include "tegra20-cpu-opp.dtsi"
19 stdout-path = "serial0:115200n8";
30 vdd-supply = <&hdmi_vdd_reg>;
31 pll-supply = <&hdmi_pll_reg>;
33 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
34 nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
40 pinctrl-names = "default";
[all …]
Dtegra20-ventana.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
6 #include "tegra20-cpu-opp.dtsi"
19 stdout-path = "serial0:115200n8";
38 vdd-supply = <&hdmi_vdd_reg>;
39 pll-supply = <&hdmi_pll_reg>;
41 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
42 nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
48 pinctrl-names = "default";
[all …]
Dtegra20-harmony.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
18 stdout-path = "serial0:115200n8";
37 hdmi-supply = <&vdd_5v0_hdmi>;
38 vdd-supply = <&hdmi_vdd_reg>;
39 pll-supply = <&hdmi_pll_reg>;
41 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
42 nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
48 pinctrl-names = "default";
[all …]
Dtegra20-tamonten.dtsi1 // SPDX-License-Identifier: GPL-2.0
15 stdout-path = "serial0:115200n8";
24 vdd-supply = <&hdmi_vdd_reg>;
25 pll-supply = <&hdmi_pll_reg>;
27 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
28 nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
34 pinctrl-names = "default";
35 pinctrl-0 = <&state_default>;
152 sdb {
153 nvidia,pins = "sdb", "sdc", "sdd";
[all …]
Dtegra20-seaboard.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
18 stdout-path = "serial0:115200n8";
37 vdd-supply = <&hdmi_vdd_reg>;
38 pll-supply = <&hdmi_pll_reg>;
39 hdmi-supply = <&vdd_hdmi>;
41 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
42 nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
48 pinctrl-names = "default";
[all …]
Dtegra20-paz00.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
6 #include "tegra20-cpu-opp.dtsi"
7 #include "tegra20-cpu-opp-microvolt.dtsi"
21 stdout-path = "serial0:115200n8";
40 vdd-supply = <&hdmi_vdd_reg>;
41 pll-supply = <&hdmi_pll_reg>;
43 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
44 nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
[all …]
Dimx7d-sdb.dts1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
5 /dts-v1/;
11 compatible = "fsl,imx7d-sdb", "fsl,imx7d";
14 stdout-path = &uart1;
22 gpio-keys {
23 compatible = "gpio-keys";
24 pinctrl-names = "default";
25 pinctrl-0 = <&pinctrl_gpio_keys>;
27 volume-up {
29 gpios = <&gpio5 11 GPIO_ACTIVE_LOW>;
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/mediatek/
Dmt8183-kukui-audio-rt1015p.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
11 sdb-gpios = <&pio 175 0>;
Dmt8192-asurada-audio-rt1015p.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/pinctrl/mt8192-pinfunc.h>
10 rt1015p: audio-codec {
12 pinctrl-names = "default";
13 pinctrl-0 = <&rt1015p_pins>;
14 sdb-gpios = <&pio 147 GPIO_ACTIVE_HIGH>;
15 #sound-dai-cells = <0>;
20 rt1015p_pins: rt1015p-default-pins {
23 output-low;
/kernel/linux/linux-6.6/arch/arm/boot/dts/nvidia/
Dtegra20-trimslice.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
6 #include "tegra20-cpu-opp.dtsi"
19 stdout-path = "serial0:115200n8";
30 vdd-supply = <&hdmi_vdd_reg>;
31 pll-supply = <&hdmi_pll_reg>;
33 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
34 nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
40 pinctrl-names = "default";
[all …]
Dtegra20-ventana.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
5 #include <dt-bindings/thermal/thermal.h>
7 #include "tegra20-cpu-opp.dtsi"
8 #include "tegra20-cpu-opp-microvolt.dtsi"
21 stdout-path = "serial0:115200n8";
40 vdd-supply = <&hdmi_vdd_reg>;
41 pll-supply = <&hdmi_pll_reg>;
43 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
[all …]
Dtegra20-harmony.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
18 stdout-path = "serial0:115200n8";
37 hdmi-supply = <&vdd_5v0_hdmi>;
38 vdd-supply = <&hdmi_vdd_reg>;
39 pll-supply = <&hdmi_pll_reg>;
41 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
42 nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
48 pinctrl-names = "default";
[all …]
Dtegra20-tamonten.dtsi1 // SPDX-License-Identifier: GPL-2.0
15 stdout-path = "serial0:115200n8";
24 vdd-supply = <&hdmi_vdd_reg>;
25 pll-supply = <&hdmi_pll_reg>;
27 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
28 nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
34 pinctrl-names = "default";
35 pinctrl-0 = <&state_default>;
152 sdb {
153 nvidia,pins = "sdb", "sdc", "sdd";
[all …]
Dtegra20-seaboard.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
18 stdout-path = "serial0:115200n8";
37 vdd-supply = <&hdmi_vdd_reg>;
38 pll-supply = <&hdmi_pll_reg>;
39 hdmi-supply = <&vdd_hdmi>;
41 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
42 nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
48 pinctrl-names = "default";
[all …]
Dtegra20-paz00.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
5 #include <dt-bindings/thermal/thermal.h>
8 #include "tegra20-cpu-opp.dtsi"
9 #include "tegra20-cpu-opp-microvolt.dtsi"
25 stdout-path = "serial0:115200n8";
44 vdd-supply = <&hdmi_vdd_reg>;
45 pll-supply = <&hdmi_pll_reg>;
47 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
[all …]
Dtegra20-asus-tf101.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/atmel-maxtouch.h>
5 #include <dt-bindings/input/gpio-keys.h>
6 #include <dt-bindings/input/input.h>
7 #include <dt-bindings/thermal/thermal.h>
10 #include "tegra20-cpu-opp.dtsi"
11 #include "tegra20-cpu-opp-microvolt.dtsi"
16 chassis-type = "convertible";
33 * pre-existing /chosen node to be available to insert the
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/leds/
Dleds-is31fl319x.txt4 - compatible : Should be any of
10 "si-en,sn3199".
11 - #address-cells: Must be 1.
12 - #size-cells: Must be 0.
13 - reg: 0x64, 0x65, 0x66, or 0x67.
16 - audio-gain-db : audio gain selection for external analog modulation input.
17 Valid values: 0 - 21, step by 3 (rounded down)
19 - shutdown-gpios : Specifier of the GPIO connected to SDB pin of the chip.
21 Each led is represented as a sub-node of the issi,is31fl319x device.
24 Required led sub-node properties:
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/leds/
Dissi,is31fl319x.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Vincent Knecht <vincent.knecht@mailoo.org>
14 Previously known as Si-En SN319{0,1,3,6,9}.
26 - issi,is31fl3190
27 - issi,is31fl3191
28 - issi,is31fl3193
29 - issi,is31fl3196
30 - issi,is31fl3199
[all …]

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