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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/clock/
Dmvebu-gated-clock.txt12 -----------------------------------
18 5 pex0 PCIe Cntrl 0
21 17 sdio SDHCI Host
29 -----------------------------------
33 5 pex0 PCIe 0 Clock out
40 17 sdio SDHCI Host
56 -----------------------------------
61 5 pex1 PCIe 1
83 -----------------------------------
84 5 pex1 PCIe 1
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/clock/
Dmvebu-gated-clock.txt12 -----------------------------------
18 5 pex0 PCIe Cntrl 0
21 17 sdio SDHCI Host
29 -----------------------------------
33 5 pex0 PCIe 0 Clock out
40 17 sdio SDHCI Host
56 -----------------------------------
61 5 pex1 PCIe 1
83 -----------------------------------
84 5 pex1 PCIe 1
[all …]
/kernel/linux/linux-5.10/drivers/mmc/host/
Dsdhci-of-hlwd.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * drivers/mmc/host/sdhci-of-hlwd.c
9 * Based on sdhci-of-esdhc.c
21 #include "sdhci-pltfm.h"
24 * Ops and quirks for the Nintendo Wii SDHCI controllers.
30 #define SDHCI_HLWD_WRITE_DELAY 5 /* usecs */
75 { .compatible = "nintendo,hollywood-sdhci" },
82 .name = "sdhci-hlwd",
93 MODULE_DESCRIPTION("Nintendo Wii SDHCI OF driver");
/kernel/linux/linux-6.6/drivers/mmc/host/
Dsdhci-of-hlwd.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * drivers/mmc/host/sdhci-of-hlwd.c
9 * Based on sdhci-of-esdhc.c
21 #include "sdhci-pltfm.h"
24 * Ops and quirks for the Nintendo Wii SDHCI controllers.
30 #define SDHCI_HLWD_WRITE_DELAY 5 /* usecs */
75 { .compatible = "nintendo,hollywood-sdhci" },
82 .name = "sdhci-hlwd",
93 MODULE_DESCRIPTION("Nintendo Wii SDHCI OF driver");
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/mmc/
Dsamsung,s3c6410-sdhci.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/mmc/samsung,s3c6410-sdhci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Samsung SoC SDHCI Controller
10 - Jaehoon Chung <jh80.chung@samsung.com>
11 - Krzysztof Kozlowski <krzk@kernel.org>
16 - samsung,s3c6410-sdhci
17 - samsung,exynos4210-sdhci
24 maxItems: 5
[all …]
Dsnps,dwcmshc-sdhci.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/mmc/snps,dwcmshc-sdhci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ulf Hansson <ulf.hansson@linaro.org>
11 - Jisheng Zhang <Jisheng.Zhang@synaptics.com>
14 - $ref: mmc-controller.yaml#
19 - rockchip,rk3568-dwcmshc
20 - rockchip,rk3588-dwcmshc
21 - snps,dwcmshc-sdhci
[all …]
/kernel/linux/linux-5.10/arch/arm/mach-s3c/
Dsetup-sdhci-gpio-s3c24xx.c1 // SPDX-License-Identifier: GPL-2.0
6 // S3C2416 - Helper functions for setting up SDHCI device(s) GPIO (HSMMC)
8 // Based on mach-s3c64xx/setup-sdhci-gpio.c
17 #include "regs-gpio.h"
18 #include "gpio-samsung.h"
19 #include "gpio-cfg.h"
20 #include "sdhci.h"
24 s3c_gpio_cfgrange_nopull(S3C2410_GPE(5), 2 + width, S3C_GPIO_SFN(2)); in s3c2416_setup_sdhci0_cfg_gpio()
Ds3c6400.c1 // SPDX-License-Identifier: GPL-2.0
31 #include "regs-clock.h"
35 #include "sdhci.h"
36 #include "iic-core.h"
39 #include "onenand-core-s3c64xx.h"
43 /* setup SDHCI */ in s3c6400_map_io()
50 s3c_i2c0_setname("s3c2440-i2c"); in s3c6400_map_io()
52 s3c_device_nand.name = "s3c6400-nand"; in s3c6400_map_io()
54 s3c_onenand_setname("s3c6400-onenand"); in s3c6400_map_io()
55 s3c64xx_onenand1_setname("s3c6400-onenand"); in s3c6400_map_io()
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Ds3c64xx.dtsi1 // SPDX-License-Identifier: GPL-2.0
16 #include <dt-bindings/clock/samsung,s3c64xx-clock.h>
19 #address-cells = <1>;
20 #size-cells = <1>;
32 #address-cells = <1>;
33 #size-cells = <0>;
37 compatible = "arm,arm1176jzf-s";
43 compatible = "simple-bus";
44 #address-cells = <1>;
45 #size-cells = <1>;
[all …]
Dtegra114.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra114-car.h>
3 #include <dt-bindings/gpio/tegra-gpio.h>
4 #include <dt-bindings/memory/tegra114-mc.h>
5 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/soc/tegra-pmc.h>
11 interrupt-parent = <&lic>;
12 #address-cells = <1>;
13 #size-cells = <1>;
[all …]
Dqcom-apq8084.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/clock/qcom,gcc-apq8084.h>
6 #include <dt-bindings/gpio/gpio.h>
9 #address-cells = <1>;
10 #size-cells = <1>;
13 interrupt-parent = <&intc>;
15 reserved-memory {
16 #address-cells = <1>;
[all …]
/kernel/linux/linux-5.10/arch/arm/mach-mmp/
Dmmp2.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * linux/arch/arm/mach-mmp/mmp2.c
18 #include <asm/hardware/cache-tauros2.h>
21 #include "addr-map.h"
22 #include "regs-apbc.h"
28 #include "pm-mmp2.h"
137 /* on-chip devices */
138 MMP2_DEVICE(uart1, "pxa2xx-uart", 0, UART1, 0xd4030000, 0x30, 4, 5);
139 MMP2_DEVICE(uart2, "pxa2xx-uart", 1, UART2, 0xd4017000, 0x30, 20, 21);
140 MMP2_DEVICE(uart3, "pxa2xx-uart", 2, UART3, 0xd4018000, 0x30, 22, 23);
[all …]
/kernel/linux/linux-6.6/drivers/clk/samsung/
Dclk-s3c64xx.c1 // SPDX-License-Identifier: GPL-2.0-only
9 #include <linux/clk-provider.h>
14 #include <dt-bindings/clock/samsung,s3c64xx-clock.h>
17 #include "clk-pll.h"
98 /* S3C6400-specific parent clocks. */
103 /* S3C6410-specific parent clocks. */
142 MUX(MOUT_UHOST, "mout_uhost", uhost_p6400, CLK_SRC, 5, 2),
150 MUX(MOUT_UHOST, "mout_uhost", uhost_p6410, CLK_SRC, 5, 2),
216 GATE_BUS(HCLK_POST0, "hclk_post0", "hclk", HCLK_GATE, 5),
240 GATE_BUS(PCLK_WDT, "pclk_wdt", "pclk", PCLK_GATE, 5),
[all …]
/kernel/linux/linux-5.10/drivers/clk/samsung/
Dclk-s3c64xx.c1 // SPDX-License-Identifier: GPL-2.0-only
9 #include <linux/clk-provider.h>
14 #include <dt-bindings/clock/samsung,s3c64xx-clock.h>
17 #include "clk-pll.h"
98 /* S3C6400-specific parent clocks. */
103 /* S3C6410-specific parent clocks. */
142 MUX(MOUT_UHOST, "mout_uhost", uhost_p6400, CLK_SRC, 5, 2),
150 MUX(MOUT_UHOST, "mout_uhost", uhost_p6410, CLK_SRC, 5, 2),
216 GATE_BUS(HCLK_POST0, "hclk_post0", "hclk", HCLK_GATE, 5),
240 GATE_BUS(PCLK_WDT, "pclk_wdt", "pclk", PCLK_GATE, 5),
[all …]
Dclk-s3c2443.c1 // SPDX-License-Identifier: GPL-2.0-only
8 #include <linux/clk-provider.h>
15 #include <dt-bindings/clock/s3c2443.h>
18 #include "clk-pll.h"
89 { .val = 2, .div = 5 },
92 { .val = 5, .div = 11 },
121 GATE(HCLK_USBD, "usb-device", "hclk", HCLKCON, 12, 0, 0),
122 GATE(HCLK_USBH, "usb-host", "hclk", HCLKCON, 11, 0, 0),
124 GATE(HCLK_DMA5, "dma5", "hclk", HCLKCON, 5, CLK_IGNORE_UNUSED, 0),
152 ALIAS(PCLK_UART0, "s3c2440-uart.0", "uart"),
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/qcom/
Dsm6115p-lenovo-j606f.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
6 /dts-v1/;
14 chassis-type = "tablet";
17 qcom,msm-id = <445 0x10000>, <420 0x10000>;
18 qcom,board-id = <34 3>;
25 #address-cells = <2>;
26 #size-cells = <2>;
29 framebuffer0: framebuffer@5c000000 {
30 compatible = "simple-framebuffer";
40 gpio-keys {
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/marvell/
Darmada-37xx.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 * Gregory CLEMENT <gregory.clement@free-electrons.com>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
16 interrupt-parent = <&gic>;
17 #address-cells = <2>;
18 #size-cells = <2>;
25 reserved-memory {
26 #address-cells = <2>;
27 #size-cells = <2>;
34 psci-area@4000000 {
[all …]
/kernel/linux/linux-6.6/arch/powerpc/boot/dts/
Dwii.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * Copyright (C) 2008-2009 The GameCube Linux Team
10 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/input/input.h>
15 * This is commented-out for now.
25 #address-cells = <1>;
26 #size-cells = <1>;
29 bootargs = "root=/dev/mmcblk0p2 rootwait udbg-immortal";
34 reg = <0x00000000 0x01800000 /* MEM1 24MB 1T-SRAM */
[all …]
/kernel/linux/linux-5.10/arch/powerpc/boot/dts/
Dwii.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * Copyright (C) 2008-2009 The GameCube Linux Team
10 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/input/input.h>
15 * This is commented-out for now.
25 #address-cells = <1>;
26 #size-cells = <1>;
29 bootargs = "root=/dev/mmcblk0p2 rootwait udbg-immortal";
34 reg = <0x00000000 0x01800000 /* MEM1 24MB 1T-SRAM */
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/pinctrl/
Dpinctrl_spear.txt4 - compatible : "st,spear300-pinmux"
5 : "st,spear310-pinmux"
6 : "st,spear320-pinmux"
7 : "st,spear1310-pinmux"
8 : "st,spear1340-pinmux"
9 - reg : Address range of the pinctrl registers
10 - st,pinmux-mode: Mandatory for SPEAr300 and SPEAr320 and invalid for others.
11 - Its values for SPEAr300:
12 - NAND_MODE : <0>
13 - NOR_MODE : <1>
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/pinctrl/
Dpinctrl_spear.txt4 - compatible : "st,spear300-pinmux"
5 : "st,spear310-pinmux"
6 : "st,spear320-pinmux"
7 : "st,spear1310-pinmux"
8 : "st,spear1340-pinmux"
9 - reg : Address range of the pinctrl registers
10 - st,pinmux-mode: Mandatory for SPEAr300 and SPEAr320 and invalid for others.
11 - Its values for SPEAr300:
12 - NAND_MODE : <0>
13 - NOR_MODE : <1>
[all …]
/kernel/linux/linux-6.6/include/linux/platform_data/
Dpxa_sdhci.h1 /* SPDX-License-Identifier: GPL-2.0-only */
8 * PXA Platform - SDHCI platform data definitions
17 /* card always wired to host, like on-chip emmc */
19 /* Board design supports 8-bit data on SD/SDIO BUS */
23 * struct pxa_sdhci_platdata() - Platform device data for PXA SDHCI
26 * mmp2: each step is roughly 100ps, 5bits width
/kernel/linux/linux-5.10/include/linux/platform_data/
Dpxa_sdhci.h1 /* SPDX-License-Identifier: GPL-2.0-only */
8 * PXA Platform - SDHCI platform data definitions
17 /* card always wired to host, like on-chip emmc */
19 /* Board design supports 8-bit data on SD/SDIO BUS */
23 * struct pxa_sdhci_platdata() - Platform device data for PXA SDHCI
26 * mmp2: each step is roughly 100ps, 5bits width
/kernel/linux/linux-6.6/drivers/pinctrl/mediatek/
Dpinctrl-mt7621.c1 // SPDX-License-Identifier: GPL-2.0-only
6 #include "pinctrl-mtmips.h"
14 #define MT7621_GPIO_MODE_UART2_SHIFT 5
40 FUNC("uart3", 0, 5, 4),
41 FUNC("i2s", 2, 5, 4),
42 FUNC("spdif3", 3, 5, 4),
49 static struct mtmips_pmx_func jtag_grp[] = { FUNC("jtag", 0, 13, 5) };
65 FUNC("sdhci", 0, 41, 8),
87 GRP_G("sdhci", sdhci_grp, MT7621_GPIO_MODE_SDHCI_MASK,
99 { .compatible = "ralink,mt7621-pinctrl" },
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/nvidia/
Dtegra114.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra114-car.h>
3 #include <dt-bindings/gpio/tegra-gpio.h>
4 #include <dt-bindings/memory/tegra114-mc.h>
5 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/soc/tegra-pmc.h>
11 interrupt-parent = <&lic>;
12 #address-cells = <1>;
13 #size-cells = <1>;
[all …]

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