| /kernel/linux/linux-6.6/arch/arm/mach-lpc32xx/ |
| D | suspend.S | 1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * arch/arm/mach-lpc32xx/suspend.S
39 stmfd r0!, {r3 - r7, sp, lr}
63 @ Setup self-refresh with support for manual exit of
64 @ self-refresh mode
70 @ Wait for self-refresh acknowledge, clocks to the DRAM device
71 @ will automatically stop on start of self-refresh
76 bne 3b @ Branch until self-refresh mode starts
78 @ Enter direct-run mode from run mode
113 @ Re-enter run mode with self-refresh flag cleared, but no DRAM
[all …]
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| /kernel/linux/linux-5.10/arch/arm/mach-lpc32xx/ |
| D | suspend.S | 2 * arch/arm/mach-lpc32xx/suspend.S
41 stmfd r0!, {r3 - r7, sp, lr}
65 @ Setup self-refresh with support for manual exit of
66 @ self-refresh mode
72 @ Wait for self-refresh acknowledge, clocks to the DRAM device
73 @ will automatically stop on start of self-refresh
78 bne 3b @ Branch until self-refresh mode starts
80 @ Enter direct-run mode from run mode
115 @ Re-enter run mode with self-refresh flag cleared, but no DRAM
116 @ update yet. DRAM is still in self-refresh
[all …]
|
| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/memory-controllers/ |
| D | rockchip,rk3399-dmc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/rockchip,rk3399-dmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Brian Norris <briannorris@chromium.org>
15 - rockchip,rk3399-dmc
17 devfreq-events:
21 Documentation/devicetree/bindings/devfreq/event/rockchip-dfi.txt.
26 clock-names:
28 - const: dmc_clk
[all …]
|
| /kernel/linux/linux-6.6/include/soc/at91/ |
| D | sama7-ddr.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
44 #define DDR3PHY_ZQ0SR0_PDO_OFF (0) /* Pull-down output impedance select offset */
45 #define DDR3PHY_ZQ0SR0_PUO_OFF (5) /* Pull-up output impedance select offset */
46 #define DDR3PHY_ZQ0SR0_PDODT_OFF (10) /* Pull-down on-die termination impedance select offset */
47 #define DDR3PHY_ZQ0SRO_PUODT_OFF (15) /* Pull-up on-die termination impedance select offset */
55 #define UDDRC_STAT_SELFREF_TYPE_DIS (0x0 << 4) /* SDRAM is not in Self-refresh */
56 #define UDDRC_STAT_SELFREF_TYPE_PHY (0x1 << 4) /* SDRAM is in Self-refresh, which was caused by PH…
57 …ELFREF_TYPE_SW (0x2 << 4) /* SDRAM is in Self-refresh, which was not caused solely under Automatic…
58 …TAT_SELFREF_TYPE_AUTO (0x3 << 4) /* SDRAM is in Self-refresh, which was caused by Automatic Self-r…
59 #define UDDRC_STAT_SELFREF_TYPE_MSK (0x3 << 4) /* Self-refresh type mask */
[all …]
|
| /kernel/linux/linux-6.6/drivers/gpu/drm/ |
| D | drm_self_refresh_helper.c | 1 // SPDX-License-Identifier: MIT
27 * framework to implement panel self refresh (SR) support. Drivers are
31 * &drm_connector_state.self_refresh_aware to true at runtime if it is SR-aware
32 * (meaning it knows how to initiate self refresh on the panel).
38 * that tells you to disable/enable SR on the panel instead of power-cycling it.
72 struct drm_crtc *crtc = sr_data->crtc; in drm_self_refresh_helper_entry_work()
73 struct drm_device *dev = crtc->dev; in drm_self_refresh_helper_entry_work()
85 ret = -ENOMEM; in drm_self_refresh_helper_entry_work()
90 state->acquire_ctx = &ctx; in drm_self_refresh_helper_entry_work()
98 if (!crtc_state->enable) in drm_self_refresh_helper_entry_work()
[all …]
|
| /kernel/linux/linux-5.10/drivers/gpu/drm/ |
| D | drm_self_refresh_helper.c | 1 // SPDX-License-Identifier: MIT
27 * framework to implement panel self refresh (SR) support. Drivers are
31 * &drm_connector_state.self_refresh_aware to true at runtime if it is SR-aware
32 * (meaning it knows how to initiate self refresh on the panel).
38 * that tells you to disable/enable SR on the panel instead of power-cycling it.
72 struct drm_crtc *crtc = sr_data->crtc; in drm_self_refresh_helper_entry_work()
73 struct drm_device *dev = crtc->dev; in drm_self_refresh_helper_entry_work()
85 ret = -ENOMEM; in drm_self_refresh_helper_entry_work()
90 state->acquire_ctx = &ctx; in drm_self_refresh_helper_entry_work()
98 if (!crtc_state->enable) in drm_self_refresh_helper_entry_work()
[all …]
|
| /kernel/linux/linux-5.10/arch/arm/mach-socfpga/ |
| D | self-refresh.S | 1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (C) 2014-2015 Altera Corporation. All rights reserved.
32 .arch armv7-a
44 * return value: lower 16 bits: loop count going into self refresh
45 * upper 16 bits: loop count exiting self refresh
53 /* Enable self refresh: set sdr.ctrlgrp.lowpwreq.selfrshreq = 1 */
89 /* Disable self-refresh: set sdr.ctrlgrp.lowpwreq.selfrshreq = 0 */
109 * Shift loop count for exiting self refresh into upper 16 bits.
110 * Leave loop count for requesting self refresh in lower 16 bits.
125 .word . - socfpga_sdram_self_refresh
|
| /kernel/linux/linux-6.6/arch/arm/mach-socfpga/ |
| D | self-refresh.S | 1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (C) 2014-2015 Altera Corporation. All rights reserved.
32 .arch armv7-a
44 * return value: lower 16 bits: loop count going into self refresh
45 * upper 16 bits: loop count exiting self refresh
53 /* Enable self refresh: set sdr.ctrlgrp.lowpwreq.selfrshreq = 1 */
89 /* Disable self-refresh: set sdr.ctrlgrp.lowpwreq.selfrshreq = 0 */
109 * Shift loop count for exiting self refresh into upper 16 bits.
110 * Leave loop count for requesting self refresh in lower 16 bits.
125 .word . - socfpga_sdram_self_refresh
|
| /kernel/linux/linux-6.6/tools/perf/pmu-events/arch/arm64/freescale/yitian710/sys/ |
| D | ali_drw.json | 24 "BriefDescription": "A Read-Modify-Write Op at HIF interface. The unit is 64B.",
136 "BriefDescription": "A read-write turnaround.",
150 "BriefDescription": "A Write-After-Read hazard.",
157 "BriefDescription": "A Read-After-Write hazard.",
164 "BriefDescription": "A Write-After-Write hazard.",
171 "BriefDescription": "Rank0 enters self-refresh(SRE).",
178 "BriefDescription": "Rank1 enters self-refresh(SRE).",
185 "BriefDescription": "Rank2 enters self-refresh(SRE).",
192 "BriefDescription": "Rank3 enters self-refresh(SRE).",
199 "BriefDescription": "Rank0 enters power-down(PDE).",
[all …]
|
| /kernel/linux/linux-5.10/arch/arm/mach-pxa/ |
| D | sleep.S | 2 * Low-level PXA250/210 sleep/wakeUp support
18 #include <mach/pxa2xx-regs.h>
27 * pxa3xx_finish_suspend() - forces CPU into sleep state (S2D3C4)
54 @ prepare SDRAM refresh settings
58 @ enable SDRAM self-refresh mode
61 @ set SDCLKx divide-by-2 bits (this is part of a workaround for Errata 50)
95 @ prepare SDRAM refresh settings
99 @ enable SDRAM self-refresh mode
106 @ We keep the change-down close to the actual suspend on SDRAM
107 @ as possible to eliminate messing about with the refresh clock
[all …]
|
| /kernel/linux/linux-6.6/arch/arm/mach-pxa/ |
| D | sleep.S | 2 * Low-level PXA250/210 sleep/wakeUp support
17 #include "pxa2xx-regs.h"
28 * pxa3xx_finish_suspend() - forces CPU into sleep state (S2D3C4)
55 @ prepare SDRAM refresh settings
59 @ enable SDRAM self-refresh mode
62 @ set SDCLKx divide-by-2 bits (this is part of a workaround for Errata 50)
96 @ prepare SDRAM refresh settings
100 @ enable SDRAM self-refresh mode
107 @ We keep the change-down close to the actual suspend on SDRAM
108 @ as possible to eliminate messing about with the refresh clock
[all …]
|
| /kernel/linux/linux-6.6/drivers/cpuidle/ |
| D | cpuidle-zynq.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2012-2013 Xilinx
7 * based on arch/arm/mach-at91/cpuidle.c
9 * The cpu idle uses wait-for-interrupt and RAM self refresh in order
10 * to implement two idle states -
11 * #1 wait-for-interrupt
12 * #2 wait-for-interrupt and RAM self refresh
28 /* Add code for DDR self refresh start */ in zynq_enter_idle()
44 .desc = "WFI and RAM Self Refresh",
61 .name = "cpuidle-zynq",
|
| /kernel/linux/linux-5.10/drivers/cpuidle/ |
| D | cpuidle-zynq.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2012-2013 Xilinx
7 * based on arch/arm/mach-at91/cpuidle.c
9 * The cpu idle uses wait-for-interrupt and RAM self refresh in order
10 * to implement two idle states -
11 * #1 wait-for-interrupt
12 * #2 wait-for-interrupt and RAM self refresh
28 /* Add code for DDR self refresh start */ in zynq_enter_idle()
44 .desc = "WFI and RAM Self Refresh",
61 .name = "cpuidle-zynq",
|
| /kernel/linux/linux-6.6/arch/sh/boards/mach-kfr2r09/ |
| D | sdram.S | 1 /* SPDX-License-Identifier: GPL-2.0
3 * KFR2R09 sdram self/auto-refresh setup code
11 #include <asm/asm-offsets.h>
13 #include <asm/romimage-macros.h>
15 /* code to enter and leave self-refresh. must be self-contained.
16 * this code will be copied to on-chip memory and executed from there.
21 /* DBSC: put memory in self-refresh mode */
37 /* DBSC: put memory in auto-refresh mode */
55 /* DBSC: re-initialize and put in auto-refresh */
|
| /kernel/linux/linux-5.10/arch/sh/boards/mach-kfr2r09/ |
| D | sdram.S | 1 /* SPDX-License-Identifier: GPL-2.0
3 * KFR2R09 sdram self/auto-refresh setup code
11 #include <asm/asm-offsets.h>
13 #include <asm/romimage-macros.h>
15 /* code to enter and leave self-refresh. must be self-contained.
16 * this code will be copied to on-chip memory and executed from there.
21 /* DBSC: put memory in self-refresh mode */
37 /* DBSC: put memory in auto-refresh mode */
55 /* DBSC: re-initialize and put in auto-refresh */
|
| /kernel/linux/linux-6.6/arch/sh/boards/mach-migor/ |
| D | sdram.S | 1 /* SPDX-License-Identifier: GPL-2.0
3 * Migo-R sdram self/auto-refresh setup code
11 #include <asm/asm-offsets.h>
13 #include <asm/romimage-macros.h>
15 /* code to enter and leave self-refresh. must be self-contained.
16 * this code will be copied to on-chip memory and executed from there.
21 /* SBSC: disable power down and put in self-refresh mode */
42 /* SBSC: set auto-refresh mode */
51 mov #-1, r4
|
| /kernel/linux/linux-5.10/arch/sh/boards/mach-migor/ |
| D | sdram.S | 1 /* SPDX-License-Identifier: GPL-2.0
3 * Migo-R sdram self/auto-refresh setup code
11 #include <asm/asm-offsets.h>
13 #include <asm/romimage-macros.h>
15 /* code to enter and leave self-refresh. must be self-contained.
16 * this code will be copied to on-chip memory and executed from there.
21 /* SBSC: disable power down and put in self-refresh mode */
42 /* SBSC: set auto-refresh mode */
51 mov #-1, r4
|
| /kernel/linux/linux-6.6/arch/sh/boards/mach-ap325rxa/ |
| D | sdram.S | 1 /* SPDX-License-Identifier: GPL-2.0
3 * AP325RXA sdram self/auto-refresh setup code
11 #include <asm/asm-offsets.h>
13 #include <asm/romimage-macros.h>
15 /* code to enter and leave self-refresh. must be self-contained.
16 * this code will be copied to on-chip memory and executed from there.
21 /* SBSC: disable power down and put in self-refresh mode */
42 /* SBSC: set auto-refresh mode */
51 mov #-1, r4
|
| /kernel/linux/linux-5.10/arch/sh/boards/mach-ap325rxa/ |
| D | sdram.S | 1 /* SPDX-License-Identifier: GPL-2.0
3 * AP325RXA sdram self/auto-refresh setup code
11 #include <asm/asm-offsets.h>
13 #include <asm/romimage-macros.h>
15 /* code to enter and leave self-refresh. must be self-contained.
16 * this code will be copied to on-chip memory and executed from there.
21 /* SBSC: disable power down and put in self-refresh mode */
42 /* SBSC: set auto-refresh mode */
51 mov #-1, r4
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/devfreq/ |
| D | rk3399_dmc.txt | 4 - compatible: Must be "rockchip,rk3399-dmc".
5 - devfreq-events: Node to get DDR loading, Refer to
7 rockchip-dfi.txt
8 - clocks: Phandles for clock specified in "clock-names" property
9 - clock-names : The name of clock used by the DFI, must be
11 - operating-points-v2: Refer to Documentation/devicetree/bindings/opp/opp.txt
13 - center-supply: DMC supply node.
14 - status: Marks the node enabled/disabled.
17 - interrupts: The CPU interrupt number. The interrupt specifier
21 - rockchip,pmu: Phandle to the syscon managing the "PMU general register
[all …]
|
| /kernel/linux/linux-5.10/arch/sh/boards/mach-ecovec24/ |
| D | sdram.S | 1 /* SPDX-License-Identifier: GPL-2.0
3 * Ecovec24 sdram self/auto-refresh setup code
11 #include <asm/asm-offsets.h>
13 #include <asm/romimage-macros.h>
15 /* code to enter and leave self-refresh. must be self-contained.
16 * this code will be copied to on-chip memory and executed from there.
21 /* DBSC: put memory in self-refresh mode */
41 /* DBSC: put memory in auto-refresh mode */
55 /* DBSC: re-initialize and put in auto-refresh */
|
| /kernel/linux/linux-6.6/arch/sh/boards/mach-ecovec24/ |
| D | sdram.S | 1 /* SPDX-License-Identifier: GPL-2.0
3 * Ecovec24 sdram self/auto-refresh setup code
11 #include <asm/asm-offsets.h>
13 #include <asm/romimage-macros.h>
15 /* code to enter and leave self-refresh. must be self-contained.
16 * this code will be copied to on-chip memory and executed from there.
21 /* DBSC: put memory in self-refresh mode */
41 /* DBSC: put memory in auto-refresh mode */
55 /* DBSC: re-initialize and put in auto-refresh */
|
| /kernel/linux/linux-5.10/arch/sh/kernel/cpu/shmobile/ |
| D | pm.c | 1 // SPDX-License-Identifier: GPL-2.0
28 * Sleep Self-Refresh mode is above plus RAM put in Self-Refresh
29 * Standby Self-Refresh mode is above plus stopped clocks
37 * U-standby mode is unsupported since it needs bootloader hacks
62 /* Let assembly snippet in on-chip memory handle the rest */ in sh_mobile_call_standby()
88 sdp->addr.stbcr = 0xa4150020; /* STBCR */ in sh_mobile_register_self_refresh()
89 sdp->addr.bar = 0xa4150040; /* BAR */ in sh_mobile_register_self_refresh()
90 sdp->addr.pteh = 0xff000000; /* PTEH */ in sh_mobile_register_self_refresh()
91 sdp->addr.ptel = 0xff000004; /* PTEL */ in sh_mobile_register_self_refresh()
92 sdp->addr.ttb = 0xff000008; /* TTB */ in sh_mobile_register_self_refresh()
[all …]
|
| /kernel/linux/linux-6.6/arch/sh/kernel/cpu/shmobile/ |
| D | pm.c | 1 // SPDX-License-Identifier: GPL-2.0
28 * Sleep Self-Refresh mode is above plus RAM put in Self-Refresh
29 * Standby Self-Refresh mode is above plus stopped clocks
37 * U-standby mode is unsupported since it needs bootloader hacks
62 /* Let assembly snippet in on-chip memory handle the rest */ in sh_mobile_call_standby()
88 sdp->addr.stbcr = 0xa4150020; /* STBCR */ in sh_mobile_register_self_refresh()
89 sdp->addr.bar = 0xa4150040; /* BAR */ in sh_mobile_register_self_refresh()
90 sdp->addr.pteh = 0xff000000; /* PTEH */ in sh_mobile_register_self_refresh()
91 sdp->addr.ptel = 0xff000004; /* PTEL */ in sh_mobile_register_self_refresh()
92 sdp->addr.ttb = 0xff000008; /* TTB */ in sh_mobile_register_self_refresh()
[all …]
|
| /kernel/linux/linux-6.6/arch/arm/mach-at91/ |
| D | pm_suspend.S | 1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * arch/arm/mach-at91/pm_slow_clock.S
13 #include "pm_data-offsets.h"
16 .arch armv7-a
92 * @ena: 0 - disable regulator
93 * 1 - enable regulator
125 * Enable self-refresh
164 /* Switch to self-refresh. */
170 /* Wait for self-refresh enter. */
176 /* Disable DX DLLs for non-backup modes. */
[all …]
|