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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/pinctrl/
Dmicrochip,sparx5-sgpio.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/microchip,sparx5-sgpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Microsemi/Microchip Serial GPIO controller
10 - Lars Povlsen <lars.povlsen@microchip.com>
21 pattern: "^gpio@[0-9a-f]+$"
25 - microchip,sparx5-sgpio
26 - mscc,ocelot-sgpio
27 - mscc,luton-sgpio
[all …]
/kernel/linux/linux-6.6/drivers/pinctrl/
Dpinctrl-lpc18xx.c18 #include <linux/pinctrl/pinconf-generic.h>
24 #include "pinctrl-utils.h"
68 TYPE_ND, /* Normal-drive */
69 TYPE_HD, /* High-drive */
70 TYPE_HS, /* High-speed */
146 [FUNC_GPIO] = "gpio",
164 [FUNC_SGPIO] = "sgpio",
240 LPC_P(0,0, GPIO, SSP1, ENET, SGPIO, R, R, I2S0_TX_WS,I2S1, 0, ND);
241 LPC_P(0,1, GPIO, SSP1,ENET_ALT,SGPIO, R, R, ENET, I2S1, 0, ND);
242 LPC_P(1,0, GPIO, CTIN, EMC, R, R, SSP0, SGPIO, R, 0, ND);
[all …]
Dpinctrl-microchip-sgpio.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Microsemi/Microchip SoCs serial gpio driver
13 #include <linux/gpio/driver.h>
107 static const char * const functions[] = { "gpio" };
112 struct gpio_chip gpio; member
138 addr->port = pin / priv->bitcount; in sgpio_pin_to_addr()
139 addr->bit = pin % priv->bitcount; in sgpio_pin_to_addr()
144 return bit + port * priv->bitcount; in sgpio_addr_to_pin()
149 return (priv->properties->regoff[rno] + off) * in sgpio_get_addr()
150 regmap_get_reg_stride(priv->regs); in sgpio_get_addr()
[all …]
/kernel/linux/linux-5.10/drivers/pinctrl/
Dpinctrl-lpc18xx.c19 #include <linux/pinctrl/pinconf-generic.h>
22 #include "pinctrl-utils.h"
66 TYPE_ND, /* Normal-drive */
67 TYPE_HD, /* High-drive */
68 TYPE_HS, /* High-speed */
144 [FUNC_GPIO] = "gpio",
162 [FUNC_SGPIO] = "sgpio",
238 LPC_P(0,0, GPIO, SSP1, ENET, SGPIO, R, R, I2S0_TX_WS,I2S1, 0, ND);
239 LPC_P(0,1, GPIO, SSP1,ENET_ALT,SGPIO, R, R, ENET, I2S1, 0, ND);
240 LPC_P(1,0, GPIO, CTIN, EMC, R, R, SSP0, SGPIO, R, 0, ND);
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/gpio/
Daspeed,sgpio.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpio/aspeed,sgpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Aspeed SGPIO controller
10 - Andrew Jeffery <andrew@aj.id.au>
13 This SGPIO controller is for ASPEED AST2400, AST2500 and AST2600 SoC,
14 AST2600 have two sgpio master one with 128 pins another one with 80 pins,
15 AST2500/AST2400 have one sgpio master with 80 pins. Each of the Serial
16 GPIO pins can be programmed to support the following options
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/gpio/
Dsgpio-aspeed.txt1 Aspeed SGPIO controller Device Tree Bindings
2 --------------------------------------------
4 This SGPIO controller is for ASPEED AST2500 SoC, it supports up to 80 full
5 featured Serial GPIOs. Each of the Serial GPIO pins can be programmed to
7 - Support interrupt option for each input port and various interrupt
8 sensitivity option (level-high, level-low, edge-high, edge-low)
9 - Support reset tolerance option for each output port
10 - Directly connected to APB bus and its shift clock is from APB bus clock
12 - Co-work with external signal-chained TTL components (74LV165/74LV595)
16 - compatible : Should be one of
[all …]
/kernel/linux/linux-5.10/drivers/pinctrl/sirf/
Dpinctrl-sirf.c1 // SPDX-License-Identifier: GPL-2.0-or-later
10 * Copyright (c) 2011 - 2014 Cambridge Silicon Radio Limited, a CSR plc group
29 #include <linux/gpio/driver.h>
32 #include "pinctrl-sirf.h"
34 #define DRIVER_NAME "pinmux-sirf"
106 dev_err(spmx->dev, "No child nodes passed via DT\n"); in sirfsoc_dt_node_to_map()
107 return -ENODEV; in sirfsoc_dt_node_to_map()
112 return -ENOMEM; in sirfsoc_dt_node_to_map()
153 const struct sirfsoc_muxmask *mask = mux->muxmask; in sirfsoc_pinmux_endisable()
155 for (i = 0; i < mux->muxmask_counts; i++) { in sirfsoc_pinmux_endisable()
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/mfd/
Dmscc,ocelot.yaml1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause */
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Ocelot Externally-Controlled Ethernet Switch
10 - Colin Foster <colin.foster@in-advantage.com>
18 The switch family is a multi-port networking switch that supports many
20 external GPIO expanders.
25 - mscc,vsc7512
30 "#address-cells":
33 "#size-cells":
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/microchip/
Dsparx5_pcb134_board.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
10 gpio-restart {
11 compatible = "gpio-restart";
12 gpios = <&gpio 37 GPIO_ACTIVE_LOW>;
17 compatible = "gpio-leds";
53 default-state = "off";
58 default-state = "off";
63 default-state = "off";
68 default-state = "off";
[all …]
Dsparx5.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/clock/microchip,sparx5.h>
12 interrupt-parent = <&gic>;
13 #address-cells = <2>;
14 #size-cells = <1>;
23 stdout-path = "serial0:115200n8";
27 #address-cells = <1>;
28 #size-cells = <0>;
[all …]
Dsparx5_pcb125.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
11 compatible = "microchip,sparx5-pcb125", "microchip,sparx5";
19 &gpio {
20 emmc_pins: emmc-pins {
28 drive-strength = <3>;
35 bus-width = <8>;
36 non-removable;
37 pinctrl-0 = <&emmc_pins>;
38 max-frequency = <8000000>;
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/ata/
Dsata_highbank.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
15 - Andre Przywara <andre.przywara@arm.com>
19 const: calxeda,hb-ahci
27 dma-coherent: true
29 calxeda,pre-clocks:
33 sending an SGPIO pattern.
35 calxeda,post-clocks:
39 sending an SGPIO pattern.
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/ata/
Dsata_highbank.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
15 - Andre Przywara <andre.przywara@arm.com>
19 const: calxeda,hb-ahci
27 dma-coherent: true
29 calxeda,pre-clocks:
33 sending an SGPIO pattern.
35 calxeda,post-clocks:
39 sending an SGPIO pattern.
[all …]
/kernel/linux/linux-5.10/drivers/gpio/
Dgpio-aspeed-sgpio.c1 // SPDX-License-Identifier: GPL-2.0-or-later
10 #include <linux/gpio/driver.h>
21 * MAX_NR_HW_GPIO represents the number of actual hardware-supported GPIOs (ie,
22 * slots within the clocked serial GPIO data). Since each HW GPIO is both an
55 * Note: The "value" register returns the input value when the GPIO is
58 * The "rdata" register returns the output value when the GPIO is
99 static void __iomem *bank_reg(struct aspeed_sgpio *gpio, in bank_reg() argument
105 return gpio->base + bank->val_regs + GPIO_VAL_VALUE; in bank_reg()
107 return gpio->base + bank->rdata_reg; in bank_reg()
109 return gpio->base + bank->irq_regs + GPIO_IRQ_ENABLE; in bank_reg()
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/microchip/
Dlan966x-kontron-kswitch-d10-mmt.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include "dt-bindings/phy/phy-lan966x-serdes.h"
16 stdout-path = "serial0:115200n8";
19 gpio-restart {
20 compatible = "gpio-restart";
21 pinctrl-0 = <&reset_pins>;
22 pinctrl-names = "default";
23 gpios = <&gpio 56 GPIO_ACTIVE_LOW>;
29 atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_USART>;
[all …]
Dlan966x-pcb8291.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * lan966x_pcb8291.dts - Device Tree file for PCB8291
5 /dts-v1/;
7 #include "dt-bindings/phy/phy-lan966x-serdes.h"
10 model = "Microchip EVB - LAN9662";
11 compatible = "microchip,lan9662-pcb8291", "microchip,lan9662", "microchip,lan966";
14 stdout-path = "serial0:115200n8";
21 gpio-restart {
22 compatible = "gpio-restart";
23 gpios = <&gpio 56 GPIO_ACTIVE_LOW>;
[all …]
Dlan966x-pcb8309.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * lan966x_pcb8309.dts - Device Tree file for PCB8309
5 /dts-v1/;
7 #include "dt-bindings/phy/phy-lan966x-serdes.h"
10 model = "Microchip EVB - LAN9662";
11 compatible = "microchip,lan9662-pcb8309", "microchip,lan9662", "microchip,lan966";
20 stdout-path = "serial0:115200n8";
23 gpio-restart {
24 compatible = "gpio-restart";
25 gpios = <&gpio 56 GPIO_ACTIVE_LOW>;
[all …]
Dlan966x.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * lan966x.dtsi - Device Tree Include file for Microchip LAN966 family SoC
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/mfd/atmel-flexcom.h>
14 #include <dt-bindings/dma/at91.h>
15 #include <dt-bindings/gpio/gpio.h>
16 #include <dt-bindings/clock/microchip,lan966x.h>
21 interrupt-parent = <&gic>;
22 #address-cells = <1>;
[all …]
/kernel/linux/linux-6.6/drivers/gpio/
Dgpio-aspeed-sgpio.c1 // SPDX-License-Identifier: GPL-2.0-or-later
10 #include <linux/gpio/driver.h>
49 * Note: The "value" register returns the input value when the GPIO is
52 * The "rdata" register returns the output value when the GPIO is
104 static void __iomem *bank_reg(struct aspeed_sgpio *gpio, in bank_reg() argument
110 return gpio->base + bank->val_regs + GPIO_VAL_VALUE; in bank_reg()
112 return gpio->base + bank->rdata_reg; in bank_reg()
114 return gpio->base + bank->irq_regs + GPIO_IRQ_ENABLE; in bank_reg()
116 return gpio->base + bank->irq_regs + GPIO_IRQ_TYPE0; in bank_reg()
118 return gpio->base + bank->irq_regs + GPIO_IRQ_TYPE1; in bank_reg()
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/aspeed/
Daspeed-bmc-vegman-sx20.dts1 // SPDX-License-Identifier: GPL-2.0+
3 /dts-v1/;
5 #include "aspeed-bmc-vegman.dtsi"
9 compatible = "yadro,vegman-sx20-bmc", "aspeed,ast2500";
12 &gpio {
14 gpio-line-names =
15 …/*A0-A7*/ "CHASSIS_INTRUSION","CASE_OPEN_FAULT_RST","","","SPEAKER_BMC","FM_FORCE_BMC_UPDATE","","…
16 /*B0-B7*/ "","","","","","","","",
17 /*C0-C7*/ "","","","","","","","",
18 /*D0-D7*/ "","","","","","","","",
[all …]
Daspeed-bmc-vegman-n110.dts1 // SPDX-License-Identifier: GPL-2.0+
3 /dts-v1/;
5 #include "aspeed-bmc-vegman.dtsi"
9 compatible = "yadro,vegman-n110-bmc", "aspeed,ast2500";
12 &gpio {
14 gpio-line-names =
15 …/*A0-A7*/ "CHASSIS_INTRUSION","CASE_OPEN_FAULT_RST","","","SPEAKER_BMC","FM_FORCE_BMC_UPDATE","","…
16 /*B0-B7*/ "","","","","","","","",
17 /*C0-C7*/ "","","","","","","","",
18 /*D0-D7*/ "","","","","","","","",
[all …]
Daspeed-bmc-vegman-rx20.dts1 // SPDX-License-Identifier: GPL-2.0+
3 /dts-v1/;
5 #include "aspeed-bmc-vegman.dtsi"
9 compatible = "yadro,vegman-rx20-bmc", "aspeed,ast2500";
12 compatible = "gpio-leds";
16 default-state = "off";
17 gpios = <&gpio ASPEED_GPIO(E, 4) GPIO_ACTIVE_LOW>;
22 default-state = "off";
23 gpios = <&gpio ASPEED_GPIO(E, 5) GPIO_ACTIVE_LOW>;
28 default-state = "off";
[all …]
/kernel/linux/linux-6.6/arch/mips/boot/dts/mscc/
Dserval.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #address-cells = <1>;
8 #size-cells = <1>;
12 #address-cells = <1>;
13 #size-cells = <0>;
25 gpio0 = &gpio;
28 cpuintc: interrupt-controller {
29 #address-cells = <0>;
30 #interrupt-cells = <1>;
31 interrupt-controller;
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/reset/
Dnxp,lpc1850-rgu.txt8 - compatible: Should be "nxp,lpc1850-rgu"
9 - reg: register base and length
10 - clocks: phandle and clock specifier to RGU clocks
11 - clock-names: should contain "delay" and "reg"
12 - #reset-cells: should be 1
20 12 ARM Cortex-M0 subsystem core (LPC43xx only)
31 28 GPIO
56 56 ARM Cortex-M0 application core (LPC4370 only)
57 57 SGPIO (LPC43xx only)
59 60 ADCHS (12-bit ADC) (LPC4370 only)
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/reset/
Dnxp,lpc1850-rgu.txt8 - compatible: Should be "nxp,lpc1850-rgu"
9 - reg: register base and length
10 - clocks: phandle and clock specifier to RGU clocks
11 - clock-names: should contain "delay" and "reg"
12 - #reset-cells: should be 1
20 12 ARM Cortex-M0 subsystem core (LPC43xx only)
31 28 GPIO
56 56 ARM Cortex-M0 application core (LPC4370 only)
57 57 SGPIO (LPC43xx only)
59 60 ADCHS (12-bit ADC) (LPC4370 only)
[all …]

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