| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/bus/ |
| D | simple-pm-bus.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/bus/simple-pm-bus.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Simple Power-Managed Bus
10 - Geert Uytterhoeven <geert+renesas@glider.be>
13 A Simple Power-Managed Bus is a transparent bus that doesn't need a real
16 However, its bus controller is part of a PM domain, or under the control
17 of a functional clock. Hence, the bus controller's PM domain and/or
18 clock must be enabled for child devices connected to the bus (either
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| D | renesas,bsc.yaml | 2 ---
3 $id: http://devicetree.org/schemas/bus/renesas,bsc.yaml#
4 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 title: Renesas Bus State Controller (BSC)
9 - Geert Uytterhoeven <geert+renesas@glider.be>
12 The Renesas Bus State Controller (BSC, sometimes called "LBSC within Bus
13 Bridge", or "External Bus Interface") can be found in several Renesas ARM
14 SoCs. It provides an external bus for connecting multiple external
18 While the BSC is a fairly simple memory-mapped bus, it may be part of a
19 PM domain, and may have a gateable functional clock. Before a device
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/bus/ |
| D | simple-pm-bus.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/bus/simple-pm-bus.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Simple Power-Managed Bus
10 - Geert Uytterhoeven <geert+renesas@glider.be>
13 A Simple Power-Managed Bus is a transparent bus that doesn't need a real
16 However, its bus controller is part of a PM domain, or under the control
17 of a functional clock. Hence, the bus controller's PM domain and/or
18 clock must be enabled for child devices connected to the bus (either
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| D | renesas,bsc.yaml | 2 ---
3 $id: http://devicetree.org/schemas/bus/renesas,bsc.yaml#
4 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 title: Renesas Bus State Controller (BSC)
9 - Geert Uytterhoeven <geert+renesas@glider.be>
12 The Renesas Bus State Controller (BSC, sometimes called "LBSC within Bus
13 Bridge", or "External Bus Interface") can be found in several Renesas ARM
14 SoCs. It provides an external bus for connecting multiple external
18 While the BSC is a fairly simple memory-mapped bus, it may be part of a
19 PM domain, and may have a gateable functional clock. Before a device
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| D | fsl,imx8qxp-pixel-link-msi-bus.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/bus/fsl,imx8qxp-pixel-link-msi-bus.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale i.MX8qxp Pixel Link Medium Speed Interconnect (MSI) Bus
10 - Liu Ying <victor.liu@nxp.com>
13 i.MX8qxp pixel link MSI bus is used to control settings of PHYs, I/Os
14 sitting together with the PHYs. It is not the same as the MSI bus coming
18 i.MX8qxp pixel link MSI bus is a simple memory-mapped bus. Two input clocks,
20 connected to the bus can be accessed. Also, the bus is part of a power
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| /kernel/linux/linux-6.6/drivers/bus/ |
| D | simple-pm-bus.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * Simple Power-Managed Bus Driver
5 * Copyright (C) 2014-2015 Glider bvba
27 const struct device *dev = &pdev->dev; in simple_pm_bus_probe()
29 struct device_node *np = dev->of_node; in simple_pm_bus_probe()
31 struct simple_pm_bus *bus; in simple_pm_bus_probe() local
35 * transparent bus device which has a different compatible string in simple_pm_bus_probe()
37 * of the simple-pm-bus tasks for these devices, so return early. in simple_pm_bus_probe()
39 if (pdev->driver_override) in simple_pm_bus_probe()
42 match = of_match_device(dev->driver->of_match_table, dev); in simple_pm_bus_probe()
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| D | Makefile | 1 # SPDX-License-Identifier: GPL-2.0
3 # Makefile for the bus drivers.
6 # Interconnect bus drivers for ARM platforms
7 obj-$(CONFIG_ARM_CCI) += arm-cci.o
8 obj-$(CONFIG_ARM_INTEGRATOR_LM) += arm-integrator-lm.o
9 obj-$(CONFIG_HISILICON_LPC) += hisi_lpc.o
10 obj-$(CONFIG_BRCMSTB_GISB_ARB) += brcmstb_gisb.o
11 obj-$(CONFIG_MOXTET) += moxtet.o
13 # DPAA2 fsl-mc bus
14 obj-$(CONFIG_FSL_MC_BUS) += fsl-mc/
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| /kernel/linux/linux-5.10/drivers/bus/ |
| D | simple-pm-bus.c | 2 * Simple Power-Managed Bus Driver
4 * Copyright (C) 2014-2015 Glider bvba
19 struct device_node *np = pdev->dev.of_node; in simple_pm_bus_probe()
21 dev_dbg(&pdev->dev, "%s\n", __func__); in simple_pm_bus_probe()
23 pm_runtime_enable(&pdev->dev); in simple_pm_bus_probe()
26 of_platform_populate(np, NULL, NULL, &pdev->dev); in simple_pm_bus_probe()
33 dev_dbg(&pdev->dev, "%s\n", __func__); in simple_pm_bus_remove()
35 pm_runtime_disable(&pdev->dev); in simple_pm_bus_remove()
40 { .compatible = "simple-pm-bus", },
49 .name = "simple-pm-bus",
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| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0
3 # Bus Devices
6 menu "Bus devices"
24 bool "ARM Integrator Logic Module bus"
29 Say y here to enable support for the ARM Logic Module bus
33 bool "Broadcom STB GISB bus arbiter"
37 Driver for the Broadcom Set Top Box System-on-a-chip internal bus
39 and internal bus master decoding.
42 bool "Baikal-T1 APB-bus driver"
46 Baikal-T1 AXI-APB bridge is used to access the SoC subsystem CSRs.
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| D | Makefile | 1 # SPDX-License-Identifier: GPL-2.0
3 # Makefile for the bus drivers.
6 # Interconnect bus drivers for ARM platforms
7 obj-$(CONFIG_ARM_CCI) += arm-cci.o
8 obj-$(CONFIG_ARM_INTEGRATOR_LM) += arm-integrator-lm.o
9 obj-$(CONFIG_HISILICON_LPC) += hisi_lpc.o
10 obj-$(CONFIG_BRCMSTB_GISB_ARB) += brcmstb_gisb.o
11 obj-$(CONFIG_MOXTET) += moxtet.o
13 # DPAA2 fsl-mc bus
14 obj-$(CONFIG_FSL_MC_BUS) += fsl-mc/
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/remoteproc/ |
| D | wkup_m3_rproc.txt | 4 The TI AM33xx and AM43xx family of devices use a small Cortex M3 co-processor
13 within the SoC. It is added as a child node of the parent interconnect bus
17 --------------------
18 - compatible: Should be one of,
19 "ti,am3352-wkup-m3" for AM33xx SoCs
20 "ti,am4372-wkup-m3" for AM43xx SoCs
21 - reg: Should contain the address ranges for the two internal
24 translating these into bus addresses.
25 - reg-names: Contains the corresponding names for the two memory
27 - ti,hwmods: Name of the hwmod associated with the wkupm3 device.
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/remoteproc/ |
| D | wkup_m3_rproc.txt | 4 The TI AM33xx and AM43xx family of devices use a small Cortex M3 co-processor
13 within the SoC. It is added as a child node of the parent interconnect bus
17 --------------------
18 - compatible: Should be one of,
19 "ti,am3352-wkup-m3" for AM33xx SoCs
20 "ti,am4372-wkup-m3" for AM43xx SoCs
21 - reg: Should contain the address ranges for the two internal
24 translating these into bus addresses.
25 - reg-names: Contains the corresponding names for the two memory
27 - ti,hwmods: Name of the hwmod associated with the wkupm3 device.
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/soc/dove/ |
| D | pmu.txt | 4 - compatible: value should be "marvell,dove-pmu".
5 May also include "simple-bus" if there are child devices, in which
7 - reg: two base addresses and sizes of the PM controller and PMU.
8 - interrupts: single interrupt number for the PMU interrupt
9 - interrupt-controller: must be specified as the PMU itself is an
11 - #interrupt-cells: must be 1.
12 - #reset-cells: must be 1.
13 - domains: sub-node containing domain descriptions
16 - ranges: defines the address mapping for child devices, as per the
18 "simple-bus".
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/soc/dove/ |
| D | pmu.txt | 4 - compatible: value should be "marvell,dove-pmu".
5 May also include "simple-bus" if there are child devices, in which
7 - reg: two base addresses and sizes of the PM controller and PMU.
8 - interrupts: single interrupt number for the PMU interrupt
9 - interrupt-controller: must be specified as the PMU itself is an
11 - #interrupt-cells: must be 1.
12 - #reset-cells: must be 1.
13 - domains: sub-node containing domain descriptions
16 - ranges: defines the address mapping for child devices, as per the
18 "simple-bus".
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| /kernel/linux/linux-6.6/arch/riscv/boot/dts/canaan/ |
| D | k210.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2019-20 Sean Anderson <seanga2@gmail.com>
6 #include <dt-bindings/clock/k210-clk.h>
7 #include <dt-bindings/pinctrl/k210-fpioa.h>
8 #include <dt-bindings/reset/k210-rst.h>
12 * Although the K210 is a 64-bit CPU, the address bus is only 32-bits
15 #address-cells = <1>;
16 #size-cells = <1>;
17 compatible = "canaan,kendryte-k210";
28 * Since this is a non-ratified draft specification, the kernel does not
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| /kernel/linux/linux-6.6/arch/arm/boot/dts/ti/omap/ |
| D | am33xx-l4.dtsi | 2 compatible = "ti,am33xx-l4-wkup", "simple-pm-bus";
3 power-domains = <&prm_wkup>;
5 clock-names = "fck";
10 reg-names = "ap", "la", "ia0", "ia1";
11 #address-cells = <1>;
12 #size-cells = <1>;
18 compatible = "simple-pm-bus";
19 #address-cells = <1>;
20 #size-cells = <1>;
28 compatible = "simple-pm-bus";
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| D | omap5-l4.dtsi | 2 compatible = "ti,omap5-l4-cfg", "simple-pm-bus";
3 power-domains = <&prm_core>;
5 clock-names = "fck";
9 reg-names = "ap", "la", "ia0";
10 #address-cells = <1>;
11 #size-cells = <1>;
21 compatible = "simple-pm-bus";
22 #address-cells = <1>;
23 #size-cells = <1>;
55 target-module@2000 { /* 0x4a002000, ap 3 44.0 */
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| D | omap4-l4.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
3 compatible = "ti,omap4-l4-cfg", "simple-pm-bus";
4 power-domains = <&prm_core>;
6 clock-names = "fck";
10 reg-names = "ap", "la", "ia0";
11 #address-cells = <1>;
12 #size-cells = <1>;
22 compatible = "simple-pm-bus";
23 #address-cells = <1>;
24 #size-cells = <1>;
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| D | am437x-l4.dtsi | 2 compatible = "ti,am4-l4-wkup", "simple-pm-bus";
3 power-domains = <&prm_wkup>;
5 clock-names = "fck";
10 reg-names = "ap", "la", "ia0", "ia1";
11 #address-cells = <1>;
12 #size-cells = <1>;
18 compatible = "simple-pm-bus";
19 #address-cells = <1>;
20 #size-cells = <1>;
28 compatible = "simple-pm-bus";
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/soc/ti/ |
| D | wkup_m3_ipc.txt | 4 The TI AM33xx and AM43xx family of devices use a small Cortex M3 co-processor
7 C-states for CPU Idle. Once the wkup_m3_ipc driver uses the wkup_m3_rproc driver
10 API to allow the SoC PM code to execute specific PM tasks.
18 --------------------
19 - compatible: Should be,
20 "ti,am3352-wkup-m3-ipc" for AM33xx SoCs
21 "ti,am4372-wkup-m3-ipc" for AM43xx SoCs
22 - reg: Contains the IPC register address space to communicate
24 - interrupts: Contains the interrupt information for the wkup_m3
26 - ti,rproc: phandle to the wkup_m3 rproc node so the IPC driver
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| /kernel/linux/linux-6.6/drivers/platform/chrome/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
26 If you have an ACPI-compatible Chromebook, say Y or M here.
47 The range of memory used is 0xf00000-0x1000000, traditionally
71 You also need to enable the driver for the bus you are using. The
72 protocol for talking to the EC is defined by the bus driver.
83 EC through an I2C bus. This uses a simple byte-level protocol with
92 through rpmsg. This uses a simple byte-level protocol with a
93 checksum. Also since there's no addition EC-to-host interrupt, this
106 ISH Transport protocol (ISH-TP). This uses a simple byte-level
118 through a SPI bus, using a byte-level protocol. Since the EC's
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| /kernel/linux/linux-6.6/arch/arm/boot/dts/socionext/ |
| D | uniphier-pro4.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
5 // Copyright (C) 2015-2016 Socionext Inc.
8 #include <dt-bindings/gpio/uniphier-gpio.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 compatible = "socionext,uniphier-pro4";
13 #address-cells = <1>;
14 #size-cells = <1>;
17 #address-cells = <1>;
18 #size-cells = <0>;
22 compatible = "arm,cortex-a9";
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| /kernel/linux/linux-6.6/arch/arm64/boot/dts/allwinner/ |
| D | sun50i-h6-beelink-gs1.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 /dts-v1/;
6 #include "sun50i-h6.dtsi"
7 #include "sun50i-h6-cpu-opp.dtsi"
8 #include "sun50i-h6-gpu-opp.dtsi"
10 #include <dt-bindings/gpio/gpio.h>
14 compatible = "azw,beelink-gs1", "allwinner,sun50i-h6";
22 stdout-path = "serial0:115200n8";
26 compatible = "hdmi-connector";
28 ddc-en-gpios = <&pio 7 2 GPIO_ACTIVE_HIGH>; /* PH2 */
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| /kernel/linux/linux-5.10/arch/arm64/boot/dts/allwinner/ |
| D | sun50i-h6-beelink-gs1.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 /dts-v1/;
6 #include "sun50i-h6.dtsi"
7 #include "sun50i-h6-cpu-opp.dtsi"
9 #include <dt-bindings/gpio/gpio.h>
13 compatible = "azw,beelink-gs1", "allwinner,sun50i-h6";
21 stdout-path = "serial0:115200n8";
25 compatible = "hdmi-connector";
27 ddc-en-gpios = <&pio 7 2 GPIO_ACTIVE_HIGH>; /* PH2 */
31 remote-endpoint = <&hdmi_out_con>;
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| /kernel/linux/linux-6.6/arch/arm/mach-ux500/ |
| D | cpu-db8500.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2008-2009 ST-Ericsson SA
10 #include <linux/amba/bus.h>
14 #include <linux/irqchip/arm-gic.h>
15 #include <linux/mfd/dbx500-prcmu.h>
16 #include <linux/platform_data/arm-ux500-pm.h>
25 #include <asm/hardware/cache-l2x0.h>
35 np = of_find_compatible_node(NULL, NULL, "arm,pl310-cache"); in ux500_l2x0_unlock()
39 return -ENODEV; in ux500_l2x0_unlock()
42 * Unlock Data and Instruction Lock if locked. Ux500 U-Boot versions in ux500_l2x0_unlock()
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