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/kernel/linux/linux-6.6/drivers/net/wwan/iosm/
Diosm_ipc_protocol_ops.h1 /* SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2020-21 Intel Corporation.
14 * enum ipc_mem_td_cs - Completion status of a TD
15 * @IPC_MEM_TD_CS_INVALID: Initial status - td not yet used.
16 * @IPC_MEM_TD_CS_PARTIAL_TRANSFER: More data pending -> next TD used for this
33 * enum ipc_mem_msg_cs - Completion status of IPC Message
45 * struct ipc_msg_prep_args_pipe - struct for pipe args for message preparation
53 * struct ipc_msg_prep_args_sleep - struct for sleep args for message
56 * @state: 0=enter sleep, 1=exit sleep
64 * struct ipc_msg_prep_feature_set - struct for feature set argument for
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/qcom/
Dsm6125.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/clock/qcom,gcc-sm6125.h>
7 #include <dt-bindings/clock/qcom,rpmcc.h>
8 #include <dt-bindings/dma/qcom-gpi.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/power/qcom-rpmpd.h>
14 interrupt-parent = <&intc>;
15 #address-cells = <2>;
16 #size-cells = <2>;
[all …]
Dmsm8994.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/qcom,gcc-msm8994.h>
8 #include <dt-bindings/clock/qcom,mmcc-msm8994.h>
9 #include <dt-bindings/clock/qcom,rpmcc.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/power/qcom-rpmpd.h>
14 interrupt-parent = <&intc>;
16 #address-cells = <2>;
[all …]
Dsdx75.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
9 #include <dt-bindings/clock/qcom,rpmh.h>
10 #include <dt-bindings/clock/qcom,sdx75-gcc.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/power/qcom,rpmhpd.h>
13 #include <dt-bindings/power/qcom-rpmpd.h>
14 #include <dt-bindings/soc/qcom,rpmh-rsc.h>
17 #address-cells = <2>;
18 #size-cells = <2>;
19 interrupt-parent = <&intc>;
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/kernel/linux/linux-6.6/arch/arm64/boot/dts/freescale/
Dimx8ulp-evk.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
12 compatible = "fsl,imx8ulp-evk", "fsl,imx8ulp";
15 stdout-path = &lpuart5;
23 reserved-memory {
24 #address-cells = <2>;
25 #size-cells = <2>;
29 compatible = "shared-dma-pool";
32 linux,cma-default;
35 m33_reserved: noncacheable-section@a8600000 {
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/kernel/linux/linux-5.10/arch/arm64/boot/dts/qcom/
Dsdm630.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/clock/qcom,gcc-sdm660.h>
7 #include <dt-bindings/clock/qcom,rpmcc.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 interrupt-parent = <&intc>;
14 #address-cells = <2>;
15 #size-cells = <2>;
20 xo_board: xo-board {
21 compatible = "fixed-clock";
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/kernel/linux/linux-5.10/Documentation/driver-api/
Dio-mapping.rst8 The io_mapping functions in linux/io-mapping.h provide an abstraction for
10 usage is to support the large graphics aperture on 32-bit processors where
11 ioremap_wc cannot be used to statically map the entire aperture to the CPU
39 This _wc variant returns a write-combining map to the
43 Note that the task may not sleep while holding this page
52 page and allows the task to sleep once again.
54 If you need to sleep while holding the lock, you can use the non-atomic
63 the task to sleep while holding the page mapped.
84 On 64-bit processors, io_mapping_create_wc calls ioremap_wc for the whole
85 range, creating a permanent kernel-visible mapping to the resource. The
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/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dstm32mp15xx-dkx.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2019 - All Rights Reserved
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/mfd/st,stpmic1.h>
16 reserved-memory {
17 #address-cells = <1>;
18 #size-cells = <1>;
22 compatible = "shared-dma-pool";
24 no-map;
28 compatible = "shared-dma-pool";
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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/mmc/
Dsdhci-msm.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mmc/sdhci-msm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm SDHCI controller (sdhci-msm)
10 - Bhupesh Sharma <bhupesh.sharma@linaro.org>
19 - enum:
20 - qcom,sdhci-msm-v4
22 - items:
23 - enum:
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/kernel/linux/linux-5.10/arch/powerpc/boot/dts/
Dmpc8610_hpcd.dts1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright 2007-2008 Freescale Semiconductor Inc.
8 /dts-v1/;
13 #address-cells = <1>;
14 #size-cells = <1>;
25 #address-cells = <1>;
26 #size-cells = <0>;
31 d-cache-line-size = <32>;
32 i-cache-line-size = <32>;
33 d-cache-size = <32768>; // L1
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Dmpc8377_wlan.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright 2007-2009 Freescale Semiconductor Inc.
9 /dts-v1/;
13 #address-cells = <1>;
14 #size-cells = <1>;
27 #address-cells = <1>;
28 #size-cells = <0>;
33 d-cache-line-size = <32>;
34 i-cache-line-size = <32>;
35 d-cache-size = <32768>;
[all …]
Dmpc8377_rdb.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
8 /dts-v1/;
12 #address-cells = <1>;
13 #size-cells = <1>;
26 #address-cells = <1>;
27 #size-cells = <0>;
32 d-cache-line-size = <32>;
33 i-cache-line-size = <32>;
34 d-cache-size = <32768>;
35 i-cache-size = <32768>;
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Dmpc8377_mds.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
8 /dts-v1/;
13 #address-cells = <1>;
14 #size-cells = <1>;
27 #address-cells = <1>;
28 #size-cells = <0>;
33 d-cache-line-size = <32>;
34 i-cache-line-size = <32>;
35 d-cache-size = <32768>;
36 i-cache-size = <32768>;
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/kernel/linux/linux-6.6/arch/arm/boot/dts/st/
Dstm32mp157c-emstamp-argon.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
9 #include "stm32mp15-pinctrl.dtsi"
10 #include "stm32mp15xxac-pinctrl.dtsi"
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/mfd/st,stpmic1.h>
23 stdout-path = "serial0:115200n8";
31 reserved-memory {
32 #address-cells = <1>;
33 #size-cells = <1>;
37 compatible = "shared-dma-pool";
[all …]
Dstm32mp157c-phycore-stm32mp15-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) 2022-2023 Steffen Trumtrar <kernel@pengutronix.de>
4 * Copyright (C) Phytec GmbH 2019-2020 - All Rights Reserved
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/leds/common.h>
13 #include <dt-bindings/leds/leds-pca9532.h>
14 #include <dt-bindings/mfd/st,stpmic1.h>
[all …]
Dstm32mp15xx-dkx.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2019 - All Rights Reserved
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/mfd/st,stpmic1.h>
22 reserved-memory {
23 #address-cells = <1>;
24 #size-cells = <1>;
28 compatible = "shared-dma-pool";
30 no-map;
34 compatible = "shared-dma-pool";
[all …]
/kernel/linux/linux-6.6/arch/powerpc/boot/dts/
Dmpc8377_wlan.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright 2007-2009 Freescale Semiconductor Inc.
9 /dts-v1/;
13 #address-cells = <1>;
14 #size-cells = <1>;
27 #address-cells = <1>;
28 #size-cells = <0>;
33 d-cache-line-size = <32>;
34 i-cache-line-size = <32>;
35 d-cache-size = <32768>;
[all …]
Dmpc8377_rdb.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
8 /dts-v1/;
12 #address-cells = <1>;
13 #size-cells = <1>;
26 #address-cells = <1>;
27 #size-cells = <0>;
32 d-cache-line-size = <32>;
33 i-cache-line-size = <32>;
34 d-cache-size = <32768>;
35 i-cache-size = <32768>;
[all …]
/kernel/linux/linux-5.10/drivers/mtd/lpddr/
Dlpddr_cmds.c1 // SPDX-License-Identifier: GPL-2.0-or-later
31 static int get_chip(struct map_info *map, struct flchip *chip, int mode);
32 static int chip_ready(struct map_info *map, struct flchip *chip, int mode);
33 static void put_chip(struct map_info *map, struct flchip *chip);
35 struct mtd_info *lpddr_cmdset(struct map_info *map) in lpddr_cmdset() argument
37 struct lpddr_private *lpddr = map->fldrv_priv; in lpddr_cmdset()
47 mtd->priv = map; in lpddr_cmdset()
48 mtd->type = MTD_NORFLASH; in lpddr_cmdset()
51 mtd->_read = lpddr_read; in lpddr_cmdset()
52 mtd->type = MTD_NORFLASH; in lpddr_cmdset()
[all …]
/kernel/linux/linux-6.6/drivers/mtd/lpddr/
Dlpddr_cmds.c1 // SPDX-License-Identifier: GPL-2.0-or-later
31 static int get_chip(struct map_info *map, struct flchip *chip, int mode);
32 static int chip_ready(struct map_info *map, struct flchip *chip, int mode);
33 static void put_chip(struct map_info *map, struct flchip *chip);
35 struct mtd_info *lpddr_cmdset(struct map_info *map) in lpddr_cmdset() argument
37 struct lpddr_private *lpddr = map->fldrv_priv; in lpddr_cmdset()
47 mtd->priv = map; in lpddr_cmdset()
48 mtd->type = MTD_NORFLASH; in lpddr_cmdset()
51 mtd->_read = lpddr_read; in lpddr_cmdset()
52 mtd->type = MTD_NORFLASH; in lpddr_cmdset()
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/kernel/linux/linux-5.10/drivers/iio/imu/inv_icm42600/
Dinv_icm42600_buffer.c1 // SPDX-License-Identifier: GPL-2.0-or-later
71 *accel = &pack2->accel; in inv_icm42600_fifo_decode_packet()
72 *gyro = &pack2->gyro; in inv_icm42600_fifo_decode_packet()
73 *temp = &pack2->temp; in inv_icm42600_fifo_decode_packet()
74 *timestamp = &pack2->timestamp; in inv_icm42600_fifo_decode_packet()
80 *accel = &pack1->data; in inv_icm42600_fifo_decode_packet()
82 *temp = &pack1->temp; in inv_icm42600_fifo_decode_packet()
90 *gyro = &pack1->data; in inv_icm42600_fifo_decode_packet()
91 *temp = &pack1->temp; in inv_icm42600_fifo_decode_packet()
97 return -EINVAL; in inv_icm42600_fifo_decode_packet()
[all …]
/kernel/linux/linux-6.6/drivers/iio/imu/inv_icm42600/
Dinv_icm42600_buffer.c1 // SPDX-License-Identifier: GPL-2.0-or-later
72 *accel = &pack2->accel; in inv_icm42600_fifo_decode_packet()
73 *gyro = &pack2->gyro; in inv_icm42600_fifo_decode_packet()
74 *temp = &pack2->temp; in inv_icm42600_fifo_decode_packet()
75 *timestamp = &pack2->timestamp; in inv_icm42600_fifo_decode_packet()
81 *accel = &pack1->data; in inv_icm42600_fifo_decode_packet()
83 *temp = &pack1->temp; in inv_icm42600_fifo_decode_packet()
91 *gyro = &pack1->data; in inv_icm42600_fifo_decode_packet()
92 *temp = &pack1->temp; in inv_icm42600_fifo_decode_packet()
98 return -EINVAL; in inv_icm42600_fifo_decode_packet()
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/powerpc/
Dsleep.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/powerpc/sleep.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: PowerPC sleep property
10 - Rob Herring <robh@kernel.org>
13 Devices on SOCs often have mechanisms for placing devices into low-power
15 this information is more complicated than a cell-index property can
17 may contain a "sleep" property which describes these connections.
19 The sleep property consists of one or more sleep resources, each of
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/powerpc/
Dsleep.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/powerpc/sleep.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: PowerPC sleep property
10 - Rob Herring <robh@kernel.org>
13 Devices on SOCs often have mechanisms for placing devices into low-power
15 this information is more complicated than a cell-index property can
17 may contain a "sleep" property which describes these connections.
19 The sleep property consists of one or more sleep resources, each of
[all …]
/kernel/linux/linux-5.10/drivers/iio/imu/inv_mpu6050/
Dinv_mpu_core.c1 // SPDX-License-Identifier: GPL-2.0-only
245 static int inv_mpu6050_pwr_mgmt_1_write(struct inv_mpu6050_state *st, bool sleep, in inv_mpu6050_pwr_mgmt_1_write() argument
251 clock = st->chip_config.clk; in inv_mpu6050_pwr_mgmt_1_write()
253 temp_dis = !st->chip_config.temp_en; in inv_mpu6050_pwr_mgmt_1_write()
258 if (sleep) in inv_mpu6050_pwr_mgmt_1_write()
261 dev_dbg(regmap_get_device(st->map), "pwr_mgmt_1: 0x%x\n", val); in inv_mpu6050_pwr_mgmt_1_write()
262 return regmap_write(st->map, st->reg->pwr_mgmt_1, val); in inv_mpu6050_pwr_mgmt_1_write()
270 switch (st->chip_type) { in inv_mpu6050_clock_switch()
275 ret = inv_mpu6050_pwr_mgmt_1_write(st, false, clock, -1); in inv_mpu6050_clock_switch()
278 st->chip_config.clk = clock; in inv_mpu6050_clock_switch()
[all …]

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