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Searched +full:snvs +full:- +full:lpgpr (Results 1 – 13 of 13) sorted by relevance

/kernel/linux/linux-6.6/Documentation/devicetree/bindings/nvmem/
Dsnvs-lpgpr.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/nvmem/snvs-lpgpr.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Low Power General Purpose Register found in i.MX Secure Non-Volatile Storage
10 - Oleksij Rempel <o.rempel@pengutronix.de>
15 - items:
16 - enum:
17 - fsl,imx8mm-snvs-lpgpr
18 - fsl,imx8mn-snvs-lpgpr
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/nvmem/
Dsnvs-lpgpr.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/nvmem/snvs-lpgpr.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Low Power General Purpose Register found in i.MX Secure Non-Volatile Storage
10 - Oleksij Rempel <o.rempel@pengutronix.de>
15 - fsl,imx6q-snvs-lpgpr
16 - fsl,imx6ul-snvs-lpgpr
17 - fsl,imx7d-snvs-lpgpr
20 - compatible
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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/crypto/
Dfsl,sec-v4.0-mon.yaml1 # SPDX-License-Identifier: GPL-2.0
2 # Copyright (C) 2008-2011 Freescale Semiconductor Inc.
4 ---
5 $id: http://devicetree.org/schemas/crypto/fsl,sec-v4.0-mon.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Freescale Secure Non-Volatile Storage (SNVS)
11 - '"Horia Geantă" <horia.geanta@nxp.com>'
12 - Pankaj Gupta <pankaj.gupta@nxp.com>
13 - Gaurav Jain <gaurav.jain@nxp.com>
16 Node defines address range and the associated interrupt for the SNVS function.
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/kernel/linux/linux-5.10/drivers/nvmem/
Dsnvs_lpgpr.c1 // SPDX-License-Identifier: GPL-2.0-only
9 #include <linux/nvmem-provider.h>
56 const struct snvs_lpgpr_cfg *dcfg = priv->dcfg; in snvs_lpgpr_write()
60 ret = regmap_read(priv->regmap, dcfg->offset_hplr, &lock_reg); in snvs_lpgpr_write()
65 return -EPERM; in snvs_lpgpr_write()
67 ret = regmap_read(priv->regmap, dcfg->offset_lplr, &lock_reg); in snvs_lpgpr_write()
72 return -EPERM; in snvs_lpgpr_write()
74 return regmap_bulk_write(priv->regmap, dcfg->offset + offset, val, in snvs_lpgpr_write()
82 const struct snvs_lpgpr_cfg *dcfg = priv->dcfg; in snvs_lpgpr_read()
84 return regmap_bulk_read(priv->regmap, dcfg->offset + offset, in snvs_lpgpr_read()
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DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
33 will be called nvmem-imx-iim.
36 tristate "i.MX 6/7/8 On-Chip OTP Controller support"
40 This is a driver for the On-Chip OTP Controller (OCOTP) available on
41 i.MX6 SoCs, providing access to 4 Kbits of one-time programmable
45 will be called nvmem-imx-ocotp.
48 tristate "i.MX8 SCU On-Chip OTP Controller support"
52 This is a driver for the SCU On-Chip OTP Controller (OCOTP)
88 tristate "Freescale MXS On-Chip OTP Memory Support"
97 will be called nvmem-mxs-ocotp.
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/kernel/linux/linux-6.6/drivers/nvmem/
Dsnvs_lpgpr.c1 // SPDX-License-Identifier: GPL-2.0-only
9 #include <linux/nvmem-provider.h>
57 const struct snvs_lpgpr_cfg *dcfg = priv->dcfg; in snvs_lpgpr_write()
61 ret = regmap_read(priv->regmap, dcfg->offset_hplr, &lock_reg); in snvs_lpgpr_write()
66 return -EPERM; in snvs_lpgpr_write()
68 ret = regmap_read(priv->regmap, dcfg->offset_lplr, &lock_reg); in snvs_lpgpr_write()
73 return -EPERM; in snvs_lpgpr_write()
75 return regmap_bulk_write(priv->regmap, dcfg->offset + offset, val, in snvs_lpgpr_write()
83 const struct snvs_lpgpr_cfg *dcfg = priv->dcfg; in snvs_lpgpr_read()
85 return regmap_bulk_read(priv->regmap, dcfg->offset + offset, in snvs_lpgpr_read()
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DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
37 calibration data required for the PCIe or the USB-C PHY.
40 be called nvmem-apple-efuses.
43 tristate "Broadcom On-Chip OTP Controller support"
52 will be called nvmem-bcm-ocotp.
72 will be called nvmem-imx-iim.
75 tristate "i.MX 6/7/8 On-Chip OTP Controller support"
79 This is a driver for the On-Chip OTP Controller (OCOTP) available on
80 i.MX6 SoCs, providing access to 4 Kbits of one-time programmable
84 will be called nvmem-imx-ocotp.
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/kernel/linux/linux-6.6/arch/arm64/boot/dts/freescale/
Dimx8mm.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/imx8mm-clock.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/power/imx8mm-power.h>
11 #include <dt-bindings/reset/imx8mq-reset.h>
12 #include <dt-bindings/thermal/thermal.h>
14 #include "imx8mm-pinfunc.h"
17 interrupt-parent = <&gic>;
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Dimx8mp.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/imx8mp-clock.h>
7 #include <dt-bindings/power/imx8mp-power.h>
8 #include <dt-bindings/reset/imx8mp-reset.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/interconnect/fsl,imx8mp.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/thermal/thermal.h>
15 #include "imx8mp-pinfunc.h"
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/kernel/linux/linux-6.6/arch/arm/boot/dts/nxp/imx/
Dimx6ul.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 #include <dt-bindings/clock/imx6ul-clock.h>
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include "imx6ul-pinfunc.h"
12 #address-cells = <1>;
13 #size-cells = <1>;
16 * pre-existing /chosen node to be available to insert the
57 #address-cells = <1>;
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Dimx6qdl.dtsi1 // SPDX-License-Identifier: GPL-2.0+
6 #include <dt-bindings/clock/imx6qdl-clock.h>
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
15 * pre-existing /chosen node to be available to insert the
58 compatible = "fixed-clock";
59 #clock-cells = <0>;
60 clock-frequency = <32768>;
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/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dimx6ul.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 #include <dt-bindings/clock/imx6ul-clock.h>
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include "imx6ul-pinfunc.h"
12 #address-cells = <1>;
13 #size-cells = <1>;
16 * pre-existing /chosen node to be available to insert the
57 #address-cells = <1>;
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Dimx6qdl.dtsi1 // SPDX-License-Identifier: GPL-2.0+
6 #include <dt-bindings/clock/imx6qdl-clock.h>
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
15 * pre-existing /chosen node to be available to insert the
58 compatible = "fsl,imx-ckil", "fixed-clock";
59 #clock-cells = <0>;
60 clock-frequency = <32768>;
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