Searched +full:soc +full:- +full:controller (Results 1 – 25 of 1096) sorted by relevance
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/net/can/ |
| D | rcar_can.txt | 1 Renesas R-Car CAN controller Device Tree Bindings
2 -------------------------------------------------
5 - compatible: "renesas,can-r8a7742" if CAN controller is a part of R8A7742 SoC.
6 "renesas,can-r8a7743" if CAN controller is a part of R8A7743 SoC.
7 "renesas,can-r8a7744" if CAN controller is a part of R8A7744 SoC.
8 "renesas,can-r8a7745" if CAN controller is a part of R8A7745 SoC.
9 "renesas,can-r8a77470" if CAN controller is a part of R8A77470 SoC.
10 "renesas,can-r8a774a1" if CAN controller is a part of R8A774A1 SoC.
11 "renesas,can-r8a774b1" if CAN controller is a part of R8A774B1 SoC.
12 "renesas,can-r8a774c0" if CAN controller is a part of R8A774C0 SoC.
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| /kernel/linux/linux-6.6/drivers/clk/samsung/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
4 bool "Samsung Exynos clock controller support" if COMPILE_TEST
18 bool "Samsung S3C64xx clock controller support" if COMPILE_TEST
21 Support for the clock controller present on the Samsung S3C64xx SoCs.
22 Choose Y here only if you build for this SoC.
25 bool "Samsung S5Pv210 clock controller support" if COMPILE_TEST
28 Support for the clock controller present on the Samsung S5Pv210 SoCs.
29 Choose Y here only if you build for this SoC.
32 bool "Samsung Exynos3250 clock controller support" if COMPILE_TEST
35 Support for the clock controller present on the Samsung
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| /kernel/linux/linux-6.6/drivers/soc/renesas/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0
3 bool "Renesas SoC driver support" if COMPILE_TEST && !ARCH_RENESAS
67 bool "ARM32 Platform support for R-Car E2"
73 bool "ARM32 Platform support for R-Car H1"
82 bool "ARM32 Platform support for R-Car H2"
90 bool "ARM32 Platform support for R-Car M1A"
95 bool "ARM32 Platform support for R-Car M2-N"
102 bool "ARM32 Platform support for R-Car M2-W"
109 bool "ARM32 Platform support for R-Car V2H"
115 bool "ARM32 Platform support for R-Mobile A1"
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| /kernel/linux/linux-5.10/drivers/soc/renesas/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0
3 bool "Renesas SoC driver support" if COMPILE_TEST && !ARCH_RENESAS
57 bool "ARM32 Platform support for R-Car E2"
63 bool "ARM32 Platform support for R-Car H1"
72 bool "ARM32 Platform support for R-Car H2"
80 bool "ARM32 Platform support for R-Car M1A"
85 bool "ARM32 Platform support for R-Car M2-N"
92 bool "ARM32 Platform support for R-Car M2-W"
99 bool "ARM32 Platform support for R-Car V2H"
105 bool "ARM32 Platform support for R-Mobile A1"
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| /kernel/linux/linux-6.6/drivers/net/ethernet/stmicro/stmmac/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
3 tristate "STMicroelectronics Multi-Gigabit Ethernet driver"
38 If you have a controller with this interface, say Y or M here.
45 tristate "Support for snps,dwc-qos-ethernet.txt DT binding."
50 Support for chips using the snps,dwc-qos-ethernet.txt DT binding.
65 Support for Adaptrum Anarion GMAC Ethernet controller.
67 This selects the Anarion SoC glue layer support for the stmmac driver.
75 Support for ethernet controller on Ingenic SoCs.
79 MAC ethernet controller.
89 This selects the IPQ806x SoC glue layer support for the stmmac
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| /kernel/linux/linux-5.10/drivers/net/ethernet/stmicro/stmmac/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
3 tristate "STMicroelectronics Multi-Gigabit Ethernet driver"
38 If you have a controller with this interface, say Y or M here.
45 tristate "Support for snps,dwc-qos-ethernet.txt DT binding."
50 Support for chips using the snps,dwc-qos-ethernet.txt DT binding.
65 Support for Adaptrum Anarion GMAC Ethernet controller.
67 This selects the Anarion SoC glue layer support for the stmmac driver.
77 This selects the IPQ806x SoC glue layer support for the stmmac
79 acceleration features available on this SoC. Network devices
80 will behave like standard non-accelerated ethernet interfaces.
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/arm/ |
| D | gemini.txt | 3 The Gemini SoC is the project name for an ARMv4 FA525-based SoC originally
9 Storm Semiconductor was acquired by Cortina Systems in 2008 and the SoC was
13 Many of the IP blocks used in the SoC comes from Faraday Technology.
20 - soc: the SoC should be represented by a simple bus encompassing all the
21 onchip devices, this is referred to as the soc bus node.
23 - syscon: the soc bus node must have a system controller node pointing to the
25 "cortina,gemini-syscon", "syscon";
28 - reg: syscon register location and size.
29 - #clock-cells: should be set to <1> - the system controller is also a
31 - #reset-cells: should be set to <1> - the system controller is also a
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| /kernel/linux/linux-6.6/drivers/clk/meson/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
52 bool "Meson8 SoC Clock controller support"
62 Support for the clock controller on AmLogic S802 (Meson8),
67 tristate "GXBB and GXL SoC clock controllers support"
79 Support for the clock controller on AmLogic S905 devices, aka gxbb.
83 tristate "AXG SoC clock controllers support"
94 Support for the clock controller on AmLogic A113D devices, aka axg.
98 tristate "Meson AXG Audio Clock Controller Driver"
106 Support for the audio clock controller on AmLogic A113D devices,
110 tristate "Amlogic A1 SoC PLL controller support"
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| /kernel/linux/linux-6.6/drivers/pci/controller/dwc/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0
3 menu "DesignWare-based PCIe controllers"
18 bool "Amazon Annapurna Labs PCIe controller"
25 controller IP on Amazon SoCs. The PCIe controller uses the DesignWare
27 required only for DT-based platforms. ACPI platforms with the
28 Annapurna Labs PCIe controller don't need to enable this.
31 tristate "Amlogic Meson PCIe controller"
36 Say Y here if you want to enable PCI controller support on Amlogic
37 SoCs. The PCI controller on Amlogic is based on DesignWare hardware
38 and therefore the driver re-uses the DesignWare core functions to
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| /kernel/linux/linux-6.6/drivers/clk/starfive/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0
12 Say yes here to support the clock controller on the StarFive JH7100
13 SoC.
22 SoC.
29 Say yes here to support the PLL clock controller on the
30 StarFive JH7110 SoC.
41 Say yes here to support the system clock controller on the
42 StarFive JH7110 SoC.
45 tristate "StarFive JH7110 always-on clock support"
49 Say yes here to support the always-on clock controller on the
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| /kernel/linux/linux-5.10/drivers/mmc/host/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
3 # MMC/SD host controller drivers
6 comment "MMC/SD/SDIO Host Controller Drivers"
28 bool "Qualcomm Data Mover for SD Card Controller"
32 This selects the Qualcomm Data Mover lite/local on SD Card controller.
39 bool "STMicroelectronics STM32 SDMMC Controller"
43 This selects the STMicroelectronics STM32 SDMMC host controller.
59 tristate "Secure Digital Host Controller Interface support"
62 This selects the generic Secure Digital Host Controller Interface.
66 If you have a controller with this interface, say Y or M here. You
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/soc/litex/ |
| D | litex,soc-controller.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
4 ---
5 $id: http://devicetree.org/schemas/soc/litex/litex,soc-controller.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: LiteX SoC Controller driver
11 This is the SoC Controller driver for the LiteX SoC Builder.
17 - Karol Gugala <kgugala@antmicro.com>
18 - Mateusz Holenko <mholenko@antmicro.com>
22 const: litex,soc-controller
28 - compatible
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| /kernel/linux/linux-6.6/drivers/mmc/host/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
3 # MMC/SD host controller drivers
6 comment "MMC/SD/SDIO Host Controller Drivers"
18 tristate "Sunplus SP7021 MMC Controller"
37 bool "Qualcomm Data Mover for SD Card Controller"
41 This selects the Qualcomm Data Mover lite/local on SD Card controller.
48 bool "STMicroelectronics STM32 SDMMC Controller"
52 This selects the STMicroelectronics STM32 SDMMC host controller.
68 tristate "Secure Digital Host Controller Interface support"
71 This selects the generic Secure Digital Host Controller Interface.
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| /kernel/linux/linux-5.10/drivers/pinctrl/spear/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
21 bool "ST Microelectronics SPEAr300 SoC pin controller driver"
26 bool "ST Microelectronics SPEAr310 SoC pin controller driver"
32 bool "ST Microelectronics SPEAr320 SoC pin controller driver"
38 bool "ST Microelectronics SPEAr1310 SoC pin controller driver"
44 bool "ST Microelectronics SPEAr1340 SoC pin controller driver"
50 bool "SPEAr SoC PLGPIO Controller"
54 Say yes here to support PLGPIO controller on ST Microelectronics SPEAr
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| /kernel/linux/linux-6.6/drivers/pinctrl/spear/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
21 bool "ST Microelectronics SPEAr300 SoC pin controller driver"
26 bool "ST Microelectronics SPEAr310 SoC pin controller driver"
32 bool "ST Microelectronics SPEAr320 SoC pin controller driver"
38 bool "ST Microelectronics SPEAr1310 SoC pin controller driver"
44 bool "ST Microelectronics SPEAr1340 SoC pin controller driver"
50 bool "SPEAr SoC PLGPIO Controller"
54 Say yes here to support PLGPIO controller on ST Microelectronics SPEAr
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/arm/keystone/ |
| D | ti,sci.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: TI-SCI controller
10 - Nishanth Menon <nm@ti.com>
15 management of the System on Chip (SoC) system. These include various system
18 An example of such an SoC is K2G, which contains the system control hardware
19 block called Power Management Micro Controller (PMMC). This hardware block is
25 The TI-SCI node describes the Texas Instrument's System Controller entity node.
28 functionality as may be required for the SoC. This hierarchy also describes the
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| /kernel/linux/linux-6.6/drivers/reset/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
6 bool "Reset Controller Support"
9 Generic Reset Controller support.
12 via GPIOs or SoC-internal reset controller modules.
29 This enables the ATH79 reset controller driver that supports the
30 AR71xx SoC reset controller.
36 This enables the reset controller driver for AXS10x.
39 bool "BCM6345 Reset Controller"
43 This enables the reset controller driver for BCM6345 SoCs.
50 This enables the reset controller driver for Marvell Berlin SoCs.
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| /kernel/linux/linux-5.10/drivers/pci/controller/dwc/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0
23 bool "TI DRA7xx PCIe controller Host Mode"
31 Enables support for the PCIe controller in the DRA7xx SoC to work in
32 host mode. There are two instances of PCIe controller in DRA7xx.
33 This controller can work either as EP or RC. In order to enable
34 host-specific features PCI_DRA7XX_HOST must be selected and in order
35 to enable device-specific features PCI_DRA7XX_EP must be selected.
39 bool "TI DRA7xx PCIe controller Endpoint Mode"
46 Enables support for the PCIe controller in the DRA7xx SoC to work in
47 endpoint mode. There are two instances of PCIe controller in DRA7xx.
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/clock/ |
| D | samsung,s3c2410-clock.txt | 1 * Samsung S3C2410 Clock Controller
3 The S3C2410 clock controller generates and supplies clock to various controllers
4 within the SoC. The clock binding described here is applicable to the s3c2410,
9 - compatible: should be one of the following.
10 - "samsung,s3c2410-clock" - controller compatible with S3C2410 SoC.
11 - "samsung,s3c2440-clock" - controller compatible with S3C2440 SoC.
12 - "samsung,s3c2442-clock" - controller compatible with S3C2442 SoC.
13 - reg: physical base address of the controller and length of memory mapped
15 - #clock-cells: should be 1.
19 on a particular SoC.
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| D | samsung,s3c2443-clock.txt | 1 * Samsung S3C2443 Clock Controller
3 The S3C2443 clock controller generates and supplies clock to various controllers
4 within the SoC. The clock binding described here is applicable to all SoCs in
9 - compatible: should be one of the following.
10 - "samsung,s3c2416-clock" - controller compatible with S3C2416 SoC.
11 - "samsung,s3c2443-clock" - controller compatible with S3C2443 SoC.
12 - "samsung,s3c2450-clock" - controller compatible with S3C2450 SoC.
13 - reg: physical base address of the controller and length of memory mapped
15 - #clock-cells: should be 1.
19 on a particular SoC.
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| D | amlogic,gxbb-clkc.txt | 3 The Amlogic GXBB clock controller generates and supplies clock to various
4 controllers within the SoC.
8 - compatible: should be:
9 "amlogic,gxbb-clkc" for GXBB SoC,
10 "amlogic,gxl-clkc" for GXL and GXM SoC,
11 "amlogic,axg-clkc" for AXG SoC.
12 "amlogic,g12a-clkc" for G12A SoC.
13 "amlogic,g12b-clkc" for G12B SoC.
14 "amlogic,sm1-clkc" for SM1 SoC.
15 - clocks : list of clock phandle, one for each entry clock-names.
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/edac/ |
| D | apm-xgene-edac.txt | 1 * APM X-Gene SoC EDAC node
3 EDAC node is defined to describe on-chip error detection and correction.
6 memory controller - Memory controller
7 PMD (L1/L2) - Processor module unit (PMD) L1/L2 cache
8 L3 - L3 cache controller
9 SoC - SoC IP's such as Ethernet, SATA, and etc
14 - compatible : Shall be "apm,xgene-edac".
15 - regmap-csw : Regmap of the CPU switch fabric (CSW) resource.
16 - regmap-mcba : Regmap of the MCB-A (memory bridge) resource.
17 - regmap-mcbb : Regmap of the MCB-B (memory bridge) resource.
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/edac/ |
| D | apm-xgene-edac.txt | 1 * APM X-Gene SoC EDAC node
3 EDAC node is defined to describe on-chip error detection and correction.
6 memory controller - Memory controller
7 PMD (L1/L2) - Processor module unit (PMD) L1/L2 cache
8 L3 - L3 cache controller
9 SoC - SoC IP's such as Ethernet, SATA, and etc
14 - compatible : Shall be "apm,xgene-edac".
15 - regmap-csw : Regmap of the CPU switch fabric (CSW) resource.
16 - regmap-mcba : Regmap of the MCB-A (memory bridge) resource.
17 - regmap-mcbb : Regmap of the MCB-B (memory bridge) resource.
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/pinctrl/ |
| D | berlin,pinctrl.txt | 1 * Pin-controller driver for the Marvell Berlin SoCs
3 Pin control registers are part of both chip controller and system
4 controller register sets. Pin controller nodes should be a sub-node of
5 either the chip controller or system controller node. The pins
9 A pin-controller node should contain subnodes representing the pin group
14 is called a 'function' in the pin-controller subsystem.
17 - compatible: should be one of:
18 "marvell,berlin2-soc-pinctrl",
19 "marvell,berlin2-system-pinctrl",
20 "marvell,berlin2cd-soc-pinctrl",
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/pinctrl/ |
| D | berlin,pinctrl.txt | 1 * Pin-controller driver for the Marvell Berlin SoCs
3 Pin control registers are part of both chip controller and system
4 controller register sets. Pin controller nodes should be a sub-node of
5 either the chip controller or system controller node. The pins
9 A pin-controller node should contain subnodes representing the pin group
14 is called a 'function' in the pin-controller subsystem.
17 - compatible: should be one of:
18 "marvell,berlin2-soc-pinctrl",
19 "marvell,berlin2-system-pinctrl",
20 "marvell,berlin2cd-soc-pinctrl",
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