Searched +full:sparx5 +full:- +full:dpll (Results 1 – 6 of 6) sorted by relevance
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/clock/ |
| D | microchip,sparx5-dpll.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/microchip,sparx5-dpll.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Microchip Sparx5 DPLL Clock
10 - Lars Povlsen <lars.povlsen@microchip.com>
13 The Sparx5 DPLL clock controller generates and supplies clock to
18 const: microchip,sparx5-dpll
26 '#clock-cells':
30 - compatible
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/clock/ |
| D | microchip,sparx5-dpll.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/microchip,sparx5-dpll.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Microchip Sparx5 DPLL Clock
10 - Lars Povlsen <lars.povlsen@microchip.com>
13 The Sparx5 DPLL clock controller generates and supplies clock to
18 const: microchip,sparx5-dpll
26 '#clock-cells':
30 - compatible
[all …]
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| /kernel/linux/linux-5.10/arch/arm64/boot/dts/microchip/ |
| D | sparx5.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/clock/microchip,sparx5.h>
11 compatible = "microchip,sparx5";
12 interrupt-parent = <&gic>;
13 #address-cells = <2>;
14 #size-cells = <1>;
23 stdout-path = "serial0:115200n8";
27 #address-cells = <2>;
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| /kernel/linux/linux-6.6/arch/arm64/boot/dts/microchip/ |
| D | sparx5.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/clock/microchip,sparx5.h>
11 compatible = "microchip,sparx5";
12 interrupt-parent = <&gic>;
13 #address-cells = <2>;
14 #size-cells = <1>;
23 stdout-path = "serial0:115200n8";
27 #address-cells = <1>;
[all …]
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| /kernel/linux/linux-6.6/drivers/clk/ |
| D | clk-sparx5.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Microchip Sparx5 SoC Clock driver.
12 #include <linux/clk-provider.h>
17 #include <dt-bindings/clock/microchip,sparx5.h>
61 unsigned long rate = parent_rate / conf->div; in s5_calc_freq()
63 if (conf->rot_ena) { in s5_calc_freq()
64 int sign = conf->rot_dir ? -1 : 1; in s5_calc_freq()
65 int divt = sel_rates[conf->rot_sel] * (1 + conf->pre_div); in s5_calc_freq()
85 conf->div = div; in s5_search_fractional()
86 conf->rot_ena = 1; /* Fractional rate */ in s5_search_fractional()
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| /kernel/linux/linux-5.10/drivers/clk/ |
| D | clk-sparx5.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Microchip Sparx5 SoC Clock driver.
12 #include <linux/clk-provider.h>
17 #include <dt-bindings/clock/microchip,sparx5.h>
61 unsigned long rate = parent_rate / conf->div; in s5_calc_freq()
63 if (conf->rot_ena) { in s5_calc_freq()
64 int sign = conf->rot_dir ? -1 : 1; in s5_calc_freq()
65 int divt = sel_rates[conf->rot_sel] * (1 + conf->pre_div); in s5_calc_freq()
85 conf->div = div; in s5_search_fractional()
86 conf->rot_ena = 1; /* Fractional rate */ in s5_search_fractional()
[all …]
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