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/kernel/linux/linux-6.6/drivers/mtd/devices/
Dmchp48l640.c1 // SPDX-License-Identifier: GPL-2.0
3 * Driver for Microchip 48L640 64 Kb SPI Serial EERAM
23 #include <linux/spi/flash.h>
24 #include <linux/spi/spi.h>
33 struct spi_device *spi; member
60 static int mchp48l640_mkcmd(struct mchp48l640_flash *flash, u8 cmd, loff_t addr, char *buf) in mchp48l640_mkcmd() argument
69 static int mchp48l640_read_status(struct mchp48l640_flash *flash, int *status) in mchp48l640_read_status() argument
76 mutex_lock(&flash->lock); in mchp48l640_read_status()
77 ret = spi_write_then_read(flash->spi, &cmd[0], 1, &cmd[1], 1); in mchp48l640_read_status()
78 mutex_unlock(&flash->lock); in mchp48l640_read_status()
[all …]
Dmchp23k256.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Driver for Microchip 23k256 SPI RAM chips
16 #include <linux/spi/flash.h>
17 #include <linux/spi/spi.h>
28 struct spi_device *spi; member
41 static void mchp23k256_addr2cmd(struct mchp23k256_flash *flash, in mchp23k256_addr2cmd() argument
51 for (i = flash->caps->addr_width; i > 0; i--, addr >>= 8) in mchp23k256_addr2cmd()
55 static int mchp23k256_cmdsz(struct mchp23k256_flash *flash) in mchp23k256_cmdsz() argument
57 return 1 + flash->caps->addr_width; in mchp23k256_cmdsz()
63 struct mchp23k256_flash *flash = to_mchp23k256_flash(mtd); in mchp23k256_write() local
[all …]
Dsst25l.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Driver for SST25L SPI Flash chips
24 #include <linux/spi/spi.h>
25 #include <linux/spi/flash.h>
47 struct spi_device *spi; member
67 static int sst25l_status(struct sst25l_flash *flash, int *status) in sst25l_status() argument
83 err = spi_sync(flash->spi, &m); in sst25l_status()
91 static int sst25l_write_enable(struct sst25l_flash *flash, int enable) in sst25l_write_enable() argument
97 err = spi_write(flash->spi, command, 1); in sst25l_write_enable()
102 err = spi_write(flash->spi, command, 1); in sst25l_write_enable()
[all …]
/kernel/linux/linux-5.10/drivers/mtd/devices/
Dmchp23k256.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Driver for Microchip 23k256 SPI RAM chips
16 #include <linux/spi/flash.h>
17 #include <linux/spi/spi.h>
28 struct spi_device *spi; member
41 static void mchp23k256_addr2cmd(struct mchp23k256_flash *flash, in mchp23k256_addr2cmd() argument
51 for (i = flash->caps->addr_width; i > 0; i--, addr >>= 8) in mchp23k256_addr2cmd()
55 static int mchp23k256_cmdsz(struct mchp23k256_flash *flash) in mchp23k256_cmdsz() argument
57 return 1 + flash->caps->addr_width; in mchp23k256_cmdsz()
63 struct mchp23k256_flash *flash = to_mchp23k256_flash(mtd); in mchp23k256_write() local
[all …]
Dsst25l.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Driver for SST25L SPI Flash chips
24 #include <linux/spi/spi.h>
25 #include <linux/spi/flash.h>
47 struct spi_device *spi; member
67 static int sst25l_status(struct sst25l_flash *flash, int *status) in sst25l_status() argument
83 err = spi_sync(flash->spi, &m); in sst25l_status()
91 static int sst25l_write_enable(struct sst25l_flash *flash, int enable) in sst25l_write_enable() argument
97 err = spi_write(flash->spi, command, 1); in sst25l_write_enable()
102 err = spi_write(flash->spi, command, 1); in sst25l_write_enable()
[all …]
/kernel/linux/linux-5.10/drivers/mtd/spi-nor/controllers/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 tristate "Aspeed flash controllers in SPI mode"
8 in the Aspeed AST2500/AST2400 SoCs when attached to SPI NOR chips,
9 and support for the SPI flash memory controller (SPI) for
10 the host firmware. The implementation only supports SPI NOR.
13 tristate "Hisilicon FMC SPI NOR Flash Controller(SFC)"
17 This enables support for HiSilicon FMC SPI NOR flash controller.
20 tristate "NXP SPI Flash Interface (SPIFI)"
24 Enable support for the NXP LPC SPI Flash Interface controller.
26 SPIFI is a specialized controller for connecting serial SPI
[all …]
/kernel/linux/linux-6.6/drivers/spi/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 # SPI driver configuration
5 menuconfig SPI config
6 bool "SPI support"
10 protocol. Chips that support SPI can have data transfer rates
12 controller and a chipselect. Most SPI slaves don't support
13 dynamic device discovery; some are even write-only or read-only.
15 SPI is widely used by microcontrollers to talk with sensors,
16 eeprom and flash memory, codecs and various other controller
17 chips, analog to digital (and d-to-a) converters, and more.
[all …]
/kernel/linux/linux-6.6/Documentation/ABI/testing/
Dsysfs-bus-spi-devices-spi-nor1 What: /sys/bus/spi/devices/.../spi-nor/jedec_id
4 Contact: linux-mtd@lists.infradead.org
5 Description: (RO) The JEDEC ID of the SPI NOR flash as reported by the
6 flash device.
8 The attribute is not present if the flash doesn't support
10 non-JEDEC compliant flashes.
12 What: /sys/bus/spi/devices/.../spi-nor/manufacturer
15 Contact: linux-mtd@lists.infradead.org
16 Description: (RO) Manufacturer of the SPI NOR flash.
18 The attribute is not present if the flash device isn't
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/mtd/
Dnxp-spifi.txt1 * NXP SPI Flash Interface (SPIFI)
3 NXP SPIFI is a specialized SPI interface for serial Flash devices.
4 It supports one Flash device with 1-, 2- and 4-bits width in SPI
6 mode. In memory mode the Flash is accessible from the CPU as
10 - compatible : Should be "nxp,lpc1773-spifi"
11 - reg : the first contains the register location and length,
13 - reg-names: Should contain the reg names "spifi" and "flash"
14 - interrupts : Should contain the interrupt for the device
15 - clocks : The clocks needed by the SPIFI controller
16 - clock-names : Should contain the clock names "spifi" and "reg"
[all …]
Daspeed-smc.txt2 * Aspeed SPI Flash Memory Controller
5 three chip selects, two of which are always of SPI type and the third
6 can be SPI or NOR type flash. These bindings only describe SPI.
8 The two SPI flash memory controllers in the AST2500 each support two
12 - compatible : Should be one of
13 "aspeed,ast2400-fmc" for the AST2400 Firmware Memory Controller
14 "aspeed,ast2400-spi" for the AST2400 SPI Flash memory Controller
15 "aspeed,ast2500-fmc" for the AST2500 Firmware Memory Controller
16 "aspeed,ast2500-spi" for the AST2500 SPI flash memory controllers
18 - reg : the first contains the control register location and length,
[all …]
Djedec,spi-nor.txt1 * SPI NOR flash: ST M25Pxx (and similar) serial flash chips
4 - #address-cells, #size-cells : Must be present if the device has sub-nodes
6 - compatible : May include a device-specific string consisting of the
9 Must also include "jedec,spi-nor" for any SPI NOR flash that can
51 designate quirky versions of flash chips that do not support the
53 m25p05-nonjedec
54 m25p10-nonjedec
55 m25p20-nonjedec
56 m25p40-nonjedec
57 m25p80-nonjedec
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/mtd/
Dnxp-spifi.txt1 * NXP SPI Flash Interface (SPIFI)
3 NXP SPIFI is a specialized SPI interface for serial Flash devices.
4 It supports one Flash device with 1-, 2- and 4-bits width in SPI
6 mode. In memory mode the Flash is accessible from the CPU as
10 - compatible : Should be "nxp,lpc1773-spifi"
11 - reg : the first contains the register location and length,
13 - reg-names: Should contain the reg names "spifi" and "flash"
14 - interrupts : Should contain the interrupt for the device
15 - clocks : The clocks needed by the SPIFI controller
16 - clock-names : Should contain the clock names "spifi" and "reg"
[all …]
Djedec,spi-nor.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/mtd/jedec,spi-nor.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: SPI NOR flash ST M25Pxx (and similar) serial flash chips
10 - Rob Herring <robh@kernel.org>
13 - $ref: mtd.yaml#
14 - $ref: /schemas/spi/spi-peripheral-props.yaml#
19 - items:
20 - pattern: "^((((micron|spansion|st),)?\
[all …]
/kernel/linux/linux-5.10/drivers/spi/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 # SPI driver configuration
5 menuconfig SPI config
6 bool "SPI support"
10 protocol. Chips that support SPI can have data transfer rates
12 controller and a chipselect. Most SPI slaves don't support
13 dynamic device discovery; some are even write-only or read-only.
15 SPI is widely used by microcontrollers to talk with sensors,
16 eeprom and flash memory, codecs and various other controller
17 chips, analog to digital (and d-to-a) converters, and more.
[all …]
/kernel/linux/linux-6.6/drivers/mtd/spi-nor/
Dcore.h1 /* SPDX-License-Identifier: GPL-2.0 */
14 /* Standard SPI NOR flash operations. */
155 /* Dual SPI */
161 /* Quad SPI */
167 /* Octal SPI */
180 /* Quad SPI */
185 /* Octal SPI */
195 * struct spi_nor_erase_type - Structure to describe a SPI NOR erase type
201 * @opcode: the SPI command op code to erase the sector/block.
202 * @idx: Erase Type index as sorted in the Basic Flash Parameter
[all …]
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 tristate "SPI NOR device support"
8 This is the framework for the SPI NOR which can be used by the SPI
9 device drivers and the SPI NOR device driver.
17 Many flash memories support erasing small (4096 B) sectors. Depending
20 Changing a small part of the flash's contents is usually faster with
34 This option disables the software write protection on any SPI
35 flashes at boot-up.
37 Depending on the flash chip this either clears the block protection
41 of your SPI flash. This is only to keep backwards compatibility.
[all …]
/kernel/linux/linux-5.10/Documentation/driver-api/mtd/
Dintel-spi.rst2 Upgrading BIOS using intel-spi
5 Many Intel CPUs like Baytrail and Braswell include SPI serial flash host
7 Since contents of the SPI serial flash is crucial for machine to function,
11 Not all manufacturers protect the SPI serial flash, mainly because it
14 The intel-spi driver makes it possible to read and write the SPI serial
15 flash, if certain protection bits are not set and locked. If it finds
16 any of them set, the whole MTD device is made read-only to prevent
17 partial overwrites. By default the driver exposes SPI serial flash
18 contents as read-only but it can be changed from kernel command line,
19 passing "intel-spi.writeable=1".
[all …]
/kernel/linux/linux-6.6/Documentation/driver-api/mtd/
Dspi-intel.rst2 Upgrading BIOS using spi-intel
5 Many Intel CPUs like Baytrail and Braswell include SPI serial flash host
7 Since contents of the SPI serial flash is crucial for machine to function,
11 Not all manufacturers protect the SPI serial flash, mainly because it
14 The spi-intel driver makes it possible to read and write the SPI serial
15 flash, if certain protection bits are not set and locked. If it finds
16 any of them set, the whole MTD device is made read-only to prevent
17 partial overwrites. By default the driver exposes SPI serial flash
18 contents as read-only but it can be changed from kernel command line,
21 Please keep in mind that overwriting the BIOS image on SPI serial flash
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/memory-controllers/
Drenesas,rpc-if.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/renesas,rpc-if.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas Reduced Pin Count Interface (RPC-IF)
10 - Sergei Shtylyov <sergei.shtylyov@gmail.com>
13 Renesas RPC-IF allows a SPI flash or HyperFlash connected to the SoC to
16 The flash chip itself should be represented by a subnode of the RPC-IF node.
17 The flash interface is selected based on the "compatible" property of this
19 - if it contains "jedec,spi-nor", then SPI is used;
[all …]
/kernel/linux/linux-5.10/drivers/mtd/spi-nor/
Dcore.h1 /* SPDX-License-Identifier: GPL-2.0 */
48 /* Dual SPI */
54 /* Quad SPI */
60 /* Octal SPI */
72 /* Quad SPI */
77 /* Octal SPI */
86 * struct spi_nor_erase_type - Structure to describe a SPI NOR erase type
92 * @opcode: the SPI command op code to erase the sector/block.
93 * @idx: Erase Type index as sorted in the Basic Flash Parameter
107 * struct spi_nor_erase_command - Used for non-uniform erases
[all …]
/kernel/linux/linux-6.6/drivers/mtd/spi-nor/controllers/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 tristate "Hisilicon FMC SPI NOR Flash Controller(SFC)"
7 This enables support for HiSilicon FMC SPI NOR flash controller.
10 tristate "NXP SPI Flash Interface (SPIFI)"
14 Enable support for the NXP LPC SPI Flash Interface controller.
16 SPIFI is a specialized controller for connecting serial SPI
17 Flash. Enable this option if you have a device with a SPIFI
18 controller and want to access the Flash as a mtd device.
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/spi/
Damlogic,meson6-spifc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/spi/amlogic,meson6-spifc.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Amlogic Meson SPI Flash Controller
11 - Neil Armstrong <neil.armstrong@linaro.org>
14 - $ref: spi-controller.yaml#
17 The Meson SPIFC is a controller optimized for communication with SPI
18 NOR memories, without DMA support and a 64-byte unified transmit /
24 - amlogic,meson6-spifc # SPI Flash Controller on Meson6 and compatible SoCs
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/spi/
Damlogic,meson6-spifc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: "http://devicetree.org/schemas/spi/amlogic,meson6-spifc.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
8 title: Amlogic Meson SPI Flash Controller
11 - Neil Armstrong <narmstrong@baylibre.com>
14 - $ref: "spi-controller.yaml#"
17 The Meson SPIFC is a controller optimized for communication with SPI
18 NOR memories, without DMA support and a 64-byte unified transmit /
24 - amlogic,meson6-spifc # SPI Flash Controller on Meson6 and compatible SoCs
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/freescale/
Dfsl-ls1088a-qds.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
11 /dts-v1/;
13 #include "fsl-ls1088a.dtsi"
17 compatible = "fsl,ls1088a-qds", "fsl,ls1088a";
21 bus-num = <0>;
24 flash@0 {
25 #address-cells = <1>;
26 #size-cells = <1>;
27 compatible = "jedec,spi-nor";
29 spi-max-frequency = <1000000>;
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/freescale/
Dfsl-ls1088a-qds.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
11 /dts-v1/;
13 #include "fsl-ls1088a.dtsi"
17 compatible = "fsl,ls1088a-qds", "fsl,ls1088a";
21 bus-num = <0>;
24 flash@0 {
25 #address-cells = <1>;
26 #size-cells = <1>;
27 compatible = "jedec,spi-nor";
29 spi-max-frequency = <1000000>;
[all …]

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