Searched +full:spi +full:- +full:pins (Results 1 – 25 of 1031) sorted by relevance
12345678910>>...42
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/spi/ |
| D | spi-mt65xx.txt | 1 Binding for MTK SPI controller 4 - compatible: should be one of the following. 5 - mediatek,mt2701-spi: for mt2701 platforms 6 - mediatek,mt2712-spi: for mt2712 platforms 7 - mediatek,mt6589-spi: for mt6589 platforms 8 - mediatek,mt6765-spi: for mt6765 platforms 9 - mediatek,mt7622-spi: for mt7622 platforms 10 - "mediatek,mt7629-spi", "mediatek,mt7622-spi": for mt7629 platforms 11 - mediatek,mt8135-spi: for mt8135 platforms 12 - mediatek,mt8173-spi: for mt8173 platforms [all …]
|
| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/pinctrl/ |
| D | pinctrl-mcp23s08.txt | 2 8-/16-bit I/O expander with serial interface (I2C/SPI) 5 - compatible : Should be 6 - "mcp,mcp23s08" (DEPRECATED) for 8 GPIO SPI version 7 - "mcp,mcp23s17" (DEPRECATED) for 16 GPIO SPI version 8 - "mcp,mcp23008" (DEPRECATED) for 8 GPIO I2C version or 9 - "mcp,mcp23017" (DEPRECATED) for 16 GPIO I2C version of the chip 11 - "microchip,mcp23s08" for 8 GPIO SPI version 12 - "microchip,mcp23s17" for 16 GPIO SPI version 13 - "microchip,mcp23s18" for 16 GPIO SPI version 14 - "microchip,mcp23008" for 8 GPIO I2C version or [all …]
|
| D | marvell,dove-pinctrl.txt | 3 Please refer to marvell,mvebu-pinctrl.txt in this directory for common binding 7 - compatible: "marvell,dove-pinctrl" 8 - clocks: (optional) phandle of pdma clock 9 - reg: register specifiers of MPP, MPP4, and PMU MPP registers 11 Available mpp pins/groups and functions: 16 name pins functions 23 uart1(cts), lcd-spi(cs1), pmu* 31 mpp11 11 gpio, pmu, sata(prsnt), sata-1(act), sdio0(ledctrl), 39 mpp16 16 gpio, uart3(rts), sdio0(cd), ac97(sdi1), lcd-spi(cs1) 41 ac97-1(sysclko) [all …]
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/pinctrl/ |
| D | pinctrl-mcp23s08.txt | 2 8-/16-bit I/O expander with serial interface (I2C/SPI) 5 - compatible : Should be 6 - "mcp,mcp23s08" (DEPRECATED) for 8 GPIO SPI version 7 - "mcp,mcp23s17" (DEPRECATED) for 16 GPIO SPI version 8 - "mcp,mcp23008" (DEPRECATED) for 8 GPIO I2C version or 9 - "mcp,mcp23017" (DEPRECATED) for 16 GPIO I2C version of the chip 11 - "microchip,mcp23s08" for 8 GPIO SPI version 12 - "microchip,mcp23s17" for 16 GPIO SPI version 13 - "microchip,mcp23s18" for 16 GPIO SPI version 14 - "microchip,mcp23008" for 8 GPIO I2C version or [all …]
|
| D | marvell,dove-pinctrl.txt | 3 Please refer to marvell,mvebu-pinctrl.txt in this directory for common binding 7 - compatible: "marvell,dove-pinctrl" 8 - clocks: (optional) phandle of pdma clock 9 - reg: register specifiers of MPP, MPP4, and PMU MPP registers 11 Available mpp pins/groups and functions: 16 name pins functions 23 uart1(cts), lcd-spi(cs1), pmu* 31 mpp11 11 gpio, pmu, sata(prsnt), sata-1(act), sdio0(ledctrl), 39 mpp16 16 gpio, uart3(rts), sdio0(cd), ac97(sdi1), lcd-spi(cs1) 41 ac97-1(sysclko) [all …]
|
| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | vf610-bk4.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 /dts-v1/; 15 stdout-path = &uart1; 23 audio_ext: oscillator-audio { 24 compatible = "fixed-clock"; 25 #clock-cells = <0>; 26 clock-frequency = <24576000>; 29 enet_ext: oscillator-ethernet { 30 compatible = "fixed-clock"; 31 #clock-cells = <0>; [all …]
|
| D | mt7629-rfb.dts | 1 // SPDX-License-Identifier: GPL-2.0 7 /dts-v1/; 8 #include <dt-bindings/input/input.h> 13 compatible = "mediatek,mt7629-rfb", "mediatek,mt7629"; 20 stdout-path = "serial0:115200n8"; 23 gpio-keys { 24 compatible = "gpio-keys"; 44 reg_3p3v: regulator-3p3v { 45 compatible = "regulator-fixed"; 46 regulator-name = "fixed-3.3V"; [all …]
|
| D | spear1310-evb.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later 8 /dts-v1/; 13 compatible = "st,spear1310-evb", "st,spear1310"; 14 #address-cells = <1>; 15 #size-cells = <1>; 23 pinctrl-names = "default"; 24 pinctrl-0 = <&state_default>; 28 st,pins = "i2c0_grp"; 32 st,pins = "i2s0_grp"; 36 st,pins = "i2s1_grp"; [all …]
|
| D | bcm2711.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 4 #include <dt-bindings/interrupt-controller/arm-gic.h> 5 #include <dt-bindings/soc/bcm2835-pm.h> 10 #address-cells = <2>; 11 #size-cells = <1>; 13 interrupt-parent = <&gicv2>; 16 compatible = "brcm,bcm2711-vc5"; 20 clk_27MHz: clk-27M { 21 #clock-cells = <0>; 22 compatible = "fixed-clock"; [all …]
|
| D | spear1340-evb.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later 8 /dts-v1/; 13 compatible = "st,spear1340-evb", "st,spear1340"; 14 #address-cells = <1>; 15 #size-cells = <1>; 23 pinctrl-names = "default"; 24 pinctrl-0 = <&state_default>; 28 st,pins = "pads_as_gpio_grp"; 32 st,pins = "fsmc_8bit_grp"; 36 st,pins = "uart0_grp"; [all …]
|
| /kernel/linux/linux-6.6/arch/arm/boot/dts/nxp/vf/ |
| D | vf610-bk4.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 /dts-v1/; 15 stdout-path = &uart1; 23 audio_ext: oscillator-audio { 24 compatible = "fixed-clock"; 25 #clock-cells = <0>; 26 clock-frequency = <24576000>; 29 enet_ext: oscillator-ethernet { 30 compatible = "fixed-clock"; 31 #clock-cells = <0>; [all …]
|
| /kernel/linux/linux-5.10/arch/arm64/boot/dts/microchip/ |
| D | sparx5_pcb135_board.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 18 gpio-restart { 19 compatible = "gpio-restart"; 26 i2cmux_pins_i: i2cmux-pins-i { 27 pins = "GPIO_35", "GPIO_36", 30 output-low; 32 i2cmux_s29: i2cmux-0 { 33 pins = "GPIO_35"; 35 output-high; [all …]
|
| D | sparx5_pcb134_board.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 34 gpio-restart { 35 compatible = "gpio-restart"; 43 spi@0 { 44 compatible = "spi-mux"; 45 mux-controls = <&mux>; 46 #address-cells = <1>; 47 #size-cells = <0>; 49 spi-flash@9 { [all …]
|
| /kernel/linux/linux-6.6/arch/arm/boot/dts/nxp/imx/ |
| D | imx6ul-kontron-sl-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 8 #include <dt-bindings/gpio/gpio.h> 12 stdout-path = &uart4; 22 cs-gpios = <&gpio4 22 GPIO_ACTIVE_LOW>; 23 pinctrl-names = "default"; 24 pinctrl-0 = <&pinctrl_ecspi2>; 28 compatible = "mxicy,mx25v8035f", "jedec,spi-nor"; 29 spi-max-frequency = <50000000>; 35 pinctrl-names = "default"; 36 pinctrl-0 = <&pinctrl_enet1 &pinctrl_enet1_mdio>; [all …]
|
| /kernel/linux/linux-6.6/arch/arm64/boot/dts/mediatek/ |
| D | mt7986a-rfb.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 7 /dts-v1/; 8 #include <dt-bindings/pinctrl/mt65xx.h> 14 chassis-type = "embedded"; 15 compatible = "mediatek,mt7986a-rfb", "mediatek,mt7986a"; 22 stdout-path = "serial0:115200n8"; 30 reg_1p8v: regulator-1p8v { 31 compatible = "regulator-fixed"; 32 regulator-name = "fixed-1.8V"; 33 regulator-min-microvolt = <1800000>; [all …]
|
| D | mt7622-bananapi-bpi-r64.dts | 5 * SPDX-License-Identifier: (GPL-2.0 OR MIT) 8 /dts-v1/; 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/leds/common.h> 17 model = "Bananapi BPI-R64"; 18 chassis-type = "embedded"; 19 compatible = "bananapi,bpi-r64", "mediatek,mt7622"; 26 stdout-path = "serial0:115200n8"; 32 proc-supply = <&mt6380_vcpu_reg>; [all …]
|
| /kernel/linux/linux-6.6/arch/mips/boot/dts/ralink/ |
| D | mt7628a.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 4 #address-cells = <1>; 5 #size-cells = <1>; 6 compatible = "ralink,mt7628a-soc"; 9 #address-cells = <1>; 10 #size-cells = <0>; 19 resetc: reset-controller { 20 compatible = "ralink,rt2880-reset"; 21 #reset-cells = <1>; 24 cpuintc: interrupt-controller { [all …]
|
| /kernel/linux/linux-6.6/arch/arm/boot/dts/mediatek/ |
| D | mt7629-rfb.dts | 1 // SPDX-License-Identifier: GPL-2.0 7 /dts-v1/; 8 #include <dt-bindings/input/input.h> 13 compatible = "mediatek,mt7629-rfb", "mediatek,mt7629"; 20 stdout-path = "serial0:115200n8"; 23 gpio-keys { 24 compatible = "gpio-keys"; 26 button-reset { 32 button-wps { 44 reg_3p3v: regulator-3p3v { [all …]
|
| /kernel/linux/linux-6.6/arch/arm64/boot/dts/qcom/ |
| D | ipq5332-rdp442.dts | 1 // SPDX-License-Identifier: BSD-3-Clause 8 /dts-v1/; 10 #include "ipq5332-rdp-common.dtsi" 14 compatible = "qcom,ipq5332-ap-mi01.3", "qcom,ipq5332"; 18 clock-frequency = <400000>; 19 pinctrl-0 = <&i2c_1_pins>; 20 pinctrl-names = "default"; 25 pinctrl-0 = <&spi_0_data_clk_pins &spi_0_cs_pins>; 26 pinctrl-names = "default"; 30 compatible = "micron,n25q128a11", "jedec,spi-nor"; [all …]
|
| D | ipq5332-rdp468.dts | 1 // SPDX-License-Identifier: BSD-3-Clause 5 * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. 8 /dts-v1/; 10 #include "ipq5332-rdp-common.dtsi" 14 compatible = "qcom,ipq5332-ap-mi01.6", "qcom,ipq5332"; 18 pinctrl-0 = <&spi_0_data_clk_pins &spi_0_cs_pins>; 19 pinctrl-names = "default"; 23 compatible = "micron,n25q128a11", "jedec,spi-nor"; 25 #address-cells = <1>; 26 #size-cells = <1>; [all …]
|
| D | qdu1000.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 6 #include <dt-bindings/clock/qcom,qdu1000-gcc.h> 7 #include <dt-bindings/clock/qcom,rpmh.h> 8 #include <dt-bindings/dma/qcom-gpi.h> 9 #include <dt-bindings/interconnect/qcom,qdu1000-rpmh.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/power/qcom-rpmpd.h> 12 #include <dt-bindings/soc/qcom,rpmh-rsc.h> 15 interrupt-parent = <&intc>; 17 #address-cells = <2>; [all …]
|
| /kernel/linux/linux-6.6/arch/arm/boot/dts/ti/omap/ |
| D | am335x-moxa-uc-2100-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Copyright (C) 2018 MOXA Inc. - https://www.moxa.com/ 13 vbat: vbat-regulator { 14 compatible = "regulator-fixed"; 18 vmmcsd_fixed: vmmcsd-regulator { 19 compatible = "regulator-fixed"; 20 regulator-name = "vmmcsd_fixed"; 21 regulator-min-microvolt = <3300000>; 22 regulator-max-microvolt = <3300000>; 23 regulator-boot-on; [all …]
|
| /kernel/linux/linux-6.6/arch/arm/boot/dts/nuvoton/ |
| D | nuvoton-npcm730-kudo.dts | 1 // SPDX-License-Identifier: GPL-2.0 4 /dts-v1/; 5 #include "nuvoton-npcm730.dtsi" 7 #include <dt-bindings/gpio/gpio.h> 41 stdout-path = &serial3; 48 iio-hwmon { 49 compatible = "iio-hwmon"; 50 io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>, 55 compatible = "nuvoton,npcm750-jtag-master"; 56 #address-cells = <1>; [all …]
|
| /kernel/linux/linux-5.10/arch/arm64/boot/dts/mediatek/ |
| D | mt7622-rfb1.dts | 6 * SPDX-License-Identifier: (GPL-2.0 OR MIT) 9 /dts-v1/; 10 #include <dt-bindings/input/input.h> 11 #include <dt-bindings/gpio/gpio.h> 18 compatible = "mediatek,mt7622-rfb1", "mediatek,mt7622"; 25 stdout-path = "serial0:115200n8"; 31 proc-supply = <&mt6380_vcpu_reg>; 32 sram-supply = <&mt6380_vm_reg>; 36 proc-supply = <&mt6380_vcpu_reg>; 37 sram-supply = <&mt6380_vm_reg>; [all …]
|
| /kernel/linux/linux-6.6/arch/arm/boot/dts/sunplus/ |
| D | sunplus-sp7021.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 8 #include <dt-bindings/clock/sunplus,sp7021-clkc.h> 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include <dt-bindings/reset/sunplus,sp7021-reset.h> 11 #include <dt-bindings/pinctrl/sppctl-sp7021.h> 12 #include <dt-bindings/gpio/gpio.h> 22 compatible = "fixed-clock"; 23 #clock-cells = <0>; 24 clock-frequency = <XTAL>; 25 clock-output-names = "extclk"; [all …]
|
12345678910>>...42