| /kernel/linux/linux-5.10/Documentation/spi/ |
| D | spi-summary.rst | 2 Overview of Linux kernel SPI support
5 02-Feb-2012
7 What is SPI?
8 ------------
9 The "Serial Peripheral Interface" (SPI) is a synchronous four wire serial
12 standardization body. SPI uses a master/slave configuration.
15 and parallel data lines with "Master Out, Slave In" (MOSI) or "Master In,
16 Slave Out" (MISO) signals. (Other names are also used.) There are four
17 clocking modes through which data is exchanged; mode-0 and mode-3 are most
22 SPI masters use a fourth "chip select" line to activate a given SPI slave
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| D | pxa2xx.rst | 2 PXA2xx SPI on SSP driver HOWTO
6 synchronous serial port into a SPI master controller
7 (see Documentation/spi/spi-summary.rst). The driver has the following features
9 - Support for any PXA2xx SSP
10 - SSP PIO and SSP DMA data transfers.
11 - External and Internal (SSPFRM) chip selects.
12 - Per slave device (chip) configuration.
13 - Full suspend, freeze, resume support.
17 (pump_transfer) is responsible for queuing SPI transactions and setting up and
21 -----------------------------------
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| /kernel/linux/linux-6.6/Documentation/spi/ |
| D | spi-summary.rst | 2 Overview of Linux kernel SPI support
5 02-Feb-2012
7 What is SPI?
8 ------------
9 The "Serial Peripheral Interface" (SPI) is a synchronous four wire serial
12 standardization body. SPI uses a master/slave configuration.
15 and parallel data lines with "Master Out, Slave In" (MOSI) or "Master In,
16 Slave Out" (MISO) signals. (Other names are also used.) There are four
17 clocking modes through which data is exchanged; mode-0 and mode-3 are most
22 SPI masters use a fourth "chip select" line to activate a given SPI slave
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| D | pxa2xx.rst | 2 PXA2xx SPI on SSP driver HOWTO
6 synchronous serial port into an SPI master controller
7 (see Documentation/spi/spi-summary.rst). The driver has the following features
9 - Support for any PXA2xx and compatible SSP.
10 - SSP PIO and SSP DMA data transfers.
11 - External and Internal (SSPFRM) chip selects.
12 - Per slave device (chip) configuration.
13 - Full suspend, freeze, resume support.
17 is responsible for queuing SPI transactions and setting up and launching
21 -----------------------------------
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/spi/ |
| D | mediatek,spi-slave-mt27xx.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/mediatek,spi-slave-mt27xx.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: SPI Slave controller for MediaTek ARM SoCs
10 - Leilk Liu <leilk.liu@mediatek.com>
13 - $ref: /schemas/spi/spi-controller.yaml#
18 - mediatek,mt2712-spi-slave
19 - mediatek,mt8195-spi-slave
30 clock-names:
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| D | spi-controller.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/spi/spi-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: SPI Controller Common Properties
10 - Mark Brown <broonie@kernel.org>
13 SPI busses can be described with a node for the SPI controller device
14 and a set of child nodes for each SPI slave on the bus. The system SPI
15 controller may be described for use in SPI master mode or in SPI slave mode,
20 pattern: "^spi(@.*|-([0-9]|[1-9][0-9]+))?$"
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| D | icpdas-lp8841-spi-rtc.txt | 1 * ICP DAS LP-8841 SPI Controller for RTC
3 ICP DAS LP-8841 contains a DS-1302 RTC. RTC is connected to an IO
4 memory register, which acts as an SPI master device.
6 The device uses the standard MicroWire half-duplex transfer timing.
13 - #address-cells: should be 1
15 - #size-cells: should be 0
17 - compatible: should be "icpdas,lp8841-spi-rtc"
19 - reg: should provide IO memory address
21 Requirements to SPI slave nodes:
23 - There can be only one slave device.
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| D | spi-sunplus-sp7021.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/spi/spi-sunplus-sp7021.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Sunplus sp7021 SPI controller
11 - $ref: spi-controller.yaml
14 - Li-hao Kuo <lhjeff911@gmail.com>
19 - sunplus,sp7021-spi
23 - description: the SPI master registers
24 - description: the SPI slave registers
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/spi/ |
| D | spi-controller.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/spi/spi-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: SPI Controller Generic Binding
10 - Mark Brown <broonie@kernel.org>
13 SPI busses can be described with a node for the SPI controller device
14 and a set of child nodes for each SPI slave on the bus. The system SPI
15 controller may be described for use in SPI master mode or in SPI slave mode,
20 pattern: "^spi(@.*|-[0-9a-f])*$"
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| D | icpdas-lp8841-spi-rtc.txt | 1 * ICP DAS LP-8841 SPI Controller for RTC
3 ICP DAS LP-8841 contains a DS-1302 RTC. RTC is connected to an IO
4 memory register, which acts as an SPI master device.
6 The device uses the standard MicroWire half-duplex transfer timing.
13 - #address-cells: should be 1
15 - #size-cells: should be 0
17 - compatible: should be "icpdas,lp8841-spi-rtc"
19 - reg: should provide IO memory address
21 Requirements to SPI slave nodes:
23 - There can be only one slave device.
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| D | nvidia,tegra114-spi.txt | 1 NVIDIA Tegra114 SPI controller.
4 - compatible : For Tegra114, must contain "nvidia,tegra114-spi".
5 Otherwise, must contain '"nvidia,<chip>-spi", "nvidia,tegra114-spi"' where
7 - reg: Should contain SPI registers location and length.
8 - interrupts: Should contain SPI interrupts.
9 - clock-names : Must include the following entries:
10 - spi
11 - resets : Must contain an entry for each entry in reset-names.
13 - reset-names : Must include the following entries:
14 - spi
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| D | spi-slave-mt27xx.txt | 1 Binding for MTK SPI Slave controller
4 - compatible: should be one of the following.
5 - mediatek,mt2712-spi-slave: for mt2712 platforms
6 - reg: Address and length of the register set for the device.
7 - interrupts: Should contain spi interrupt.
8 - clocks: phandles to input clocks.
10 - clock-names: should be "spi" for the clock gate.
13 - assigned-clocks: it's mux clock, should be <&topckgen CLK_TOP_SPISLV_SEL>.
14 - assigned-clock-parents: parent of mux clock.
16 - <&topckgen CLK_TOP_UNIVPLL1_D2>: specify parent clock 312MHZ.
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/fpga/ |
| D | xlnx,fpga-slave-serial.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/fpga/xlnx,fpga-slave-serial.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Xilinx Slave Serial SPI FPGA
10 - Nava kishore Manne <nava.kishore.manne@amd.com>
13 Xilinx Spartan-6 and 7 Series FPGAs support a method of loading the bitstream
14 over what is referred to as slave serial interface.The slave serial link is
15 not technically SPI, and might require extra circuits in order to play nicely
16 with other SPI slaves on the same bus.
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| D | lattice-machxo2-spi.txt | 1 Lattice MachXO2 Slave SPI FPGA Manager
4 'slave SPI' interface.
9 - compatible: should contain "lattice,machxo2-slave-spi"
10 - reg: spi chip select of the FPGA
14 fpga-region0 {
15 compatible = "fpga-region";
16 fpga-mgr = <&fpga_mgr_spi>;
17 #address-cells = <0x1>;
18 #size-cells = <0x1>;
21 spi1: spi@2000 {
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| /kernel/linux/linux-5.10/drivers/spi/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
3 # SPI driver configuration
5 menuconfig SPI config
6 bool "SPI support"
10 protocol. Chips that support SPI can have data transfer rates
12 controller and a chipselect. Most SPI slaves don't support
13 dynamic device discovery; some are even write-only or read-only.
15 SPI is widely used by microcontrollers to talk with sensors,
17 chips, analog to digital (and d-to-a) converters, and more.
18 MMC and SD cards can be accessed using SPI protocol; and for
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| D | spi-slave-time.c | 2 * SPI slave handler reporting uptime at reception of previous SPI message
4 * This SPI slave handler sends the time of reception of the last SPI message
5 * as two 32-bit unsigned integers in binary format and in network byte order,
9 * Copyright (C) 2016-2017 Glider bvba
15 * Usage (assuming /dev/spidev2.0 corresponds to the SPI master on the remote
18 * # spidev_test -D /dev/spidev2.0 -p dummy-8B
19 * spi mode: 0x0
30 #include <linux/spi/spi.h>
34 struct spi_device *spi; member
48 ret = priv->msg.status; in spi_slave_time_complete()
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| D | spi-slave-system-control.c | 2 * SPI slave handler controlling system state
4 * This SPI slave handler allows remote control of system reboot, power off,
7 * Copyright (C) 2016-2017 Glider bvba
13 * Usage (assuming /dev/spidev2.0 corresponds to the SPI master on the remote
20 * # spidev_test -D /dev/spidev2.0 -p $suspend # or $reboot, $poweroff, $halt
27 #include <linux/spi/spi.h>
30 * The numbers are chosen to display something human-readable on two 7-segment
39 struct spi_device *spi; member
55 if (priv->msg.status) in spi_slave_system_control_complete()
58 cmd = be16_to_cpu(priv->cmd); in spi_slave_system_control_complete()
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| /kernel/linux/linux-6.6/drivers/spi/ |
| D | spi-bitbang-txrx.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
4 * simple SPI master driver. Two do polled word-at-a-time I/O:
6 * - GPIO/parport bitbangers. Provide chipselect() and txrx_word[](),
7 * expanding the per-word routines from the inline templates below.
9 * - Drivers for controllers resembling bare shift registers. Provide
15 * - Drivers leveraging smarter hardware, with fifos or DMA; or for half
36 * A non-inlined routine would call bitbang_txrx_*() routines. The
49 bitbang_txrx_be_cpha0(struct spi_device *spi, in bitbang_txrx_be_cpha0() argument
55 u32 oldbit = (!(word & (1<<(bits-1)))) << 31; in bitbang_txrx_be_cpha0()
57 for (word <<= (32 - bits); likely(bits); bits--) { in bitbang_txrx_be_cpha0()
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| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
3 # SPI driver configuration
5 menuconfig SPI config
6 bool "SPI support"
10 protocol. Chips that support SPI can have data transfer rates
12 controller and a chipselect. Most SPI slaves don't support
13 dynamic device discovery; some are even write-only or read-only.
15 SPI is widely used by microcontrollers to talk with sensors,
17 chips, analog to digital (and d-to-a) converters, and more.
18 MMC and SD cards can be accessed using SPI protocol; and for
[all …]
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| D | spi-slave-time.c | 2 * SPI slave handler reporting uptime at reception of previous SPI message
4 * This SPI slave handler sends the time of reception of the last SPI message
5 * as two 32-bit unsigned integers in binary format and in network byte order,
9 * Copyright (C) 2016-2017 Glider bvba
15 * Usage (assuming /dev/spidev2.0 corresponds to the SPI master on the remote
18 * # spidev_test -D /dev/spidev2.0 -p dummy-8B
19 * spi mode: 0x0
30 #include <linux/spi/spi.h>
34 struct spi_device *spi; member
48 ret = priv->msg.status; in spi_slave_time_complete()
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| D | spi-slave-system-control.c | 2 * SPI slave handler controlling system state
4 * This SPI slave handler allows remote control of system reboot, power off,
7 * Copyright (C) 2016-2017 Glider bvba
13 * Usage (assuming /dev/spidev2.0 corresponds to the SPI master on the remote
20 * # spidev_test -D /dev/spidev2.0 -p $suspend # or $reboot, $poweroff, $halt
27 #include <linux/spi/spi.h>
30 * The numbers are chosen to display something human-readable on two 7-segment
39 struct spi_device *spi; member
55 if (priv->msg.status) in spi_slave_system_control_complete()
58 cmd = be16_to_cpu(priv->cmd); in spi_slave_system_control_complete()
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| /kernel/linux/linux-5.10/drivers/base/regmap/ |
| D | regmap-spi-avmm.c | 1 // SPDX-License-Identifier: GPL-2.0
3 // Register map access API - SPI AVMM support
5 // Copyright (C) 2018-2020 Intel Corporation. All rights reserved.
9 #include <linux/spi/spi.h>
12 * This driver implements the regmap operations for a generic SPI
13 * master to access the registers of the spi slave chip which has an
16 * The "SPI slave to Avalon Master Bridge" (spi-avmm) IP should be integrated
17 * in the spi slave chip. The IP acts as a bridge to convert encoded streams of
19 * order to issue register access requests to the slave chip, the host should
27 * Chapter "SPI Slave/JTAG to Avalon Master Bridge Cores" is a general
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| /kernel/linux/linux-6.6/drivers/base/regmap/ |
| D | regmap-spi-avmm.c | 1 // SPDX-License-Identifier: GPL-2.0
3 // Register map access API - SPI AVMM support
5 // Copyright (C) 2018-2020 Intel Corporation. All rights reserved.
9 #include <linux/spi/spi.h>
13 * This driver implements the regmap operations for a generic SPI
14 * master to access the registers of the spi slave chip which has an
17 * The "SPI slave to Avalon Master Bridge" (spi-avmm) IP should be integrated
18 * in the spi slave chip. The IP acts as a bridge to convert encoded streams of
20 * order to issue register access requests to the slave chip, the host should
28 * Chapter "SPI Slave/JTAG to Avalon Master Bridge Cores" is a general
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/fpga/ |
| D | xilinx-slave-serial.txt | 1 Xilinx Slave Serial SPI FPGA Manager
3 Xilinx Spartan-6 and 7 Series FPGAs support a method of loading the
4 bitstream over what is referred to as "slave serial" interface.
5 The slave serial link is not technically SPI, and might require extra
6 circuits in order to play nicely with other SPI slaves on the same bus.
9 - https://www.xilinx.com/support/documentation/user_guides/ug380.pdf
10 - https://www.xilinx.com/support/documentation/user_guides/ug470_7Series_Config.pdf
11 - https://www.xilinx.com/support/documentation/application_notes/xapp583-fpga-configuration.pdf
14 - compatible: should contain "xlnx,fpga-slave-serial"
15 - reg: spi chip select of the FPGA
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| D | lattice-machxo2-spi.txt | 1 Lattice MachXO2 Slave SPI FPGA Manager
4 'slave SPI' interface.
9 - compatible: should contain "lattice,machxo2-slave-spi"
10 - reg: spi chip select of the FPGA
14 fpga-region0 {
15 compatible = "fpga-region";
16 fpga-mgr = <&fpga_mgr_spi>;
17 #address-cells = <0x1>;
18 #size-cells = <0x1>;
21 spi1: spi@2000 {
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