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12

/kernel/linux/linux-5.10/drivers/pinctrl/qcom/
DMakefile1 # SPDX-License-Identifier: GPL-2.0
3 obj-$(CONFIG_PINCTRL_MSM) += pinctrl-msm.o
4 obj-$(CONFIG_PINCTRL_APQ8064) += pinctrl-apq8064.o
5 obj-$(CONFIG_PINCTRL_APQ8084) += pinctrl-apq8084.o
6 obj-$(CONFIG_PINCTRL_IPQ4019) += pinctrl-ipq4019.o
7 obj-$(CONFIG_PINCTRL_IPQ8064) += pinctrl-ipq8064.o
8 obj-$(CONFIG_PINCTRL_IPQ8074) += pinctrl-ipq8074.o
9 obj-$(CONFIG_PINCTRL_IPQ6018) += pinctrl-ipq6018.o
10 obj-$(CONFIG_PINCTRL_MSM8226) += pinctrl-msm8226.o
11 obj-$(CONFIG_PINCTRL_MSM8660) += pinctrl-msm8660.o
[all …]
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
162 This is the GPIO driver for the TLMM block found on the
176 Qualcomm GPIO and MPP blocks found in the Qualcomm PMIC's chips,
181 tristate "Qualcomm SSBI PMIC pin controller driver"
190 Qualcomm GPIO and MPP blocks found in the Qualcomm PMIC's chips,
191 which are using SSBI for communication with SoC. Example PMIC's
Dpinctrl-ipq8064.c1 // SPDX-License-Identifier: GPL-2.0-only
11 #include "pinctrl-msm.h"
89 #define DECLARE_IPQ_GPIO_PINS(pin) static const unsigned int gpio##pin##_pins[] = { pin }
173 .name = "gpio" #id, \
174 .pins = gpio##id##_pins, \
175 .npins = ARRAY_SIZE(gpio##id##_pins), \
222 .mux_bit = -1, \
225 .oe_bit = -1, \
226 .in_bit = -1, \
227 .out_bit = -1, \
[all …]
Dpinctrl-ssbi-gpio.c1 // SPDX-License-Identifier: GPL-2.0-only
12 #include <linux/pinctrl/pinconf-generic.h>
15 #include <linux/gpio/driver.h>
20 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
23 #include "../pinctrl-utils.h"
42 /* GPIO registers */
57 * struct pm8xxx_pin_data - dynamic configuration for a pin
62 * @open_drain: output buffer configured as open-drain (vs push-pull)
67 * @output_strength: selector of output-strength
97 {"qcom,drive-strength", PM8XXX_QCOM_DRIVE_STRENGH, 0},
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/pinctrl/
Dqcom,pmic-gpio.txt1 Qualcomm PMIC GPIO block
3 This binding describes the GPIO block(s) found in the 8xxx series of
6 - compatible:
10 "qcom,pm8005-gpio"
11 "qcom,pm8018-gpio"
12 "qcom,pm8038-gpio"
13 "qcom,pm8058-gpio"
14 "qcom,pm8916-gpio"
15 "qcom,pm8917-gpio"
16 "qcom,pm8921-gpio"
[all …]
Dqcom,pmic-mpp.txt1 Qualcomm PMIC Multi-Purpose Pin (MPP) block
6 - compatible:
10 "qcom,pm8018-mpp",
11 "qcom,pm8038-mpp",
12 "qcom,pm8058-mpp",
13 "qcom,pm8821-mpp",
14 "qcom,pm8841-mpp",
15 "qcom,pm8916-mpp",
16 "qcom,pm8917-mpp",
17 "qcom,pm8921-mpp",
[all …]
Dqcom,ipq8064-pinctrl.txt4 - compatible: "qcom,ipq8064-pinctrl"
5 - reg: Should be the base address and length of the TLMM block.
6 - interrupts: Should be the parent IRQ of the TLMM block.
7 - interrupt-controller: Marks the device node as an interrupt controller.
8 - #interrupt-cells: Should be two.
9 - gpio-controller: Marks the device node as a GPIO controller.
10 - #gpio-cells : Should be two.
11 The first cell is the gpio pin number and the
13 - gpio-ranges: see ../gpio/gpio.txt
17 - gpio-reserved-ranges: see ../gpio/gpio.txt
[all …]
/kernel/linux/linux-6.6/drivers/pinctrl/qcom/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
31 Qualcomm GPIO and MPP blocks found in the Qualcomm PMIC's chips,
36 tristate "Qualcomm SSBI PMIC pin controller driver"
46 Qualcomm GPIO and MPP blocks found in the Qualcomm PMIC's chips,
47 which are using SSBI for communication with SoC. Example PMIC's
DMakefile1 # SPDX-License-Identifier: GPL-2.0
3 obj-$(CONFIG_PINCTRL_MSM) += pinctrl-msm.o
4 obj-$(CONFIG_PINCTRL_APQ8064) += pinctrl-apq8064.o
5 obj-$(CONFIG_PINCTRL_APQ8084) += pinctrl-apq8084.o
6 obj-$(CONFIG_PINCTRL_IPQ4019) += pinctrl-ipq4019.o
7 obj-$(CONFIG_PINCTRL_IPQ5018) += pinctrl-ipq5018.o
8 obj-$(CONFIG_PINCTRL_IPQ8064) += pinctrl-ipq8064.o
9 obj-$(CONFIG_PINCTRL_IPQ5332) += pinctrl-ipq5332.o
10 obj-$(CONFIG_PINCTRL_IPQ8074) += pinctrl-ipq8074.o
11 obj-$(CONFIG_PINCTRL_IPQ6018) += pinctrl-ipq6018.o
[all …]
Dpinctrl-ipq8064.c1 // SPDX-License-Identifier: GPL-2.0-only
10 #include "pinctrl-msm.h"
88 #define DECLARE_IPQ_GPIO_PINS(pin) static const unsigned int gpio##pin##_pins[] = { pin }
165 .grp = PINCTRL_PINGROUP("gpio" #id, \
166 gpio##id##_pins, \
167 ARRAY_SIZE(gpio##id##_pins)), \
214 .mux_bit = -1, \
217 .oe_bit = -1, \
218 .in_bit = -1, \
219 .out_bit = -1, \
[all …]
Dpinctrl-ssbi-gpio.c1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <linux/gpio/driver.h>
17 #include <linux/pinctrl/pinconf-generic.h>
22 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
25 #include "../pinctrl-utils.h"
44 /* GPIO registers */
59 * struct pm8xxx_pin_data - dynamic configuration for a pin
64 * @open_drain: output buffer configured as open-drain (vs push-pull)
69 * @output_strength: selector of output-strength
99 {"qcom,drive-strength", PM8XXX_QCOM_DRIVE_STRENGH, 0},
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/qcom/
Dqcom-mdm9615.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
9 /dts-v1/;
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/clock/qcom,gcc-mdm9615.h>
13 #include <dt-bindings/clock/qcom,lcc-msm8960.h>
14 #include <dt-bindings/reset/qcom,gcc-mdm9615.h>
15 #include <dt-bindings/mfd/qcom-rpm.h>
16 #include <dt-bindings/soc/qcom,gsbi.h>
19 #address-cells = <1>;
20 #size-cells = <1>;
[all …]
Dqcom-msm8660.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/interrupt-controller/irq.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/clock/qcom,gcc-msm8660.h>
7 #include <dt-bindings/soc/qcom,gsbi.h>
10 #address-cells = <1>;
11 #size-cells = <1>;
14 interrupt-parent = <&intc>;
17 #address-cells = <1>;
[all …]
Dqcom-apq8064.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/clock/qcom,gcc-msm8960.h>
5 #include <dt-bindings/clock/qcom,lcc-msm8960.h>
6 #include <dt-bindings/reset/qcom,gcc-msm8960.h>
7 #include <dt-bindings/clock/qcom,mmcc-msm8960.h>
8 #include <dt-bindings/clock/qcom,rpmcc.h>
9 #include <dt-bindings/soc/qcom,gsbi.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
[all …]
Dqcom-msm8960.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/clock/qcom,gcc-msm8960.h>
6 #include <dt-bindings/reset/qcom,gcc-msm8960.h>
7 #include <dt-bindings/clock/qcom,lcc-msm8960.h>
8 #include <dt-bindings/mfd/qcom-rpm.h>
9 #include <dt-bindings/soc/qcom,gsbi.h>
12 #address-cells = <1>;
13 #size-cells = <1>;
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dqcom-mdm9615.dtsi7 * This file is dual-licensed: you can use it either under the terms
46 /dts-v1/;
48 #include <dt-bindings/interrupt-controller/arm-gic.h>
49 #include <dt-bindings/clock/qcom,gcc-mdm9615.h>
50 #include <dt-bindings/reset/qcom,gcc-mdm9615.h>
51 #include <dt-bindings/mfd/qcom-rpm.h>
52 #include <dt-bindings/soc/qcom,gsbi.h>
55 #address-cells = <1>;
56 #size-cells = <1>;
59 interrupt-parent = <&intc>;
[all …]
Dqcom-msm8660.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/interrupt-controller/irq.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/clock/qcom,gcc-msm8660.h>
7 #include <dt-bindings/soc/qcom,gsbi.h>
10 #address-cells = <1>;
11 #size-cells = <1>;
14 interrupt-parent = <&intc>;
17 #address-cells = <1>;
[all …]
Dqcom-apq8064.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/clock/qcom,gcc-msm8960.h>
5 #include <dt-bindings/reset/qcom,gcc-msm8960.h>
6 #include <dt-bindings/clock/qcom,mmcc-msm8960.h>
7 #include <dt-bindings/clock/qcom,rpmcc.h>
8 #include <dt-bindings/soc/qcom,gsbi.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #address-cells = <1>;
[all …]
Dqcom-msm8960.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/clock/qcom,gcc-msm8960.h>
6 #include <dt-bindings/mfd/qcom-rpm.h>
7 #include <dt-bindings/soc/qcom,gsbi.h>
10 #address-cells = <1>;
11 #size-cells = <1>;
14 interrupt-parent = <&intc>;
17 #address-cells = <1>;
[all …]
Dqcom-apq8064-cm-qs600.dts1 // SPDX-License-Identifier: GPL-2.0
2 #include "qcom-apq8064-v2.0.dtsi"
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
7 model = "CompuLab CM-QS600";
8 compatible = "qcom,apq8064-cm-qs600", "qcom,apq8064";
15 stdout-path = "serial0:115200n8";
19 #address-cells = <1>;
20 #size-cells = <1>;
22 compatible = "simple-bus";
[all …]
Dqcom-apq8060-dragonboard.dts23 #include <dt-bindings/input/input.h>
24 #include <dt-bindings/gpio/gpio.h>
25 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
26 #include <dt-bindings/pinctrl/qcom,pmic-mpp.h>
27 #include "qcom-msm8660.dtsi"
31 compatible = "qcom,apq8060-dragonboard", "qcom,msm8660";
38 stdout-path = "serial0:115200n8";
42 compatible = "simple-bus";
45 vph: regulator-fixed {
46 compatible = "regulator-fixed";
[all …]
Dqcom-apq8064-ifc6410.dts1 // SPDX-License-Identifier: GPL-2.0
2 #include "qcom-apq8064-v2.0.dtsi"
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
8 compatible = "qcom,apq8064-ifc6410", "qcom,apq8064";
21 stdout-path = "serial0:115200n8";
25 compatible = "simple-bus";
28 pinctrl-names = "default";
29 pinctrl-0 = <&wlan_default_gpios>;
30 compatible = "mmc-pwrseq-simple";
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/pinctrl/
Dqcom,ipq8064-pinctrl.txt4 - compatible: "qcom,ipq8064-pinctrl"
5 - reg: Should be the base address and length of the TLMM block.
6 - interrupts: Should be the parent IRQ of the TLMM block.
7 - interrupt-controller: Marks the device node as an interrupt controller.
8 - #interrupt-cells: Should be two.
9 - gpio-controller: Marks the device node as a GPIO controller.
10 - #gpio-cells : Should be two.
11 The first cell is the gpio pin number and the
13 - gpio-ranges: see ../gpio/gpio.txt
17 - gpio-reserved-ranges: see ../gpio/gpio.txt
[all …]
Dqcom,pmic-gpio.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,pmic-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm PMIC GPIO block
10 - Bjorn Andersson <bjorn.andersson@linaro.org>
13 This binding describes the GPIO block(s) found in the 8xxx series of
19 - enum:
20 - qcom,pm2250-gpio
21 - qcom,pm660-gpio
[all …]
Dqcom,pmic-mpp.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,pmic-mpp.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm PMIC Multi-Purpose Pin (MPP) block
10 - Bjorn Andersson <bjorn.andersson@linaro.org>
19 - items:
20 - enum:
21 - qcom,pm8019-mpp
22 - qcom,pm8226-mpp
[all …]

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