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/kernel/linux/linux-6.6/drivers/hid/
Dhid-saitek.c1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * Fixes the HID report descriptor by removing a non-existent axis and
7 * clearing the constant bit on the input reports for buttons and d-pad.
8 * (This module is based on "hid-ortek".)
12 * Fixes the mode button which cycles through three constantly pressed
25 #include "hid-ids.h"
33 int mode; member
39 unsigned long quirks = id->driver_data; in saitek_probe()
40 struct saitek_sc *ssc; in saitek_probe() local
43 ssc = devm_kzalloc(&hdev->dev, sizeof(*ssc), GFP_KERNEL); in saitek_probe()
[all …]
/kernel/linux/linux-5.10/drivers/hid/
Dhid-saitek.c1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * Fixes the HID report descriptor by removing a non-existent axis and
7 * clearing the constant bit on the input reports for buttons and d-pad.
8 * (This module is based on "hid-ortek".)
12 * Fixes the mode button which cycles through three constantly pressed
25 #include "hid-ids.h"
33 int mode; member
39 unsigned long quirks = id->driver_data; in saitek_probe()
40 struct saitek_sc *ssc; in saitek_probe() local
43 ssc = devm_kzalloc(&hdev->dev, sizeof(*ssc), GFP_KERNEL); in saitek_probe()
[all …]
/kernel/linux/linux-5.10/include/linux/
Datmel-ssc.h1 /* SPDX-License-Identifier: GPL-2.0 */
28 void ssc_free(struct ssc_device *ssc);
30 /* SSC register offsets */
32 /* SSC Control Register */
45 /* SSC Clock Mode Register */
50 /* SSC Receive Clock Mode Register */
69 /* SSC Receive Frame Mode Register */
92 /* SSC Transmit Clock Mode Register */
109 /* SSC Transmit Frame Mode Register */
134 /* SSC Receive Hold Register */
[all …]
/kernel/linux/linux-6.6/include/linux/
Datmel-ssc.h1 /* SPDX-License-Identifier: GPL-2.0 */
28 void ssc_free(struct ssc_device *ssc);
30 /* SSC register offsets */
32 /* SSC Control Register */
45 /* SSC Clock Mode Register */
50 /* SSC Receive Clock Mode Register */
69 /* SSC Receive Frame Mode Register */
92 /* SSC Transmit Clock Mode Register */
109 /* SSC Transmit Frame Mode Register */
134 /* SSC Receive Hold Register */
[all …]
/kernel/linux/linux-6.6/sound/soc/atmel/
Datmel_ssc_dai.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * atmel_ssc_dai.c -- ALSA SoC ATMEL SSC Audio Layer Platform driver
11 * Based on at91-ssc.c by
25 #include <linux/atmel-ssc.h>
32 #include "atmel-pcm.h"
39 * SSC PDC registers required by the PCM DMA engine.
56 * SSC & PDC status bits for transmit and receive.
136 * SSC interrupt handler. Passes PDC interrupts to the DMA
147 ssc_sr = (unsigned long)ssc_readl(ssc_p->ssc->regs, SR) in atmel_ssc_interrupt()
148 & (unsigned long)ssc_readl(ssc_p->ssc->regs, IMR); in atmel_ssc_interrupt()
[all …]
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 tristate "SoC Audio for the Atmel System-on-Chip"
7 the ATMEL SSC interface. You will also need
25 tristate "SoC PCM DAI support for AT91 SSC controller using PDC"
30 Say Y or M if you want to add support for Atmel SSC interface
31 in PDC mode configured using audio-graph-card in device-tree.
34 tristate "SoC PCM DAI support for AT91 SSC controller using DMA"
39 Say Y or M if you want to add support for Atmel SSC interface
40 in DMA mode configured using audio-graph-card in device-tree.
43 tristate "SoC Audio support for WM8731-based At91sam9g20 evaluation board"
[all …]
/kernel/linux/linux-5.10/sound/soc/atmel/
Datmel_ssc_dai.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * atmel_ssc_dai.c -- ALSA SoC ATMEL SSC Audio Layer Platform driver
11 * Based on at91-ssc.c by
25 #include <linux/atmel-ssc.h>
32 #include "atmel-pcm.h"
39 * SSC PDC registers required by the PCM DMA engine.
56 * SSC & PDC status bits for transmit and receive.
136 * SSC interrupt handler. Passes PDC interrupts to the DMA
147 ssc_sr = (unsigned long)ssc_readl(ssc_p->ssc->regs, SR) in atmel_ssc_interrupt()
148 & (unsigned long)ssc_readl(ssc_p->ssc->regs, IMR); in atmel_ssc_interrupt()
[all …]
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 tristate "SoC Audio for the Atmel System-on-Chip"
7 the ATMEL SSC interface. You will also need
25 tristate "SoC PCM DAI support for AT91 SSC controller using PDC"
30 Say Y or M if you want to add support for Atmel SSC interface
31 in PDC mode configured using audio-graph-card in device-tree.
34 tristate "SoC PCM DAI support for AT91 SSC controller using DMA"
39 Say Y or M if you want to add support for Atmel SSC interface
40 in DMA mode configured using audio-graph-card in device-tree.
43 tristate "SoC Audio support for WM8731-based At91sam9g20 evaluation board"
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/misc/
Datmel-ssc.txt1 * Atmel SSC driver.
4 - compatible: "atmel,at91rm9200-ssc" or "atmel,at91sam9g45-ssc"
5 - atmel,at91rm9200-ssc: support pdc transfer
6 - atmel,at91sam9g45-ssc: support dma transfer
7 - reg: Should contain SSC registers location and length
8 - interrupts: Should contain SSC interrupt
9 - clock-names: tuple listing input clock names.
11 - clocks: phandles to input clocks.
14 Required properties for devices compatible with "atmel,at91sam9g45-ssc":
15 - dmas: DMA specifier, consisting of a phandle to DMA controller node,
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/misc/
Datmel-ssc.txt1 * Atmel SSC driver.
4 - compatible: "atmel,at91rm9200-ssc" or "atmel,at91sam9g45-ssc"
5 - atmel,at91rm9200-ssc: support pdc transfer
6 - atmel,at91sam9g45-ssc: support dma transfer
7 - reg: Should contain SSC registers location and length
8 - interrupts: Should contain SSC interrupt
9 - clock-names: tuple listing input clock names.
11 - clocks: phandles to input clocks.
14 Required properties for devices compatible with "atmel,at91sam9g45-ssc":
15 - dmas: DMA specifier, consisting of a phandle to DMA controller node,
[all …]
/kernel/linux/linux-5.10/drivers/scsi/isci/
Dprobe_roms.h7 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
20 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
26 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
103 * - A value of 1 indicates generation 1 (i.e. 1.5 Gb/s).
104 * - A value of 2 indicates generation 2 (i.e. 3.0 Gb/s).
105 * - A value of 3 indicates generation 3 (i.e. 6.0 Gb/s).
197 /* Allowed PORT configuration modes APC Automatic PORT configuration mode is
200 * MPC Manual PORT configuration mode is defined by the OEM configuration
228 * Spread Spectrum Clocking (SSC) settings for SATA and SAS.
229 * NOTE: Default SSC Modulation Frequency is 31.5KHz.
[all …]
/kernel/linux/linux-6.6/drivers/scsi/isci/
Dprobe_roms.h7 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
20 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
26 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
103 * - A value of 1 indicates generation 1 (i.e. 1.5 Gb/s).
104 * - A value of 2 indicates generation 2 (i.e. 3.0 Gb/s).
105 * - A value of 3 indicates generation 3 (i.e. 6.0 Gb/s).
197 /* Allowed PORT configuration modes APC Automatic PORT configuration mode is
200 * MPC Manual PORT configuration mode is defined by the OEM configuration
228 * Spread Spectrum Clocking (SSC) settings for SATA and SAS.
229 * NOTE: Default SSC Modulation Frequency is 31.5KHz.
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/i2c/
Di2c-st.txt1 ST SSC binding, for I2C mode operation
4 - compatible : Must be "st,comms-ssc-i2c" or "st,comms-ssc4-i2c"
5 - reg : Offset and length of the register set for the device
6 - interrupts : the interrupt specifier
7 - clock-names: Must contain "ssc".
8 - clocks: Must contain an entry for each name in clock-names. See the common
10 - A pinctrl state named "default" must be defined to set pins in mode of
14 - clock-frequency : Desired I2C bus clock frequency in Hz. If not specified,
17 - st,i2c-min-scl-pulse-width-us : The minimum valid SCL pulse width that is
19 - st,i2c-min-sda-pulse-width-us : The minimum valid SDA pulse width that is
[all …]
/kernel/linux/linux-5.10/drivers/spi/
Dspi-st-ssc4.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2008-2014 STMicroelectronics Limited
9 * SPI master mode controller driver, used in STMicroelectronics devices.
26 /* SSC registers */
34 /* SSC Control */
49 /* SSC Interrupt Enable */
55 /* SSC SPI Controller */
60 /* SSC SPI current transaction */
75 if (spi_st->words_remaining > FIFO_SIZE) in ssc_write_tx_fifo()
78 count = spi_st->words_remaining; in ssc_write_tx_fifo()
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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/clock/ti/
Ddpll.txt3 Binding status: Unstable - ABI compatibility may be broken in the future
6 register-mapped DPLL with usually two selectable input clocks
11 sub-types, which effectively result in slightly different setup
14 [1] Documentation/devicetree/bindings/clock/clock-bindings.txt
17 - compatible : shall be one of:
18 "ti,omap3-dpll-clock",
19 "ti,omap3-dpll-core-clock",
20 "ti,omap3-dpll-per-clock",
21 "ti,omap3-dpll-per-j-type-clock",
22 "ti,omap4-dpll-clock",
[all …]
/kernel/linux/linux-6.6/drivers/spi/
Dspi-st-ssc4.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2008-2014 STMicroelectronics Limited
9 * SPI master mode controller driver, used in STMicroelectronics devices.
25 /* SSC registers */
33 /* SSC Control */
48 /* SSC Interrupt Enable */
54 /* SSC SPI Controller */
59 /* SSC SPI current transaction */
74 if (spi_st->words_remaining > FIFO_SIZE) in ssc_write_tx_fifo()
77 count = spi_st->words_remaining; in ssc_write_tx_fifo()
[all …]
/kernel/linux/linux-5.10/drivers/i2c/busses/
Di2c-st.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * I2C master mode controller driver, used in STMicroelectronics devices.
23 /* SSC registers */
47 /* SSC Control */
62 /* SSC Interrupt Enable */
76 /* SSC Status */
93 /* SSC I2C Control */
103 /* SSC Tx FIFO Status */
106 /* SSC Rx FIFO Status */
109 /* SSC Clear bit operation */
[all …]
/kernel/linux/linux-6.6/drivers/i2c/busses/
Di2c-st.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * I2C master mode controller driver, used in STMicroelectronics devices.
23 /* SSC registers */
47 /* SSC Control */
62 /* SSC Interrupt Enable */
76 /* SSC Status */
93 /* SSC I2C Control */
103 /* SSC Tx FIFO Status */
106 /* SSC Rx FIFO Status */
109 /* SSC Clear bit operation */
[all …]
/kernel/linux/linux-5.10/drivers/phy/xilinx/
Dphy-zynqmp.c1 // SPDX-License-Identifier: GPL-2.0
3 * phy-zynqmp.c - PHY driver for Xilinx ZynqMP GT.
5 * Copyright (C) 2018-2020 Xilinx Inc.
26 #include <dt-bindings/phy/phy.h>
32 /* TX De-emphasis parameters */
57 /* PLL Test Mode register parameters */
61 /* PLL SSC step size offsets */
70 /* SSC step size parameters */
125 /* Test Mode common reset control parameters */
171 * struct xpsgtr_ssc - structure to hold SSC settings for a lane
[all …]
/kernel/linux/linux-6.6/include/linux/clk/
Dti.h1 /* SPDX-License-Identifier: GPL-2.0-only */
10 #include <linux/clk-provider.h>
14 * struct clk_omap_reg - OMAP register declaration
26 * struct dpll_data - DPLL registers and integration data
32 * @control_reg: register containing the DPLL mode bitfield
33 * @enable_mask: mask of the DPLL mode bitfield in @control_reg
40 * @max_multiplier: maximum valid non-bypass multiplier value (actual)
42 * @min_divider: minimum valid non-bypass divider value (actual)
43 * @max_divider: maximum valid non-bypass divider value (actual)
46 * @autoidle_reg: register containing the DPLL autoidle mode bitfield
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/clock/
Dti,cdce925.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Alexander Stein <alexander.stein@ew.tq-group.com>
13 Flexible Low Power LVCMOS Clock Generator with SSC Support for EMI Reduction
15 - CDCE(L)913: 1-PLL, 3 Outputs https://www.ti.com/product/cdce913
16 - CDCE(L)925: 2-PLL, 5 Outputs https://www.ti.com/product/cdce925
17 - CDCE(L)937: 3-PLL, 7 Outputs https://www.ti.com/product/cdce937
18 - CDCE(L)949: 4-PLL, 9 Outputs https://www.ti.com/product/cdce949
23 - ti,cdce913
[all …]
/kernel/linux/linux-6.6/drivers/phy/xilinx/
Dphy-zynqmp.c1 // SPDX-License-Identifier: GPL-2.0
3 * phy-zynqmp.c - PHY driver for Xilinx ZynqMP GT.
5 * Copyright (C) 2018-2020 Xilinx Inc.
26 #include <dt-bindings/phy/phy.h>
32 /* TX De-emphasis parameters */
57 /* PLL Test Mode register parameters */
61 /* PLL SSC step size offsets */
70 /* SSC step size parameters */
126 /* Test Mode common reset control parameters */
190 * struct xpsgtr_ssc - structure to hold SSC settings for a lane
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/phy/
Dphy-rockchip-naneng-combphy.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/phy-rockchip-naneng-combphy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Heiko Stuebner <heiko@sntech.de>
15 - rockchip,rk3568-naneng-combphy
16 - rockchip,rk3588-naneng-combphy
23 - description: reference clock
24 - description: apb clock
25 - description: pipe clock
[all …]
/kernel/linux/linux-5.10/drivers/scsi/mvsas/
Dmv_94xx.h1 /* SPDX-License-Identifier: GPL-2.0-only */
7 * Copyright 2009-2011 Marvell. <yuxiangl@marvell.com>
66 MVS_NON_NCQ_ERR_0 = 0x168, /* SRS Non-specific NCQ Error */
72 /* ports 1-3 follow after this */
75 /* ports 5-7 follow after this */
79 /* ports 1-3 follow after this */
81 /* ports 5-7 follow after this */
84 /* ports 1-3 follow after this */
87 /* ports 5-7 follow after this */
91 /* phys 1-3 follow after this */
[all …]
/kernel/linux/linux-6.6/drivers/scsi/mvsas/
Dmv_94xx.h1 /* SPDX-License-Identifier: GPL-2.0-only */
7 * Copyright 2009-2011 Marvell. <yuxiangl@marvell.com>
66 MVS_NON_NCQ_ERR_0 = 0x168, /* SRS Non-specific NCQ Error */
72 /* ports 1-3 follow after this */
75 /* ports 5-7 follow after this */
79 /* ports 1-3 follow after this */
81 /* ports 5-7 follow after this */
84 /* ports 1-3 follow after this */
87 /* ports 5-7 follow after this */
91 /* phys 1-3 follow after this */
[all …]

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