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/kernel/linux/linux-6.6/arch/x86/include/asm/fpu/
Dxstate.h52 /* All currently supported supervisor features */
57 * A supervisor state component may not always contain valuable information,
58 * and its size may be huge. Saving/restoring such supervisor state components
60 * be avoided. Such supervisor state components should only be saved/restored
61 * on demand. The on-demand supervisor features are set in this mask.
63 * Unlike the existing supported supervisor features, an independent supervisor
65 * supervisor state component cannot be saved/restored at each context switch.
67 * To support an independent supervisor feature, a developer should follow the
69 * - Do dynamically allocate a buffer for the supervisor state component.
72 * - Don't set the bit corresponding to the independent supervisor feature in
[all …]
/kernel/linux/linux-5.10/arch/x86/include/asm/fpu/
Dxstate.h37 /* All currently supported supervisor features */
41 * A supervisor state component may not always contain valuable information,
42 * and its size may be huge. Saving/restoring such supervisor state components
44 * be avoided. Such supervisor state components should only be saved/restored
45 * on demand. The on-demand dynamic supervisor features are set in this mask.
47 * Unlike the existing supported supervisor features, a dynamic supervisor
49 * supervisor state component cannot be saved/restored at each context switch.
51 * To support a dynamic supervisor feature, a developer should follow the
53 * - Do dynamically allocate a buffer for the supervisor state component.
56 * - Don't set the bit corresponding to the dynamic supervisor feature in
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/kernel/linux/linux-5.10/arch/m68k/ifpsp060/
Dos.S58 | or supervisor application space. The examples below use simple "move"
59 | instructions for supervisor mode applications and call _copyin()/_copyout()
76 | Writes to data memory while in supervisor mode.
79 | a0 - supervisor source address
82 | 0x4(%a6),bit5 - 1 = supervisor mode, 0 = user mode
89 btst #0x5,0x4(%a6) | check for supervisor state
107 | Reads from data/instruction memory while in supervisor mode.
111 | a1 - supervisor destination address
113 | 0x4(%a6),bit5 - 1 = supervisor mode, 0 = user mode
122 btst #0x5,0x4(%a6) | check for supervisor state
[all …]
/kernel/linux/linux-6.6/arch/m68k/ifpsp060/
Dos.S58 | or supervisor application space. The examples below use simple "move"
59 | instructions for supervisor mode applications and call _copyin()/_copyout()
76 | Writes to data memory while in supervisor mode.
79 | a0 - supervisor source address
82 | 0x4(%a6),bit5 - 1 = supervisor mode, 0 = user mode
89 btst #0x5,0x4(%a6) | check for supervisor state
107 | Reads from data/instruction memory while in supervisor mode.
111 | a1 - supervisor destination address
113 | 0x4(%a6),bit5 - 1 = supervisor mode, 0 = user mode
122 btst #0x5,0x4(%a6) | check for supervisor state
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/interrupt-controller/
Driscv,cpu-intc.txt10 The RISC-V supervisor ISA manual specifies three interrupt sources that are
14 controlled via Supervisor Binary Interface (SBI) calls and CSR reads. External
18 All RISC-V systems that conform to the supervisor ISA specification are
29 RISC-V supervisor ISA manual, with only the following three interrupts being
30 defined for supervisor mode:
31 - Source 1 is the supervisor software interrupt, which can be sent by an SBI
33 - Source 5 is the supervisor timer interrupt, which can be configured by
35 - Source 9 is the supervisor external interrupt, which chains to all other
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/interrupt-controller/
Driscv,cpu-intc.txt10 The RISC-V supervisor ISA manual specifies three interrupt sources that are
14 controlled via Supervisor Binary Interface (SBI) calls and CSR reads. External
18 All RISC-V systems that conform to the supervisor ISA specification are
29 RISC-V supervisor ISA manual, with only the following three interrupts being
30 defined for supervisor mode:
31 - Source 1 is the supervisor software interrupt, which can be sent by an SBI
33 - Source 5 is the supervisor timer interrupt, which can be configured by
35 - Source 9 is the supervisor external interrupt, which chains to all other
/kernel/linux/linux-5.10/arch/m68k/fpsp040/
Dskeleton.S377 btst #0x5,%sp@ | supervisor bit set in saved SR?
387 | mem_write --- write to user or supervisor address space
389 | Writes to memory while in supervisor mode. copyout accomplishes
393 | a0 - supervisor source address
397 | The supervisor source address is guaranteed to point into the supervisor
404 | If the EXC_SR shows that the exception was from supervisor space,
406 | there shouldn't be any supervisor mode floating point exceptions.
410 btstb #5,EXC_SR(%a6) |check for supervisor state
427 | mem_read --- read from user or supervisor address space
429 | Reads from memory while in supervisor mode. copyin accomplishes
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/kernel/linux/linux-6.6/arch/m68k/fpsp040/
Dskeleton.S377 btst #0x5,%sp@ | supervisor bit set in saved SR?
387 | mem_write --- write to user or supervisor address space
389 | Writes to memory while in supervisor mode. copyout accomplishes
393 | a0 - supervisor source address
397 | The supervisor source address is guaranteed to point into the supervisor
404 | If the EXC_SR shows that the exception was from supervisor space,
406 | there shouldn't be any supervisor mode floating point exceptions.
410 btstb #5,EXC_SR(%a6) |check for supervisor state
427 | mem_read --- read from user or supervisor address space
429 | Reads from memory while in supervisor mode. copyin accomplishes
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/riscv/
Dextensions.yaml126 The standard Smaia supervisor-level extension for the advanced
133 The standard Ssaia supervisor-level extension for the advanced
134 interrupt architecture for supervisor-mode-visible csr and
140 The standard Sscofpmf supervisor-level extension for count overflow
146 The standard Sstc supervisor-level extension for time compare as
152 The standard Svinval supervisor-level extension for fine-grained
158 The standard Svnapot supervisor-level extensions for napot
164 The standard Svpbmt supervisor-level extensions for page-based
/kernel/linux/linux-5.10/arch/x86/kernel/fpu/
Dxstate.c60 * XSAVE buffer, both supervisor and user xstates.
118 * returns ECX[0] set to (1) for a supervisor state, and cleared (0) in xfeature_is_supervisor()
217 * Unsupported supervisor xstates should not be found in in fpu__init_cpu_xstate()
221 WARN_ONCE(unsup_bits, "x86/fpu: Found unsupported supervisor xstates: 0x%llx\n", in fpu__init_cpu_xstate()
236 * MSR_IA32_XSS sets supervisor states managed by XSAVES. in fpu__init_cpu_xstate()
281 * If an xfeature is supervisor state, the offset in EBX is in setup_xstate_features()
402 * Setup offsets of a supervisor-state-only XSAVES buffer:
515 * Only XSAVES supports supervisor states and it uses compacted in xfeature_uncompacted_offset()
516 * format. Checking a supervisor state's uncompacted offset is in xfeature_uncompacted_offset()
540 * 1. saving of supervisor/system state
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/kernel/linux/linux-5.10/arch/powerpc/include/asm/book3s/32/
Dmmu-hash.h57 #define PP_RWXX 0 /* Supervisor read/write, User none */
58 #define PP_RWRX 1 /* Supervisor read/write, User read */
59 #define PP_RWRW 2 /* Supervisor read/write, User read/write */
60 #define PP_RXRX 3 /* Supervisor read, User read */
65 #define SR_KS 0x40000000 /* Supervisor key */
/kernel/linux/linux-6.6/arch/microblaze/include/asm/
Dmmu.h36 # define PP_RWXX 0 /* Supervisor read/write, User none */
37 # define PP_RWRX 1 /* Supervisor read/write, User read */
38 # define PP_RWRW 2 /* Supervisor read/write, User read/write */
39 # define PP_RXRX 3 /* Supervisor read, User read */
44 unsigned long ks:1; /* Supervisor 'key' (normally 0) */
/kernel/linux/linux-5.10/arch/microblaze/include/asm/
Dmmu.h39 # define PP_RWXX 0 /* Supervisor read/write, User none */
40 # define PP_RWRX 1 /* Supervisor read/write, User read */
41 # define PP_RWRW 2 /* Supervisor read/write, User read/write */
42 # define PP_RXRX 3 /* Supervisor read, User read */
47 unsigned long ks:1; /* Supervisor 'key' (normally 0) */
/kernel/linux/linux-6.6/Documentation/hwmon/
Dsl28cpld.rst21 supervisor. In the future there might be other flavours and additional
24 The fan supervisor has a 7 bit counter register and a counter period of 1
25 second. If the 7 bit counter overflows, the supervisor will automatically
/kernel/linux/linux-5.10/Documentation/hwmon/
Dsl28cpld.rst21 supervisor. In the future there might be other flavours and additional
24 The fan supervisor has a 7 bit counter register and a counter period of 1
25 second. If the 7 bit counter overflows, the supervisor will automatically
/kernel/linux/linux-5.10/arch/riscv/include/asm/
Dcsr.h13 #define SR_SIE _AC(0x00000002, UL) /* Supervisor Interrupt Enable */
15 #define SR_SPIE _AC(0x00000020, UL) /* Previous Supervisor IE */
17 #define SR_SPP _AC(0x00000100, UL) /* Previously Supervisor */
19 #define SR_SUM _AC(0x00040000, UL) /* Supervisor User Memory Access */
150 /* IE/IP (Supervisor/Machine Interrupt Enable/Pending) flags */
/kernel/linux/linux-6.6/arch/riscv/include/asm/
Dcsr.h13 #define SR_SIE _AC(0x00000002, UL) /* Supervisor Interrupt Enable */
15 #define SR_SPIE _AC(0x00000020, UL) /* Previous Supervisor IE */
17 #define SR_SPP _AC(0x00000100, UL) /* Previously Supervisor */
19 #define SR_SUM _AC(0x00040000, UL) /* Supervisor User Memory Access */
289 /* Supervisor-Level Window to Indirectly Accessed Registers (AIA) */
293 /* Supervisor-Level Interrupts (AIA) */
297 /* Supervisor-Level High-Half CSRs (AIA) */
380 /* Virtual Interrupts for Supervisor Level (AIA) */
452 /* IE/IP (Supervisor/Machine Interrupt Enable/Pending) flags */
/kernel/linux/linux-6.6/arch/powerpc/include/asm/book3s/32/
Dmmu-hash.h57 #define PP_RWXX 0 /* Supervisor read/write, User none */
58 #define PP_RWRX 1 /* Supervisor read/write, User read */
59 #define PP_RWRW 2 /* Supervisor read/write, User read/write */
60 #define PP_RXRX 3 /* Supervisor read, User read */
65 #define SR_KS 0x40000000 /* Supervisor key */
/kernel/linux/linux-5.10/arch/m68k/include/asm/
Dmcfdma.h89 #define MCFDMA_DMR_DSTT_SD 0x00001400L /* Destination is supervisor data */
90 #define MCFDMA_DMR_DSTT_SC 0x00001800L /* Destination is supervisor code */
101 #define MCFDMA_DMR_SRCT_SD 0x00000014L /* Source is supervisor data */
102 #define MCFDMA_DMR_SRCT_SC 0x00000018L /* Source is supervisor code */
Dm54xxacr.h36 #define ACR_SUPER 0x00002000 /* Supervisor mode only */
43 #define ACR_SP 0x00000008 /* Supervisor protect */
96 * cacheable and supervisor access only.
/kernel/linux/linux-6.6/arch/m68k/include/asm/
Dmcfdma.h89 #define MCFDMA_DMR_DSTT_SD 0x00001400L /* Destination is supervisor data */
90 #define MCFDMA_DMR_DSTT_SC 0x00001800L /* Destination is supervisor code */
101 #define MCFDMA_DMR_SRCT_SD 0x00000014L /* Source is supervisor data */
102 #define MCFDMA_DMR_SRCT_SC 0x00000018L /* Source is supervisor code */
Dm54xxacr.h36 #define ACR_SUPER 0x00002000 /* Supervisor mode only */
43 #define ACR_SP 0x00000008 /* Supervisor protect */
96 * cacheable and supervisor access only.
/kernel/linux/linux-5.10/arch/sparc/include/asm/
Dpcr.h20 #define PCR_STRACE 0x00000002 /* Trace supervisor events */
39 #define PCR_N4_STRACE 0x00000008 /* Trace supervisor events */
/kernel/linux/linux-6.6/arch/sparc/include/asm/
Dpcr.h20 #define PCR_STRACE 0x00000002 /* Trace supervisor events */
39 #define PCR_N4_STRACE 0x00000008 /* Trace supervisor events */
/kernel/linux/linux-6.6/Documentation/riscv/
Duabi.rst29 #. Standard supervisor-level extensions (starting with 'S') will be listed
30 after standard unprivileged extensions. If multiple supervisor-level

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