| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/soc/loongson/ |
| D | loongson,ls2k-pmc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/loongson/loongson,ls2k-pmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Loongson-2 Power Manager controller
10 - Yinbo Zhu <zhuyinbo@loongson.cn>
15 - items:
16 - const: loongson,ls2k0500-pmc
17 - const: syscon
18 - items:
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| /kernel/linux/linux-6.6/drivers/acpi/ |
| D | acpi_fpdt.c | 1 // SPDX-License-Identifier: GPL-2.0-only
4 * FPDT support for exporting boot and suspend/resume performance data
19 * performance data fields, for boot or suspend or resume phase.
31 u64 address; /* physical address of the S3PT/FBPT table */ member
83 return sprintf(buf, "%llu\n", record_##phase->name); \
90 FPDT_ATTR(suspend, suspend_start);
91 FPDT_ATTR(suspend, suspend_end);
101 return sprintf(buf, "%u\n", record_resume->resume_count); in resume_count_show()
127 .name = "suspend",
148 static bool fpdt_address_valid(u64 address) in fpdt_address_valid() argument
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| /kernel/linux/linux-6.6/arch/arm/boot/dts/microchip/ |
| D | at91-sama5d27_wlsom1.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * at91-sama5d27_wlsom1.dtsi - Device Tree file for SAMA5D27 WLSOM1
11 #include "sama5d2-pinfunc.h"
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/mfd/atmel-flexcom.h>
14 #include <dt-bindings/pinctrl/at91.h>
18 compatible = "microchip,sama5d27-wlsom1", "atmel,sama5d27", "atmel,sama5d2", "atmel,sama5";
26 clock-frequency = <32768>;
30 clock-frequency = <24000000>;
35 compatible = "mmc-pwrseq-wilc1000";
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| D | at91-sama7g5ek.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * at91-sama7g5ek.dts - Device Tree file for SAMA7G5-EK board
11 /dts-v1/;
12 #include "sama7g5-pinfunc.h"
14 #include <dt-bindings/mfd/atmel-flexcom.h>
15 #include <dt-bindings/input/input.h>
16 #include <dt-bindings/pinctrl/at91.h>
17 #include <dt-bindings/sound/microchip,pdmc.h>
20 model = "Microchip SAMA7G5-EK";
25 stdout-path = "serial0:115200n8";
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| /kernel/linux/linux-6.6/include/linux/mtd/ |
| D | pfow.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
11 /* Address of symbol "P" */
13 /* Address of symbol "F" */
15 /* Address of symbol "O" */
17 /* Address of symbol "W" */
22 /* Address in PFOW where prog buffer can be found */
26 /* Address command code register */
30 /* command address register lower address bits */
32 /* command address register upper address bits */
34 /* number of bytes to be proggrammed lower address bits */
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| /kernel/linux/linux-5.10/include/linux/mtd/ |
| D | pfow.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
11 /* Address of symbol "P" */
13 /* Address of symbol "F" */
15 /* Address of symbol "O" */
17 /* Address of symbol "W" */
22 /* Address in PFOW where prog buffer can be found */
26 /* Address command code register */
30 /* command address register lower address bits */
32 /* command address register upper address bits */
34 /* number of bytes to be proggrammed lower address bits */
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| /kernel/linux/linux-5.10/Documentation/arm/samsung-s3c24xx/ |
| D | suspend.rst | 2 S3C24XX Suspend Support
7 ------------
9 The S3C24XX supports a low-power suspend mode, where the SDRAM is kept
10 in Self-Refresh mode, and all but the essential peripheral blocks are
16 ------------
25 time require suspend/resume support.
29 --------
33 is to set the GSTATUS3 register to the physical address of the
42 ---------------
53 There is currently no support for over-riding the default method of
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| /kernel/linux/linux-6.6/arch/arm/boot/dts/samsung/ |
| D | s5pv210-aries.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
32 reserved-memory {
33 #address-cells = <1>;
34 #size-cells = <1>;
38 compatible = "shared-dma-pool";
39 no-map;
44 compatible = "shared-dma-pool";
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | s5pv210-aries.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
32 reserved-memory {
33 #address-cells = <1>;
34 #size-cells = <1>;
38 compatible = "shared-dma-pool";
39 no-map;
44 compatible = "shared-dma-pool";
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| /kernel/linux/linux-5.10/drivers/pinctrl/samsung/ |
| D | pinctrl-samsung.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * pin-controller/pin-mux/pin-config/gpio-driver for Samsung's SoC's.
25 * enum pincfg_type - possible pin configuration types supported.
46 * packed together into a 16-bits. The upper 8-bits represent the configuration
47 * type and the lower 8-bits hold the value of the configuration type.
57 * enum eint_type - possible external interrupt types.
77 /* maximum length of a pin in pin descriptor (example: "gpa0-0") */
108 * struct samsung_pin_bank_data: represent a controller pin-bank (init data).
110 * @pctl_offset: starting offset of the pin-bank registers.
111 * @pctl_res_idx: index of base address for pin-bank registers.
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| /kernel/linux/linux-6.6/drivers/pinctrl/samsung/ |
| D | pinctrl-samsung.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * pin-controller/pin-mux/pin-config/gpio-driver for Samsung's SoC's.
25 * enum pincfg_type - possible pin configuration types supported.
46 * packed together into a 16-bits. The upper 8-bits represent the configuration
47 * type and the lower 8-bits hold the value of the configuration type.
65 * enum eint_type - possible external interrupt types.
85 /* maximum length of a pin in pin descriptor (example: "gpa0-0") */
116 * struct samsung_pin_bank_data: represent a controller pin-bank (init data).
118 * @pctl_offset: starting offset of the pin-bank registers.
119 * @pctl_res_idx: index of base address for pin-bank registers.
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/usb/ |
| D | fsl,imx8mp-dwc3.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/usb/fsl,imx8mp-dwc3.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Li Jun <jun.li@nxp.com>
15 const: fsl,imx8mp-dwc3
19 - description: Address and length of the register set for HSIO Block Control
20 - description: Address and length of the register set for the wrapper of dwc3 core on the SOC.
22 "#address-cells":
25 "#size-cells":
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| /kernel/linux/linux-5.10/include/linux/mfd/ |
| D | rohm-generic.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
31 * struct rohm_dvs_config - dynamic voltage scaling register descriptions
33 * @level_map: bitmap representing supported run-levels for this
35 * @run_reg: register address for regulator config at 'run' state
38 * @idle_reg: register address for regulator config at 'idle' state
41 * @suspend_reg: register address for regulator config at 'suspend' state
42 * @suspend_mask: value mask for regulator voltages at 'suspend' state
43 * @suspend_on_mask: enable mask for regulator at 'suspend' state
44 * @lpsr_reg: register address for regulator config at 'lpsr' state
|
| /kernel/linux/linux-6.6/include/linux/mfd/ |
| D | rohm-generic.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
36 * struct rohm_dvs_config - dynamic voltage scaling register descriptions
38 * @level_map: bitmap representing supported run-levels for this
40 * @run_reg: register address for regulator config at 'run' state
43 * @idle_reg: register address for regulator config at 'idle' state
46 * @suspend_reg: register address for regulator config at 'suspend' state
47 * @suspend_mask: value mask for regulator voltages at 'suspend' state
48 * @suspend_on_mask: enable mask for regulator at 'suspend' state
49 * @lpsr_reg: register address for regulator config at 'lpsr' state
|
| /kernel/linux/linux-5.10/Documentation/arm/samsung/ |
| D | bootloader-interface.rst | 14 In the document "boot loader" means any of following: U-boot, proprietary
19 1. Non-Secure mode
21 Address: sysram_ns_base_addr
26 0x08 exynos_cpu_resume_ns, mcpm_entry_point System suspend
27 0x0c 0x00000bad (Magic cookie) System suspend
33 0x28 0x0 or last value during resume (Exynos542x) System suspend
39 Address: sysram_base_addr
51 Address: pmu_base_addr
56 0x0800 exynos_cpu_resume AFTR, suspend
57 0x0800 mcpm_entry_point (Exynos542x with MCPM) AFTR, suspend
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| /kernel/linux/linux-6.6/Documentation/arch/arm/samsung/ |
| D | bootloader-interface.rst | 14 In the document "boot loader" means any of following: U-boot, proprietary
19 1. Non-Secure mode
21 Address: sysram_ns_base_addr
26 0x08 exynos_cpu_resume_ns, mcpm_entry_point System suspend
27 0x0c 0x00000bad (Magic cookie) System suspend
33 0x28 0x0 or last value during resume (Exynos542x) System suspend
39 Address: sysram_base_addr
51 Address: pmu_base_addr
56 0x0800 exynos_cpu_resume AFTR, suspend
57 0x0800 mcpm_entry_point (Exynos542x with MCPM) AFTR, suspend
[all …]
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| /kernel/linux/linux-5.10/drivers/remoteproc/ |
| D | omap_remoteproc.c | 1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2011-2020 Texas Instruments Incorporated - http://www.ti.com/
8 * Ohad Ben-Cohen <ohad@wizery.com>
12 * Suman Anna <s-anna@ti.com>
13 * Hari Kanigeri <h-kanigeri2@ti.com>
26 #include <linux/dma-mapping.h>
30 #include <linux/omap-iommu.h>
31 #include <linux/omap-mailbox.h>
35 #include <clocksource/timer-ti-dm.h>
37 #include <linux/platform_data/dmtimer-omap.h>
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| /kernel/linux/linux-6.6/drivers/remoteproc/ |
| D | omap_remoteproc.c | 1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2011-2020 Texas Instruments Incorporated - http://www.ti.com/
8 * Ohad Ben-Cohen <ohad@wizery.com>
12 * Suman Anna <s-anna@ti.com>
13 * Hari Kanigeri <h-kanigeri2@ti.com>
27 #include <linux/dma-mapping.h>
31 #include <linux/omap-iommu.h>
32 #include <linux/omap-mailbox.h>
36 #include <clocksource/timer-ti-dm.h>
38 #include <linux/platform_data/dmtimer-omap.h>
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| /kernel/linux/linux-6.6/drivers/net/ethernet/i825xx/ |
| D | sun3_82586.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
8 * copyrights (c) 1994 by Michael Hipp (hippm@informatik.uni-tuebingen.de)
11 * crynwr-packet-driver by Russ Nelson
12 * Garret A. Wollman's i82586-driver for BSD
53 char *iscp; /* pointer to the iscp-block */
65 char *scb_base; /* base-address of all 16-bit offsets */
79 unsigned short crc_errs; /* CRC-Error counter */
89 #define RUC_NOP 0x0000 /* NOP-command */
91 #define RUC_RESUME 0x0020 /* resume RU after suspend */
92 #define RUC_SUSPEND 0x0030 /* suspend RU */
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| /kernel/linux/linux-5.10/drivers/net/ethernet/i825xx/ |
| D | sun3_82586.h | 7 * copyrights (c) 1994 by Michael Hipp (hippm@informatik.uni-tuebingen.de)
10 * crynwr-packet-driver by Russ Nelson
11 * Garret A. Wollman's i82586-driver for BSD
52 char *iscp; /* pointer to the iscp-block */
64 char *scb_base; /* base-address of all 16-bit offsets */
78 unsigned short crc_errs; /* CRC-Error counter */
88 #define RUC_NOP 0x0000 /* NOP-command */
90 #define RUC_RESUME 0x0020 /* resume RU after suspend */
91 #define RUC_SUSPEND 0x0030 /* suspend RU */
95 #define CUC_NOP 0x00 /* NOP-command */
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| /kernel/linux/linux-6.6/arch/arm/boot/dts/rockchip/ |
| D | rv1126-edgeble-neu2.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 compatible = "edgeble,neural-compute-module-2", "rockchip,rv1126";
14 vccio_flash: vccio-flash-regulator {
15 compatible = "regulator-fixed";
16 enable-active-high;
18 pinctrl-names = "default";
19 pinctrl-0 = <&flash_vol_sel>;
20 regulator-name = "vccio_flash";
21 regulator-always-on;
22 regulator-boot-on;
[all …]
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| /kernel/linux/linux-6.6/drivers/net/wireless/ath/ath12k/ |
| D | hif.h | 1 /* SPDX-License-Identifier: BSD-3-Clause-Clear */
3 * Copyright (c) 2019-2021 The Linux Foundation. All rights reserved.
4 * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
13 u32 (*read32)(struct ath12k_base *ab, u32 address);
14 void (*write32)(struct ath12k_base *ab, u32 address, u32 data);
21 int (*suspend)(struct ath12k_base *ab); member
38 return ab->hif.ops->map_service_to_pipe(ab, service_id, in ath12k_hif_map_service_to_pipe()
48 if (!ab->hif.ops->get_user_msi_vector) in ath12k_hif_get_user_msi_vector()
49 return -EOPNOTSUPP; in ath12k_hif_get_user_msi_vector()
51 return ab->hif.ops->get_user_msi_vector(ab, user_name, num_vectors, in ath12k_hif_get_user_msi_vector()
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| /kernel/linux/linux-6.6/arch/arm/mach-mvebu/ |
| D | pm.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Suspend/resume support. Currently supporting Armada XP only.
7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
17 #include <linux/suspend.h>
20 #include <asm/suspend.h>
61 /* Prepare to go to self-refresh */ in mvebu_pm_powerdown()
78 * base, which is why we hardcode the 0xd0000000 base address, the one
92 np = of_find_node_by_name(NULL, "internal-regs"); in mvebu_internal_reg_base()
96 * Ask the DT what is the internal register address on this in mvebu_internal_reg_base()
97 * platform. In the mvebu-mbus DT binding, 0xf0010000 in mvebu_internal_reg_base()
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| /kernel/linux/linux-5.10/arch/arm/mach-mvebu/ |
| D | pm.c | 2 * Suspend/resume support. Currently supporting Armada XP only.
6 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
20 #include <linux/suspend.h>
23 #include <asm/suspend.h>
64 /* Prepare to go to self-refresh */ in mvebu_pm_powerdown()
81 * base, which is why we hardcode the 0xd0000000 base address, the one
95 np = of_find_node_by_name(NULL, "internal-regs"); in mvebu_internal_reg_base()
99 * Ask the DT what is the internal register address on this in mvebu_internal_reg_base()
100 * platform. In the mvebu-mbus DT binding, 0xf0010000 in mvebu_internal_reg_base()
117 * value (BOOT_MAGIC_WORD), followed by the address of the in mvebu_pm_store_armadaxp_bootinfo()
[all …]
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| /kernel/linux/linux-6.6/drivers/net/ipa/ |
| D | gsi.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
3 /* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.
4 * Copyright (C) 2018-2023 Linaro Ltd.
35 void *virt; /* ring array base address */
55 * but taken from a fixed-size pool. The number of elements required for
67 void *base; /* base address of element pool */
72 dma_addr_t addr; /* DMA address if DMA pool (or 0) */
85 struct gsi_trans **map; /* TRE -> transaction map */
98 GSI_CHANNEL_STATE_FLOW_CONTROLLED = 0x5, /* IPA v4.2-v4.9 */
162 * gsi_setup() - Set up the GSI subsystem
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