| /kernel/linux/linux-5.10/drivers/mfd/ |
| D | syscon.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
11 #include <linux/clk.h>
20 #include <linux/platform_data/syscon.h>
23 #include <linux/mfd/syscon.h>
31 struct syscon { struct
43 static struct syscon *of_syscon_register(struct device_node *np, bool check_clk) in of_syscon_register() argument
45 struct clk *clk; in of_syscon_register() local
46 struct syscon *syscon; in of_syscon_register() local
54 syscon = kzalloc(sizeof(*syscon), GFP_KERNEL); in of_syscon_register()
55 if (!syscon) in of_syscon_register()
[all …]
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| /kernel/linux/linux-6.6/drivers/mfd/ |
| D | syscon.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
12 #include <linux/clk.h>
22 #include <linux/platform_data/syscon.h>
26 #include <linux/mfd/syscon.h>
34 struct syscon { struct
47 static struct syscon *of_syscon_register(struct device_node *np, bool check_res) in of_syscon_register() argument
49 struct clk *clk; in of_syscon_register() local
60 struct syscon *syscon __free(kfree) = kzalloc(sizeof(*syscon), GFP_KERNEL); in of_syscon_register()
61 if (!syscon) in of_syscon_register()
62 return ERR_PTR(-ENOMEM); in of_syscon_register()
[all …]
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | ste-u300.dts | 1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree for the ST-Ericsson U300 Machine and SoC
6 /dts-v1/;
9 model = "ST-Ericsson U300";
11 #address-cells = <1>;
12 #size-cells = <1>;
30 vana15-supply = <&ab3100_ldo_d_reg>;
31 syscon = <&syscon>;
34 syscon: syscon@c0011000 { label
35 compatible = "stericsson,u300-syscon", "syscon";
[all …]
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| /kernel/linux/linux-6.6/drivers/clk/nxp/ |
| D | clk-lpc18xx-creg.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Clk driver for NXP LPC18xx/43xx Configuration Registers (CREG)
8 #include <linux/clk-provider.h>
11 #include <linux/mfd/syscon.h>
50 ret = regmap_update_bits(creg->reg, LPC18XX_CREG_CREG0, in clk_creg_32k_prepare()
67 regmap_update_bits(creg->reg, LPC18XX_CREG_CREG0, in clk_creg_32k_unprepare()
77 regmap_read(creg->reg, LPC18XX_CREG_CREG0, ®); in clk_creg_32k_is_prepared()
93 return regmap_update_bits(creg->reg, LPC18XX_CREG_CREG0, in clk_creg_enable()
94 creg->en_mask, creg->en_mask); in clk_creg_enable()
101 regmap_update_bits(creg->reg, LPC18XX_CREG_CREG0, in clk_creg_disable()
[all …]
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| /kernel/linux/linux-5.10/drivers/clk/nxp/ |
| D | clk-lpc18xx-creg.c | 2 * Clk driver for NXP LPC18xx/43xx Configuration Registers (CREG)
11 #include <linux/clk-provider.h>
14 #include <linux/mfd/syscon.h>
53 ret = regmap_update_bits(creg->reg, LPC18XX_CREG_CREG0, in clk_creg_32k_prepare()
70 regmap_update_bits(creg->reg, LPC18XX_CREG_CREG0, in clk_creg_32k_unprepare()
80 regmap_read(creg->reg, LPC18XX_CREG_CREG0, ®); in clk_creg_32k_is_prepared()
96 return regmap_update_bits(creg->reg, LPC18XX_CREG_CREG0, in clk_creg_enable()
97 creg->en_mask, creg->en_mask); in clk_creg_enable()
104 regmap_update_bits(creg->reg, LPC18XX_CREG_CREG0, in clk_creg_disable()
105 creg->en_mask, 0); in clk_creg_disable()
[all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/clock/ |
| D | sprd,sc9860-clk.txt | 2 ------------------------
5 - compatible: should contain the following compatible strings:
6 - "sprd,sc9860-pmu-gate"
7 - "sprd,sc9860-pll"
8 - "sprd,sc9860-ap-clk"
9 - "sprd,sc9860-aon-prediv"
10 - "sprd,sc9860-apahb-gate"
11 - "sprd,sc9860-aon-gate"
12 - "sprd,sc9860-aonsecure-clk"
13 - "sprd,sc9860-agcp-gate"
[all …]
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| D | pistachio-clock.txt | 6 from the device-tree.
9 ----------------
12 defined with the following clock-output-names:
13 - "xtal": External 52Mhz oscillator (required)
14 - "audio_clk_in": Alternate audio reference clock (optional)
15 - "enet_clk_in": Alternate ethernet PHY clock (optional)
18 ----------------------
21 co-processor), audio, and several peripherals.
24 - compatible: Must be "img,pistachio-clk".
25 - reg: Must contain the base address and length of the core clock controller.
[all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/clock/ |
| D | sprd,sc9860-clk.txt | 2 ------------------------
5 - compatible: should contain the following compatible strings:
6 - "sprd,sc9860-pmu-gate"
7 - "sprd,sc9860-pll"
8 - "sprd,sc9860-ap-clk"
9 - "sprd,sc9860-aon-prediv"
10 - "sprd,sc9860-apahb-gate"
11 - "sprd,sc9860-aon-gate"
12 - "sprd,sc9860-aonsecure-clk"
13 - "sprd,sc9860-agcp-gate"
[all …]
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| D | pistachio-clock.txt | 6 from the device-tree.
9 ----------------
12 defined with the following clock-output-names:
13 - "xtal": External 52Mhz oscillator (required)
14 - "audio_clk_in": Alternate audio reference clock (optional)
15 - "enet_clk_in": Alternate ethernet PHY clock (optional)
18 ----------------------
21 co-processor), audio, and several peripherals.
24 - compatible: Must be "img,pistachio-clk".
25 - reg: Must contain the base address and length of the core clock controller.
[all …]
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| /kernel/linux/linux-5.10/drivers/spi/ |
| D | spi-dw-mmio.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Memory-mapped interface driver for DW SPI Core
8 #include <linux/clk.h>
15 #include <linux/mfd/syscon.h>
24 #include "spi-dw.h"
30 struct clk *clk; member
31 struct clk *pclk;
52 struct regmap *syscon; member
65 struct dw_spi *dws = spi_master_get_devdata(spi->master); in dw_spi_mscc_set_cs()
67 struct dw_spi_mscc *dwsmscc = dwsmmio->priv; in dw_spi_mscc_set_cs()
[all …]
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| /kernel/linux/linux-6.6/drivers/spi/ |
| D | spi-dw-mmio.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Memory-mapped interface driver for DW SPI Core
8 #include <linux/clk.h>
15 #include <linux/mfd/syscon.h>
24 #include "spi-dw.h"
30 struct clk *clk; member
31 struct clk *pclk;
52 struct regmap *syscon; member
61 * bit: |---3-------2-------1-------0
79 struct dw_spi *dws = spi_controller_get_devdata(spi->controller); in dw_spi_mscc_set_cs()
[all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/net/ |
| D | stm32-dwmac.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/net/stm32-dwmac.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Alexandre Torgue <alexandre.torgue@foss.st.com>
12 - Christophe Roullier <christophe.roullier@foss.st.com>
23 - st,stm32-dwmac
24 - st,stm32mp1-dwmac
26 - compatible
29 - $ref: snps,dwmac.yaml#
[all …]
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| /kernel/linux/linux-5.10/arch/arm64/boot/dts/mediatek/ |
| D | mt8183.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 #include <dt-bindings/clock/mt8183-clk.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/reset-controller/mt8183-resets.h>
12 #include <dt-bindings/phy/phy.h>
13 #include "mt8183-pinfunc.h"
17 interrupt-parent = <&sysirq>;
18 #address-cells = <2>;
19 #size-cells = <2>;
[all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/mfd/ |
| D | canaan,k210-sysctl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mfd/canaan,k210-sysctl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Damien Le Moal <dlemoal@kernel.org>
20 - const: canaan,k210-sysctl
21 - const: syscon
22 - const: simple-mfd
29 clock-names:
31 - const: pclk
[all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/net/ |
| D | stm32-dwmac.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: "http://devicetree.org/schemas/net/stm32-dwmac.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
11 - Alexandre Torgue <alexandre.torgue@st.com>
12 - Christophe Roullier <christophe.roullier@st.com>
23 - st,stm32-dwmac
24 - st,stm32mp1-dwmac
26 - compatible
29 - $ref: "snps,dwmac.yaml#"
[all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/arm/mediatek/ |
| D | mediatek,infracfg.txt | 9 - compatible: Should be one of:
10 - "mediatek,mt2701-infracfg", "syscon"
11 - "mediatek,mt2712-infracfg", "syscon"
12 - "mediatek,mt6765-infracfg", "syscon"
13 - "mediatek,mt6779-infracfg_ao", "syscon"
14 - "mediatek,mt6797-infracfg", "syscon"
15 - "mediatek,mt7622-infracfg", "syscon"
16 - "mediatek,mt7623-infracfg", "mediatek,mt2701-infracfg", "syscon"
17 - "mediatek,mt7629-infracfg", "syscon"
18 - "mediatek,mt8135-infracfg", "syscon"
[all …]
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| D | mediatek,imgsys.txt | 8 - compatible: Should be one of:
9 - "mediatek,mt2701-imgsys", "syscon"
10 - "mediatek,mt2712-imgsys", "syscon"
11 - "mediatek,mt6765-imgsys", "syscon"
12 - "mediatek,mt6779-imgsys", "syscon"
13 - "mediatek,mt6797-imgsys", "syscon"
14 - "mediatek,mt7623-imgsys", "mediatek,mt2701-imgsys", "syscon"
15 - "mediatek,mt8167-imgsys", "syscon"
16 - "mediatek,mt8173-imgsys", "syscon"
17 - "mediatek,mt8183-imgsys", "syscon"
[all …]
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| D | mediatek,mmsys.txt | 9 - compatible: Should be one of:
10 - "mediatek,mt2701-mmsys", "syscon"
11 - "mediatek,mt2712-mmsys", "syscon"
12 - "mediatek,mt6765-mmsys", "syscon"
13 - "mediatek,mt6779-mmsys", "syscon"
14 - "mediatek,mt6797-mmsys", "syscon"
15 - "mediatek,mt7623-mmsys", "mediatek,mt2701-mmsys", "syscon"
16 - "mediatek,mt8173-mmsys", "syscon"
17 - "mediatek,mt8183-mmsys", "syscon"
18 - #clock-cells: Must be 1
[all …]
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| D | mediatek,ipu.txt | 8 - compatible: Should be one of:
9 - "mediatek,mt8183-ipu_conn", "syscon"
10 - "mediatek,mt8183-ipu_adl", "syscon"
11 - "mediatek,mt8183-ipu_core0", "syscon"
12 - "mediatek,mt8183-ipu_core1", "syscon"
13 - #clock-cells: Must be 1
15 The ipu controller uses the common clk binding from
16 Documentation/devicetree/bindings/clock/clock-bindings.txt
17 The available clocks are defined in dt-bindings/clock/mt*-clk.h.
21 ipu_conn: syscon@19000000 {
[all …]
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| D | mediatek,vdecsys.txt | 8 - compatible: Should be one of:
9 - "mediatek,mt2701-vdecsys", "syscon"
10 - "mediatek,mt2712-vdecsys", "syscon"
11 - "mediatek,mt6779-vdecsys", "syscon"
12 - "mediatek,mt6797-vdecsys", "syscon"
13 - "mediatek,mt7623-vdecsys", "mediatek,mt2701-vdecsys", "syscon"
14 - "mediatek,mt8167-vdecsys", "syscon"
15 - "mediatek,mt8173-vdecsys", "syscon"
16 - "mediatek,mt8183-vdecsys", "syscon"
17 - #clock-cells: Must be 1
[all …]
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| D | mediatek,audsys.txt | 8 - compatible: Should be one of:
9 - "mediatek,mt2701-audsys", "syscon"
10 - "mediatek,mt6765-audsys", "syscon"
11 - "mediatek,mt6779-audio", "syscon"
12 - "mediatek,mt7622-audsys", "syscon"
13 - "mediatek,mt7623-audsys", "mediatek,mt2701-audsys", "syscon"
14 - "mediatek,mt8167-audiosys", "syscon"
15 - "mediatek,mt8183-audiosys", "syscon"
16 - "mediatek,mt8516-audsys", "syscon"
17 - #clock-cells: Must be 1
[all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/arm/mediatek/ |
| D | mediatek,imgsys.txt | 8 - compatible: Should be one of:
9 - "mediatek,mt2701-imgsys", "syscon"
10 - "mediatek,mt2712-imgsys", "syscon"
11 - "mediatek,mt6765-imgsys", "syscon"
12 - "mediatek,mt6779-imgsys", "syscon"
13 - "mediatek,mt6797-imgsys", "syscon"
14 - "mediatek,mt7623-imgsys", "mediatek,mt2701-imgsys", "syscon"
15 - "mediatek,mt8167-imgsys", "syscon"
16 - "mediatek,mt8173-imgsys", "syscon"
17 - "mediatek,mt8183-imgsys", "syscon"
[all …]
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| D | mediatek,ipu.txt | 8 - compatible: Should be one of:
9 - "mediatek,mt8183-ipu_conn", "syscon"
10 - "mediatek,mt8183-ipu_adl", "syscon"
11 - "mediatek,mt8183-ipu_core0", "syscon"
12 - "mediatek,mt8183-ipu_core1", "syscon"
13 - #clock-cells: Must be 1
15 The ipu controller uses the common clk binding from
16 Documentation/devicetree/bindings/clock/clock-bindings.txt
17 The available clocks are defined in dt-bindings/clock/mt*-clk.h.
21 ipu_conn: syscon@19000000 {
[all …]
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| D | mediatek,vdecsys.txt | 8 - compatible: Should be one of:
9 - "mediatek,mt2701-vdecsys", "syscon"
10 - "mediatek,mt2712-vdecsys", "syscon"
11 - "mediatek,mt6779-vdecsys", "syscon"
12 - "mediatek,mt6797-vdecsys", "syscon"
13 - "mediatek,mt7623-vdecsys", "mediatek,mt2701-vdecsys", "syscon"
14 - "mediatek,mt8167-vdecsys", "syscon"
15 - "mediatek,mt8173-vdecsys", "syscon"
16 - "mediatek,mt8183-vdecsys", "syscon"
17 - #clock-cells: Must be 1
[all …]
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| D | mediatek,audsys.txt | 8 - compatible: Should be one of:
9 - "mediatek,mt2701-audsys", "syscon"
10 - "mediatek,mt6765-audsys", "syscon"
11 - "mediatek,mt6779-audio", "syscon"
12 - "mediatek,mt7622-audsys", "syscon"
13 - "mediatek,mt7623-audsys", "mediatek,mt2701-audsys", "syscon"
14 - "mediatek,mt8167-audiosys", "syscon"
15 - "mediatek,mt8183-audiosys", "syscon"
16 - "mediatek,mt8192-audsys", "syscon"
17 - "mediatek,mt8516-audsys", "syscon"
[all …]
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