Searched +full:system +full:- +full:clock +full:- +full:direction +full:- +full:out (Results 1 – 25 of 353) sorted by relevance
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/sound/ |
| D | audio-graph-port.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/audio-graph-port.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
15 port-base:
16 $ref: /schemas/graph.yaml#/$defs/port-base
18 convert-rate:
19 $ref: /schemas/sound/dai-params.yaml#/$defs/dai-sample-rate
20 convert-channels:
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| D | simple-card.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/sound/simple-card.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
14 frame-master:
15 description: Indicates dai-link frame master.
18 bitclock-master:
19 description: Indicates dai-link bit clock master
22 frame-inversion:
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/media/ |
| D | video-interfaces.txt | 4 ---------------
21 #address-cells = <1>;
22 #size-cells = <0>;
37 a common scheme using '#address-cells', '#size-cells' and 'reg' properties is
41 specify #address-cells, #size-cells properties independently for the 'port'
44 Two 'endpoint' nodes are linked with each other through their 'remote-endpoint'
53 a device is partitioned into multiple data busses, e.g. 16-bit input port
54 divided into two separate ITU-R BT.656 8-bit busses. In such case bus-width
55 and data-shift properties can be used to assign physical data lines to each
59 --------------------------------
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/sound/ |
| D | simple-card.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/sound/simple-card.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
14 frame-master:
15 description: Indicates dai-link frame master.
16 $ref: /schemas/types.yaml#/definitions/phandle-array
19 bitclock-master:
20 description: Indicates dai-link bit clock master
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| /kernel/linux/linux-5.10/sound/soc/ti/ |
| D | omap3pandora.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * omap3pandora.c -- SoC audio for Pandora Handheld Console
19 #include <asm/mach-types.h>
20 #include <linux/platform_data/asoc-ti-mcbsp.h>
22 #include "omap-mcbsp.h"
39 /* Set the codec system clock for DAC and ADC */ in omap3pandora_hw_params()
43 pr_err(PREFIX "can't set codec system clock\n"); in omap3pandora_hw_params()
47 /* Set McBSP clock to external */ in omap3pandora_hw_params()
52 pr_err(PREFIX "can't set cpu system clock\n"); in omap3pandora_hw_params()
58 pr_err(PREFIX "can't set SRG clock divider\n"); in omap3pandora_hw_params()
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| /kernel/linux/linux-6.6/arch/arm64/boot/dts/freescale/ |
| D | imx8mn-beacon-kit.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 /dts-v1/;
9 #include "imx8mn-beacon-som.dtsi"
10 #include "imx8mn-beacon-baseboard.dtsi"
14 compatible = "beacon,imx8mn-beacon-kit", "fsl,imx8mn";
17 stdout-path = &uart2;
21 compatible = "hdmi-connector";
26 remote-endpoint = <&adv7535_out>;
31 reg_hdmi: regulator-hdmi-dvdd {
32 compatible = "regulator-fixed";
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| D | imx8mm-beacon-kit.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 /dts-v1/;
9 #include "imx8mm-beacon-som.dtsi"
10 #include "imx8mm-beacon-baseboard.dtsi"
14 compatible = "beacon,imx8mm-beacon-kit", "fsl,imx8mm";
17 stdout-path = &uart2;
21 compatible = "hdmi-connector";
26 remote-endpoint = <&adv7535_out>;
31 reg_hdmi: regulator-hdmi-dvdd {
32 compatible = "regulator-fixed";
[all …]
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| /kernel/linux/linux-5.10/sound/soc/atmel/ |
| D | atmel_ssc_dai.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * atmel_ssc_dai.h - ALSA SSC interface for the Atmel SoC
11 * Based on at91-ssc.c by
21 #include <linux/atmel-ssc.h>
23 #include "atmel-pcm.h"
25 /* SSC system clock ids */
26 #define ATMEL_SYSCLK_MCK 0 /* SSC uses AT91 MCK as system clock */
33 * SSC direction masks
40 * SSC register values that Atmel left out of <linux/atmel-ssc.h>. These
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| /kernel/linux/linux-6.6/sound/soc/atmel/ |
| D | atmel_ssc_dai.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * atmel_ssc_dai.h - ALSA SSC interface for the Atmel SoC
11 * Based on at91-ssc.c by
21 #include <linux/atmel-ssc.h>
23 #include "atmel-pcm.h"
25 /* SSC system clock ids */
26 #define ATMEL_SYSCLK_MCK 0 /* SSC uses AT91 MCK as system clock */
33 * SSC direction masks
40 * SSC register values that Atmel left out of <linux/atmel-ssc.h>. These
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| /kernel/linux/linux-6.6/arch/arm64/boot/dts/ti/ |
| D | k3-am62x-sk-hdmi-audio.dtso | 1 // SPDX-License-Identifier: GPL-2.0
3 * Audio playback via HDMI for AM625-SK and AM62-LP SK.
6 * AM625 SK: https://www.ti.com/tool/SK-AM62
7 * AM62-LP SK: https://www.ti.com/tool/SK-AM62-LP
9 * Copyright (C) 2023 Texas Instruments Incorporated - http://www.ti.com/
12 /dts-v1/;
16 hdmi_audio: sound-sii9022 {
17 compatible = "simple-audio-card";
18 simple-audio-card,name = "AM62x-Sil9022-HDMI";
19 simple-audio-card,format = "i2s";
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| D | k3-am65-iot2050-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) Siemens AG, 2018-2021
12 #include "k3-am654.dtsi"
13 #include <dt-bindings/phy/phy.h>
33 stdout-path = "serial3:115200n8";
36 reserved-memory {
37 #address-cells = <2>;
38 #size-cells = <2>;
41 secure_ddr: secure-ddr@9e800000 {
42 reg = <0 0x9e800000 0 0x01800000>; /* for OP-TEE */
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| /kernel/linux/linux-6.6/Documentation/ABI/testing/ |
| D | sysfs-timecard | 18 uses for clock adjustments.
24 IRIG adjustments from external IRIG-B signal
35 10Mhz signal is used as the 10Mhz reference clock
42 IRIG signal is sent to the IRIG-B module
57 10Mhz output is from the 10Mhz reference clock
58 PHC output PPS is from the PHC clock
59 MAC output PPS is from the Miniature Atomic Clock
62 IRIG output is from the PHC, in IRIG-B format
83 for internal disciplining of the atomic clock.
89 for internal disciplining of the atomic clock.
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| /kernel/linux/linux-5.10/arch/m68k/include/asm/ |
| D | MC68328.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
3 /* include/asm-m68knommu/MC68328.h: '328 control registers
8 * Based on include/asm-m68knommu/MC68332.h
26 * 0xFFFFF0xx -- System Control
31 * System Control Register (SCR)
36 #define SCR_WDTH8 0x01 /* 8-Bit Width Select */
39 #define SCR_BETEN 0x10 /* Bus-Error Time-Out Enable */
42 #define SCR_BETO 0x80 /* Bus-Error TimeOut */
52 * 0xFFFFF1xx -- Chip-Select logic
58 * 0xFFFFF2xx -- Phase Locked Loop (PLL) & Power Control
[all …]
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| D | MC68VZ328.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
3 /* include/asm-m68knommu/MC68VZ328.h: 'VZ328 control registers
5 * Copyright (c) 2000-2001 Lineo Inc. <www.lineo.com>
6 * Copyright (c) 2000-2001 Lineo Canada Corp. <www.lineo.ca>
9 * Based on include/asm-m68knommu/MC68332.h
29 * 0xFFFFF0xx -- System Control
34 * System Control Register (SCR)
39 #define SCR_WDTH8 0x01 /* 8-Bit Width Select */
42 #define SCR_BETEN 0x10 /* Bus-Error Time-Out Enable */
45 #define SCR_BETO 0x80 /* Bus-Error TimeOut */
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| D | MC68EZ328.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
3 /* include/asm-m68knommu/MC68EZ328.h: 'EZ328 control registers
8 * Based on include/asm-m68knommu/MC68332.h
27 * 0xFFFFF0xx -- System Control
32 * System Control Register (SCR)
37 #define SCR_WDTH8 0x01 /* 8-Bit Width Select */
40 #define SCR_BETEN 0x10 /* Bus-Error Time-Out Enable */
43 #define SCR_BETO 0x80 /* Bus-Error TimeOut */
53 * 0xFFFFF1xx -- Chip-Select logic
84 #define CSA_EN 0x0001 /* Chip-Select Enable */
[all …]
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| /kernel/linux/linux-6.6/arch/m68k/include/asm/ |
| D | MC68328.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
3 /* include/asm-m68knommu/MC68328.h: '328 control registers
8 * Based on include/asm-m68knommu/MC68332.h
26 * 0xFFFFF0xx -- System Control
31 * System Control Register (SCR)
36 #define SCR_WDTH8 0x01 /* 8-Bit Width Select */
39 #define SCR_BETEN 0x10 /* Bus-Error Time-Out Enable */
42 #define SCR_BETO 0x80 /* Bus-Error TimeOut */
52 * 0xFFFFF1xx -- Chip-Select logic
58 * 0xFFFFF2xx -- Phase Locked Loop (PLL) & Power Control
[all …]
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| D | MC68VZ328.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
3 /* include/asm-m68knommu/MC68VZ328.h: 'VZ328 control registers
5 * Copyright (c) 2000-2001 Lineo Inc. <www.lineo.com>
6 * Copyright (c) 2000-2001 Lineo Canada Corp. <www.lineo.ca>
9 * Based on include/asm-m68knommu/MC68332.h
29 * 0xFFFFF0xx -- System Control
34 * System Control Register (SCR)
39 #define SCR_WDTH8 0x01 /* 8-Bit Width Select */
42 #define SCR_BETEN 0x10 /* Bus-Error Time-Out Enable */
45 #define SCR_BETO 0x80 /* Bus-Error TimeOut */
[all …]
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| D | MC68EZ328.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
3 /* include/asm-m68knommu/MC68EZ328.h: 'EZ328 control registers
8 * Based on include/asm-m68knommu/MC68332.h
27 * 0xFFFFF0xx -- System Control
32 * System Control Register (SCR)
37 #define SCR_WDTH8 0x01 /* 8-Bit Width Select */
40 #define SCR_BETEN 0x10 /* Bus-Error Time-Out Enable */
43 #define SCR_BETO 0x80 /* Bus-Error TimeOut */
53 * 0xFFFFF1xx -- Chip-Select logic
84 #define CSA_EN 0x0001 /* Chip-Select Enable */
[all …]
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| /kernel/linux/linux-5.10/Documentation/driver-api/gpio/ |
| D | legacy.rst | 13 A "General Purpose Input/Output" (GPIO) is a flexible software-controlled
21 System-on-Chip (SOC) processors heavily rely on GPIOs. In some cases, every
22 non-dedicated pin can be configured as a GPIO; and most chips have at least
27 Most PC southbridges have a few dozen GPIO-capable pins (with only the BIOS
32 - Output values are writable (high=1, low=0). Some chips also have
34 value might be driven ... supporting "wire-OR" and similar schemes
37 - Input values are likewise readable (1, 0). Some chips support readback
38 of pins configured as "output", which is very useful in such "wire-OR"
40 input de-glitch/debounce logic, sometimes with software controls.
42 - Inputs can often be used as IRQ signals, often edge triggered but
[all …]
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| /kernel/linux/linux-6.6/Documentation/driver-api/gpio/ |
| D | legacy.rst | 13 A "General Purpose Input/Output" (GPIO) is a flexible software-controlled
21 System-on-Chip (SOC) processors heavily rely on GPIOs. In some cases, every
22 non-dedicated pin can be configured as a GPIO; and most chips have at least
27 Most PC southbridges have a few dozen GPIO-capable pins (with only the BIOS
32 - Output values are writable (high=1, low=0). Some chips also have
34 value might be driven ... supporting "wire-OR" and similar schemes
37 - Input values are likewise readable (1, 0). Some chips support readback
38 of pins configured as "output", which is very useful in such "wire-OR"
40 input de-glitch/debounce logic, sometimes with software controls.
42 - Inputs can often be used as IRQ signals, often edge triggered but
[all …]
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| /kernel/linux/linux-6.6/arch/arm/boot/dts/ti/keystone/ |
| D | keystone-k2g-evm.dts | 1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2016-2017 Texas Instruments Incorporated - http://www.ti.com/
7 /dts-v1/;
9 #include "keystone-k2g.dtsi"
12 compatible = "ti,k2g-evm", "ti,k2g", "ti,keystone";
20 reserved-memory {
21 #address-cells = <2>;
22 #size-cells = <2>;
25 dsp_common_memory: dsp-common-memory@81f800000 {
26 compatible = "shared-dma-pool";
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| /kernel/linux/linux-6.6/drivers/media/usb/dvb-usb-v2/ |
| D | rtl28xxu.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
138 * 0x3000 SYS : system
146 #define USB_SYSCTL 0x2000 /* USB system control */
147 #define USB_SYSCTL_0 0x2000 /* USB system control */
148 #define USB_SYSCTL_1 0x2001 /* USB system control */
149 #define USB_SYSCTL_2 0x2002 /* USB system control */
150 #define USB_SYSCTL_3 0x2003 /* USB system control */
196 #define USB_TOUT_VAL 0x2F08 /* USB time-out time */
200 #define USB_VSTAOUT 0x2F1C /* UTMI vendor signal status out */
209 #define USB_SLBBIST 0x2FA0 /* self-loop-back BIST */
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| /kernel/linux/linux-5.10/drivers/media/usb/dvb-usb-v2/ |
| D | rtl28xxu.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
138 * 0x3000 SYS : system
146 #define USB_SYSCTL 0x2000 /* USB system control */
147 #define USB_SYSCTL_0 0x2000 /* USB system control */
148 #define USB_SYSCTL_1 0x2001 /* USB system control */
149 #define USB_SYSCTL_2 0x2002 /* USB system control */
150 #define USB_SYSCTL_3 0x2003 /* USB system control */
196 #define USB_TOUT_VAL 0x2F08 /* USB time-out time */
200 #define USB_VSTAOUT 0x2F1C /* UTMI vendor signal status out */
209 #define USB_SLBBIST 0x2FA0 /* self-loop-back BIST */
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| /kernel/linux/linux-6.6/Documentation/spi/ |
| D | spi-summary.rst | 5 02-Feb-2012
8 ------------
14 The three signal wires hold a clock (SCK, often on the order of 10 MHz),
15 and parallel data lines with "Master Out, Slave In" (MOSI) or "Master In,
16 Slave Out" (MISO) signals. (Other names are also used.) There are four
17 clocking modes through which data is exchanged; mode-0 and mode-3 are most
18 commonly used. Each clock cycle shifts data out and data in; the clock
32 - SPI may be used for request/response style device protocols, as with
35 - It may also be used to stream data in either direction (half duplex),
38 - Some devices may use eight bit words. Others may use different word
[all …]
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| /kernel/linux/linux-5.10/Documentation/spi/ |
| D | spi-summary.rst | 5 02-Feb-2012
8 ------------
14 The three signal wires hold a clock (SCK, often on the order of 10 MHz),
15 and parallel data lines with "Master Out, Slave In" (MOSI) or "Master In,
16 Slave Out" (MISO) signals. (Other names are also used.) There are four
17 clocking modes through which data is exchanged; mode-0 and mode-3 are most
18 commonly used. Each clock cycle shifts data out and data in; the clock
32 - SPI may be used for request/response style device protocols, as with
35 - It may also be used to stream data in either direction (half duplex),
38 - Some devices may use eight bit words. Others may use different word
[all …]
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