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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/sram/
Dallwinner,sun4i-a10-system-control.yaml1 # SPDX-License-Identifier: GPL-2.0+
3 ---
4 $id: http://devicetree.org/schemas/sram/allwinner,sun4i-a10-system-control.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Allwinner A10 System Control
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
15 by a regular node for the SRAM controller itself, with sub-nodes
19 "#address-cells":
22 "#size-cells":
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/sram/
Dallwinner,sun4i-a10-system-control.yaml1 # SPDX-License-Identifier: GPL-2.0+
3 ---
4 $id: http://devicetree.org/schemas/sram/allwinner,sun4i-a10-system-control.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Allwinner A10 System Control Device Tree Bindings
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
15 by a regular node for the SRAM controller itself, with sub-nodes
19 "#address-cells":
22 "#size-cells":
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/pinctrl/
Dsprd,pinctrl.txt5 The first block comprises some global control registers, and each
8 pad driving level, system control select and so on ("domain pad
11 slect 3.0v, then the pin can output 3.0v. "system control" is used
12 to choose one function (like: UART0) for which system, since we
16 of them, so we can not make every Spreadtrum-special configuration
18 global configuration in future. Then we add one "sprd,control" to
19 set these various global control configuration, and we need use
23 bits in one global control register as one pin, thus we should
32 Now we have 4 systems for sleep mode on SC9860 SoC: AP system,
33 PUBCP system, TGLDSP system and AGDSP system. And the pin sleep
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/pinctrl/
Dsprd,pinctrl.txt5 The first block comprises some global control registers, and each
8 pad driving level, system control select and so on ("domain pad
11 select 3.0v, then the pin can output 3.0v. "system control" is used
12 to choose one function (like: UART0) for which system, since we
16 of them, so we can not make every Spreadtrum-special configuration
18 global configuration in future. Then we add one "sprd,control" to
19 set these various global control configuration, and we need use
23 bits in one global control register as one pin, thus we should
32 Now we have 4 systems for sleep mode on SC9860 SoC: AP system,
33 PUBCP system, TGLDSP system and AGDSP system. And the pin sleep
[all …]
/kernel/linux/linux-6.6/arch/powerpc/include/asm/
Dmpc5121.h1 /* SPDX-License-Identifier: GPL-2.0-only */
18 u32 rcr; /* Reset Control Register */
19 u32 rcer; /* Reset Control Enable Register */
23 * Clock Control Module
26 u32 spmr; /* System PLL Mode Register */
27 u32 sccr1; /* System Clock Control Register 1 */
28 u32 sccr2; /* System Clock Control Register 2 */
29 u32 scfr1; /* System Clock Frequency Register 1 */
30 u32 scfr2; /* System Clock Frequency Register 2 */
31 u32 scfr2s; /* System Clock Frequency Shadow Register 2 */
[all …]
Dipic.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
26 #define IPIC_SICFR 0x00 /* System Global Interrupt Configuration Register */
27 #define IPIC_SIVCR 0x04 /* System Global Interrupt Vector Register */
28 #define IPIC_SIPNR_H 0x08 /* System Internal Interrupt Pending Register (HIGH) */
29 #define IPIC_SIPNR_L 0x0C /* System Internal Interrupt Pending Register (LOW) */
30 #define IPIC_SIPRR_A 0x10 /* System Internal Interrupt group A Priority Register */
31 #define IPIC_SIPRR_B 0x14 /* System Internal Interrupt group B Priority Register */
32 #define IPIC_SIPRR_C 0x18 /* System Internal Interrupt group C Priority Register */
33 #define IPIC_SIPRR_D 0x1C /* System Internal Interrupt group D Priority Register */
34 #define IPIC_SIMSR_H 0x20 /* System Internal Interrupt Mask Register (HIGH) */
[all …]
/kernel/linux/linux-5.10/arch/powerpc/include/asm/
Dmpc5121.h1 /* SPDX-License-Identifier: GPL-2.0-only */
18 u32 rcr; /* Reset Control Register */
19 u32 rcer; /* Reset Control Enable Register */
23 * Clock Control Module
26 u32 spmr; /* System PLL Mode Register */
27 u32 sccr1; /* System Clock Control Register 1 */
28 u32 sccr2; /* System Clock Control Register 2 */
29 u32 scfr1; /* System Clock Frequency Register 1 */
30 u32 scfr2; /* System Clock Frequency Register 2 */
31 u32 scfr2s; /* System Clock Frequency Shadow Register 2 */
[all …]
Dipic.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
26 #define IPIC_SICFR 0x00 /* System Global Interrupt Configuration Register */
27 #define IPIC_SIVCR 0x04 /* System Global Interrupt Vector Register */
28 #define IPIC_SIPNR_H 0x08 /* System Internal Interrupt Pending Register (HIGH) */
29 #define IPIC_SIPNR_L 0x0C /* System Internal Interrupt Pending Register (LOW) */
30 #define IPIC_SIPRR_A 0x10 /* System Internal Interrupt group A Priority Register */
31 #define IPIC_SIPRR_B 0x14 /* System Internal Interrupt group B Priority Register */
32 #define IPIC_SIPRR_C 0x18 /* System Internal Interrupt group C Priority Register */
33 #define IPIC_SIPRR_D 0x1C /* System Internal Interrupt group D Priority Register */
34 #define IPIC_SIMSR_H 0x20 /* System Internal Interrupt Mask Register (HIGH) */
[all …]
/kernel/linux/linux-5.10/Documentation/driver-api/
Ddcdbas.rst9 systems management software such as Dell OpenManage to perform system
10 management interrupts and host control actions (system power cycle or
24 System Management Interrupt
28 management information via a system management interrupt (SMI). The SMI data
29 buffer must reside in 32-bit address space, and the physical address of the
33 software to perform these system management interrupts::
44 2) Write system management command to smi_data.
47 4) Read system management command response from smi_data.
51 Host Control Action
54 Dell OpenManage supports a host control feature that allows the administrator
[all …]
/kernel/linux/linux-6.6/Documentation/driver-api/
Ddcdbas.rst9 systems management software such as Dell OpenManage to perform system
10 management interrupts and host control actions (system power cycle or
24 System Management Interrupt
28 management information via a system management interrupt (SMI). The SMI data
29 buffer must reside in 32-bit address space, and the physical address of the
33 software to perform these system management interrupts::
44 2) Write system management command to smi_data.
47 4) Read system management command response from smi_data.
51 Host Control Action
54 Dell OpenManage supports a host control feature that allows the administrator
[all …]
/kernel/linux/linux-5.10/drivers/firmware/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
4 # see Documentation/kbuild/kconfig-language.rst.
10 tristate "ARM System Control and Management Interface (SCMI) Message Protocol"
14 ARM System Control and Management Interface (SCMI) protocol is a
15 set of operating system-independent software interfaces that are
16 used in system management. SCMI is extensible and currently provides
17 interfaces for: Discovery and self-description of the interfaces
19 a given device or domain into the various power-saving states that
20 it supports, Performance management which is the ability to control
44 tristate "ARM System Control and Power Interface (SCPI) Message Protocol"
[all …]
/kernel/linux/linux-6.6/drivers/firmware/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
4 # see Documentation/kbuild/kconfig-language.rst.
12 tristate "ARM System Control and Power Interface (SCPI) Message Protocol"
16 System Control and Power Interface (SCPI) Message Protocol is
18 Cores(AP) and the System Control Processor(SCP). The MHU peripheral
19 provides a mechanism for inter-processor communication between SCP
23 Processors. It offers control and management of: the core/cluster
25 certain system clocks configuration, thermal sensors and many
70 bool "Add firmware-provided memory map to sysfs" if EXPERT
73 Add the firmware-provided (unmodified) memory map to /sys/firmware/memmap.
[all …]
/kernel/linux/linux-6.6/drivers/media/usb/dvb-usb-v2/
Drtl28xxu.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
138 * 0x3000 SYS : system
145 /* SIE Control Registers */
146 #define USB_SYSCTL 0x2000 /* USB system control */
147 #define USB_SYSCTL_0 0x2000 /* USB system control */
148 #define USB_SYSCTL_1 0x2001 /* USB system control */
149 #define USB_SYSCTL_2 0x2002 /* USB system control */
150 #define USB_SYSCTL_3 0x2003 /* USB system control */
153 #define USB_CTRL 0x2010 /* USB control */
165 #define USB_EP0_CTL 0x2108 /* EP 0 control */
[all …]
/kernel/linux/linux-5.10/drivers/media/usb/dvb-usb-v2/
Drtl28xxu.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
138 * 0x3000 SYS : system
145 /* SIE Control Registers */
146 #define USB_SYSCTL 0x2000 /* USB system control */
147 #define USB_SYSCTL_0 0x2000 /* USB system control */
148 #define USB_SYSCTL_1 0x2001 /* USB system control */
149 #define USB_SYSCTL_2 0x2002 /* USB system control */
150 #define USB_SYSCTL_3 0x2003 /* USB system control */
153 #define USB_CTRL 0x2010 /* USB control */
165 #define USB_EP0_CTL 0x2108 /* EP 0 control */
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/power/
Dpower-controller.txt1 * Generic system power control capability
3 Power-management integrated circuits or miscellaneous hardware components are
4 sometimes able to control the system power. The device driver associated with these
6 it can be used to switch off the system. The corresponding device must have the
7 standard property "system-power-controller" in its device node. This property
8 marks the device as able to control the system power. In order to test if this
15 compatible = "active-semi,act8846";
16 system-power-controller;
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/power/
Dpower-controller.txt1 * Generic system power control capability
3 Power-management integrated circuits or miscellaneous hardware components are
4 sometimes able to control the system power. The device driver associated with these
6 it can be used to switch off the system. The corresponding device must have the
7 standard property "system-power-controller" in its device node. This property
8 marks the device as able to control the system power. In order to test if this
15 compatible = "active-semi,act8846";
16 system-power-controller;
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/clock/
Dpistachio-clock.txt5 general control, and top general control) which are instantiated individually
6 from the device-tree.
9 ----------------
12 defined with the following clock-output-names:
13 - "xtal": External 52Mhz oscillator (required)
14 - "audio_clk_in": Alternate audio reference clock (optional)
15 - "enet_clk_in": Alternate ethernet PHY clock (optional)
18 ----------------------
21 co-processor), audio, and several peripherals.
24 - compatible: Must be "img,pistachio-clk".
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/clock/
Dpistachio-clock.txt5 general control, and top general control) which are instantiated individually
6 from the device-tree.
9 ----------------
12 defined with the following clock-output-names:
13 - "xtal": External 52Mhz oscillator (required)
14 - "audio_clk_in": Alternate audio reference clock (optional)
15 - "enet_clk_in": Alternate ethernet PHY clock (optional)
18 ----------------------
21 co-processor), audio, and several peripherals.
24 - compatible: Must be "img,pistachio-clk".
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/display/panel/
Dpanel-common.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/panel/panel-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
24 width-mm:
29 height-mm:
38 on the system (e.g. as an affixed label) or specified in the system's
43 non-descriptive information. For instance an LCD panel in a system that
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/phy/
Dti-phy.txt3 OMAP CONTROL PHY
6 - compatible: Should be one of
7 "ti,control-phy-otghs" - if it has otghs_control mailbox register as on OMAP4.
8 "ti,control-phy-usb2" - if it has Power down bit in control_dev_conf register
10 "ti,control-phy-pipe3" - if it has DPLL and individual Rx & Tx power control
12 "ti,control-phy-pcie" - for pcie to support external clock for pcie and to
15 "ti,control-phy-usb2-dra7" - if it has power down register like USB2 PHY on
17 "ti,control-phy-usb2-am437" - if it has power down register like USB2 PHY on
19 - reg : register ranges as listed in the reg-names property
20 - reg-names: "otghs_control" for control-phy-otghs
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/phy/
Dti-phy.txt3 OMAP CONTROL PHY
6 - compatible: Should be one of
7 "ti,control-phy-otghs" - if it has otghs_control mailbox register as on OMAP4.
8 "ti,control-phy-usb2" - if it has Power down bit in control_dev_conf register
10 "ti,control-phy-pipe3" - if it has DPLL and individual Rx & Tx power control
12 "ti,control-phy-pcie" - for pcie to support external clock for pcie and to
15 "ti,control-phy-usb2-dra7" - if it has power down register like USB2 PHY on
17 "ti,control-phy-usb2-am437" - if it has power down register like USB2 PHY on
19 - reg : register ranges as listed in the reg-names property
20 - reg-names: "otghs_control" for control-phy-otghs
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/mfd/
Dmax77620.txt4 -------------------
5 - compatible: Must be one of
9 - reg: I2C device address.
12 -------------------
13 - interrupts: The interrupt on the parent the controller is
15 - interrupt-controller: Marks the device node as an interrupt controller.
16 - #interrupt-cells: is <2> and their usage is compliant to the 2 cells
17 variant of <../interrupt-controller/interrupts.txt>
19 are defined at dt-bindings/mfd/max77620.h.
21 - system-power-controller: Indicates that this PMIC is controlling the
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/mfd/
Dmax77620.txt4 -------------------
5 - compatible: Must be one of
9 - reg: I2C device address.
12 -------------------
13 - interrupts: The interrupt on the parent the controller is
15 - interrupt-controller: Marks the device node as an interrupt controller.
16 - #interrupt-cells: is <2> and their usage is compliant to the 2 cells
17 variant of <../interrupt-controller/interrupts.txt>
19 are defined at dt-bindings/mfd/max77620.h.
21 - system-power-controller: Indicates that this PMIC is controlling the
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/arm/
Dsyna.txt3 According to https://www.synaptics.com/company/news/conexant-marvell
7 ---------------------------------------------------------------
19 ---------------------------------------------------------------
30 "marvell,berlin2cd" for Marvell Armada 1500-mini (BG2CD, 88DE3005)
32 "marvell,berlin2q" for Marvell Armada 1500-pro (BG2Q, 88DE3114)
38 model = "Sony NSZ-GS7";
39 compatible = "sony,nsz-gs7", "marvell,berlin2", "marvell,berlin";
44 * Marvell Berlin CPU control bindings
46 CPU control register allows various operations on CPUs, like resetting them
50 - compatible: should be "marvell,berlin-cpu-ctrl"
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/arm/
Dsyna.txt3 According to https://www.synaptics.com/company/news/conexant-marvell
7 ---------------------------------------------------------------
19 ---------------------------------------------------------------
34 "marvell,berlin2cd" for Marvell Armada 1500-mini (BG2CD, 88DE3005)
36 "marvell,berlin2q" for Marvell Armada 1500-pro (BG2Q, 88DE3114)
42 model = "Sony NSZ-GS7";
43 compatible = "sony,nsz-gs7", "marvell,berlin2", "marvell,berlin";
48 * Marvell Berlin CPU control bindings
50 CPU control register allows various operations on CPUs, like resetting them
54 - compatible: should be "marvell,berlin-cpu-ctrl"
[all …]

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