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/kernel/linux/linux-6.6/drivers/i2c/algos/
Di2c-algo-pca.c52 pca_outw(adap, I2C_PCA_IND, adap->bus_settings.tlow); in pca_reset()
451 int tlow, thi; in pca_init() local
500 /* The minimum clock that respects the thi/tlow = 134/157 is in pca_init()
501 * 64800 Hz. Below that, we have to fix the tlow to 255 and in pca_init()
505 tlow = 255; in pca_init()
507 thi /= (I2C_PCA_OSC_PER * clock) - tlow; in pca_init()
509 tlow = (1000000 - clock * raise_fall_time) * min_tlow; in pca_init()
510 tlow /= I2C_PCA_OSC_PER * clock * (min_thi + min_tlow); in pca_init()
511 thi = tlow * min_thi / min_tlow; in pca_init()
516 pca_data->bus_settings.tlow = tlow; in pca_init()
/kernel/linux/linux-5.10/drivers/i2c/algos/
Di2c-algo-pca.c52 pca_outw(adap, I2C_PCA_IND, adap->bus_settings.tlow); in pca_reset()
451 int tlow, thi; in pca_init() local
500 /* The minimum clock that respects the thi/tlow = 134/157 is in pca_init()
501 * 64800 Hz. Below that, we have to fix the tlow to 255 and in pca_init()
505 tlow = 255; in pca_init()
507 thi /= (I2C_PCA_OSC_PER * clock) - tlow; in pca_init()
509 tlow = (1000000 - clock * raise_fall_time) * min_tlow; in pca_init()
510 tlow /= I2C_PCA_OSC_PER * clock * (min_thi + min_tlow); in pca_init()
511 thi = tlow * min_thi / min_tlow; in pca_init()
516 pca_data->bus_settings.tlow = tlow; in pca_init()
/kernel/linux/linux-6.6/drivers/i2c/busses/
Di2c-qcom-cci.c97 u16 tlow; /* LOW period of the SCL clock */ member
276 val = hw->thigh << 16 | hw->tlow; in cci_init()
705 .tlow = 114,
717 .tlow = 28,
739 .tlow = 114,
751 .tlow = 28,
773 .tlow = 174,
785 .tlow = 56,
797 .tlow = 22,
Di2c-sh_mobile.c204 static u32 sh_mobile_i2c_iccl(unsigned long count_khz, u32 tLOW, u32 tf) in sh_mobile_i2c_iccl() argument
208 * ICCL >= COUNT_CLK * (tLOW + tf) in sh_mobile_i2c_iccl()
211 * the SCL signal (tLOW) as soon as it pulls the SCL line. in sh_mobile_i2c_iccl()
212 * In order to meet the tLOW timing spec, we need to take into in sh_mobile_i2c_iccl()
216 return (((count_khz * (tLOW + tf)) + 5000) / 10000); in sh_mobile_i2c_iccl()
267 u32 tHIGH, tLOW, tf; in sh_mobile_i2c_init() local
272 tLOW = 47; /* tLOW = 4.7 us */ in sh_mobile_i2c_init()
276 tLOW = 13; /* tLOW = 1.3 us */ in sh_mobile_i2c_init()
285 pd->iccl = sh_mobile_i2c_iccl(i2c_clk_khz, tLOW, tf); in sh_mobile_i2c_init()
Di2c-uniphier.c300 * Bit30-16: clock cycles of tLOW. in uniphier_i2c_hw_init()
301 * Standard-mode: tLOW = 4.7 us, tHIGH = 4.0 us in uniphier_i2c_hw_init()
302 * Fast-mode: tLOW = 1.3 us, tHIGH = 0.6 us in uniphier_i2c_hw_init()
303 * "tLow/tHIGH = 5/4" meets both. in uniphier_i2c_hw_init()
Di2c-uniphier-f.c491 * Standard-mode: tLOW + tHIGH = 10 us in uniphier_fi2c_hw_init()
492 * Fast-mode: tLOW + tHIGH = 2.5 us in uniphier_fi2c_hw_init()
496 * Standard-mode: tLOW = 4.7 us, tHIGH = 4.0 us, tBUF = 4.7 us in uniphier_fi2c_hw_init()
497 * Fast-mode: tLOW = 1.3 us, tHIGH = 0.6 us, tBUF = 1.3 us in uniphier_fi2c_hw_init()
498 * "tLow/tHIGH = 5/4" meets both. in uniphier_fi2c_hw_init()
Di2c-designware-common.c375 u32 i2c_dw_scl_lcnt(u32 ic_clk, u32 tLOW, u32 tf, int offset) in i2c_dw_scl_lcnt() argument
380 * IC_[FS]S_SCL_LCNT + 1 >= IC_CLK * (tLOW + tf) in i2c_dw_scl_lcnt()
383 * of the SCL clock (tLOW) as soon as it pulls the SCL line. in i2c_dw_scl_lcnt()
384 * In order to meet the tLOW timing spec, we need to take into in i2c_dw_scl_lcnt()
388 return DIV_ROUND_CLOSEST_ULL((u64)ic_clk * (tLOW + tf), MICRO) - in i2c_dw_scl_lcnt()
Di2c-designware-master.c74 4700, /* tLOW = 4.7 us */ in i2c_dw_set_timings_master()
104 500, /* tLOW = 500 ns */ in i2c_dw_set_timings_master()
124 1300, /* tLOW = 1.3 us */ in i2c_dw_set_timings_master()
152 320, /* tLOW = 320 ns */ in i2c_dw_set_timings_master()
Di2c-tegra.c609 u32 val, clk_divisor, clk_multiplier, tsu_thd, tlow, thigh, non_hs_mode; in tegra_i2c_init() local
642 tlow = i2c_dev->hw->tlow_fast_fastplus_mode; in tegra_i2c_init()
653 tlow = i2c_dev->hw->tlow_std_mode; in tegra_i2c_init()
668 FIELD_PREP(I2C_INTERFACE_TIMING_TLOW, tlow); in tegra_i2c_init()
679 clk_multiplier = (tlow + thigh + 2) * (non_hs_mode + 1); in tegra_i2c_init()
/kernel/linux/linux-5.10/drivers/i2c/busses/
Di2c-sh_mobile.c204 static u32 sh_mobile_i2c_iccl(unsigned long count_khz, u32 tLOW, u32 tf) in sh_mobile_i2c_iccl() argument
208 * ICCL >= COUNT_CLK * (tLOW + tf) in sh_mobile_i2c_iccl()
211 * the SCL signal (tLOW) as soon as it pulls the SCL line. in sh_mobile_i2c_iccl()
212 * In order to meet the tLOW timing spec, we need to take into in sh_mobile_i2c_iccl()
216 return (((count_khz * (tLOW + tf)) + 5000) / 10000); in sh_mobile_i2c_iccl()
267 u32 tHIGH, tLOW, tf; in sh_mobile_i2c_init() local
272 tLOW = 47; /* tLOW = 4.7 us */ in sh_mobile_i2c_init()
276 tLOW = 13; /* tLOW = 1.3 us */ in sh_mobile_i2c_init()
285 pd->iccl = sh_mobile_i2c_iccl(i2c_clk_khz, tLOW, tf); in sh_mobile_i2c_init()
Di2c-qcom-cci.c97 u16 tlow; /* LOW period of the SCL clock */ member
276 val = hw->thigh << 16 | hw->tlow; in cci_init()
707 .tlow = 114,
719 .tlow = 28,
741 .tlow = 174,
753 .tlow = 56,
765 .tlow = 22,
Di2c-uniphier.c300 * Bit30-16: clock cycles of tLOW. in uniphier_i2c_hw_init()
301 * Standard-mode: tLOW = 4.7 us, tHIGH = 4.0 us in uniphier_i2c_hw_init()
302 * Fast-mode: tLOW = 1.3 us, tHIGH = 0.6 us in uniphier_i2c_hw_init()
303 * "tLow/tHIGH = 5/4" meets both. in uniphier_i2c_hw_init()
Di2c-designware-common.c372 u32 i2c_dw_scl_lcnt(u32 ic_clk, u32 tLOW, u32 tf, int offset) in i2c_dw_scl_lcnt() argument
377 * IC_[FS]S_SCL_LCNT + 1 >= IC_CLK * (tLOW + tf) in i2c_dw_scl_lcnt()
380 * of the SCL clock (tLOW) as soon as it pulls the SCL line. in i2c_dw_scl_lcnt()
381 * In order to meet the tLOW timing spec, we need to take into in i2c_dw_scl_lcnt()
385 return DIV_ROUND_CLOSEST_ULL((u64)ic_clk * (tLOW + tf), MICRO) - in i2c_dw_scl_lcnt()
Di2c-uniphier-f.c491 * Standard-mode: tLOW + tHIGH = 10 us in uniphier_fi2c_hw_init()
492 * Fast-mode: tLOW + tHIGH = 2.5 us in uniphier_fi2c_hw_init()
496 * Standard-mode: tLOW = 4.7 us, tHIGH = 4.0 us, tBUF = 4.7 us in uniphier_fi2c_hw_init()
497 * Fast-mode: tLOW = 1.3 us, tHIGH = 0.6 us, tBUF = 1.3 us in uniphier_fi2c_hw_init()
498 * "tLow/tHIGH = 5/4" meets both. in uniphier_fi2c_hw_init()
Di2c-designware-master.c69 4700, /* tLOW = 4.7 us */ in i2c_dw_set_timings_master()
99 500, /* tLOW = 500 ns */ in i2c_dw_set_timings_master()
119 1300, /* tLOW = 1.3 us */ in i2c_dw_set_timings_master()
147 320, /* tLOW = 320 ns */ in i2c_dw_set_timings_master()
Di2c-tegra.c614 u32 val, clk_divisor, clk_multiplier, tsu_thd, tlow, thigh, non_hs_mode; in tegra_i2c_init() local
646 tlow = i2c_dev->hw->tlow_fast_fastplus_mode; in tegra_i2c_init()
657 tlow = i2c_dev->hw->tlow_std_mode; in tegra_i2c_init()
672 FIELD_PREP(I2C_INTERFACE_TIMING_TLOW, tlow); in tegra_i2c_init()
683 clk_multiplier = (tlow + thigh + 2) * (non_hs_mode + 1); in tegra_i2c_init()
Di2c-designware-core.h300 u32 i2c_dw_scl_lcnt(u32 ic_clk, u32 tLOW, u32 tf, int offset);
/kernel/linux/linux-6.6/include/linux/
Di2c-algo-pca.h59 * @tlow: Configured SCL LOW period
65 int tlow; member
/kernel/linux/linux-5.10/include/linux/
Di2c-algo-pca.h59 * @tlow: Configured SCL LOW period
65 int tlow; member
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/i2c/
Dsnps,designware-i2c.yaml77 This value is used to compute the tLOW period.
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/i2c/
Dsnps,designware-i2c.yaml79 This value is used to compute the tLOW period.
/kernel/linux/linux-5.10/arch/powerpc/platforms/44x/
Dwarp.c197 i2c_smbus_write_byte_data(client, 3, 0); /* Tlow */ in pika_setup_critical_temp()
/kernel/linux/linux-6.6/arch/powerpc/platforms/44x/
Dwarp.c228 i2c_smbus_write_byte_data(client, 3, 0); /* Tlow */ in pika_setup_critical_temp()
/kernel/linux/linux-6.6/drivers/hwmon/
Dtmp108.c37 #define TMP108_CONF_FL 0x0800 /* Watchdog flag - TLOW */
/kernel/linux/linux-5.10/drivers/hwmon/
Dtmp108.c37 #define TMP108_CONF_FL 0x0800 /* Watchdog flag - TLOW */

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