| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/ddr/ |
| D | lpddr2.txt | 1 * LPDDR2 SDRAM memories compliant to JEDEC JESD209-2
4 - compatible : Should be one of - "jedec,lpddr2-nvm", "jedec,lpddr2-s2",
5 "jedec,lpddr2-s4"
7 "ti,jedec-lpddr2-s2" should be listed if the memory part is LPDDR2-S2 type
9 "ti,jedec-lpddr2-s4" should be listed if the memory part is LPDDR2-S4 type
11 "ti,jedec-lpddr2-nvm" should be listed if the memory part is LPDDR2-NVM type
13 - density : <u32> representing density in Mb (Mega bits)
15 - io-width : <u32> representing bus width. Possible values are 8, 16, and 32
21 These values shall be obtained from the device data-sheet.
22 - tRRD-min-tck
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| D | lpddr3.txt | 1 * LPDDR3 SDRAM memories compliant to JEDEC JESD209-3C
4 - compatible : Should be "<vendor>,<type>", and generic value "jedec,lpddr3".
8 - density : <u32> representing density in Mb (Mega bits)
9 - io-width : <u32> representing bus width. Possible values are 8, 16, 32, 64
10 - #address-cells: Must be set to 1
11 - #size-cells: Must be set to 0
17 These values shall be obtained from the device data-sheet.
18 - tRFC-min-tck
19 - tRRD-min-tck
20 - tRPab-min-tck
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| /kernel/linux/linux-5.10/drivers/memory/ |
| D | of_memory.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
19 * of_get_min_tck() - extract min timing values for ddr
21 * @dev: device requesting for min timing values
26 * default min timings provided by JEDEC.
32 struct lpddr2_min_tck *min; in of_get_min_tck() local
34 min = devm_kzalloc(dev, sizeof(*min), GFP_KERNEL); in of_get_min_tck()
35 if (!min) in of_get_min_tck()
38 ret |= of_property_read_u32(np, "tRPab-min-tck", &min->tRPab); in of_get_min_tck()
39 ret |= of_property_read_u32(np, "tRCD-min-tck", &min->tRCD); in of_get_min_tck()
40 ret |= of_property_read_u32(np, "tWR-min-tck", &min->tWR); in of_get_min_tck()
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| D | jedec_ddr.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
64 /* Refresh rate in nano-seconds */
136 u32 tXP; member
149 * Min value for some parameters in terms of number of tCK cycles(nCK)
160 u32 tXP; member
198 u32 tXP; member
205 * Min value for some parameters in terms of number of tCK cycles(nCK)
227 u32 tXP; member
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| D | emif.c | 1 // SPDX-License-Identifier: GPL-2.0-only
32 * struct emif_data - Per device static data for driver's use
37 * to this EMIF - read from MR4 register. If there
42 * @base: base address of memory-mapped IO registers.
47 * frequencies, to avoid re-calculating them on
82 u32 type = emif->plat_data->device_info->type; in do_emif_regdump_show()
83 u32 ip_rev = emif->plat_data->ip_rev; in do_emif_regdump_show()
86 regs->freq/1000000); in do_emif_regdump_show()
88 seq_printf(s, "ref_ctrl_shdw\t: 0x%08x\n", regs->ref_ctrl_shdw); in do_emif_regdump_show()
89 seq_printf(s, "sdram_tim1_shdw\t: 0x%08x\n", regs->sdram_tim1_shdw); in do_emif_regdump_show()
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| /kernel/linux/linux-6.6/drivers/memory/ |
| D | of_memory.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
19 * of_get_min_tck() - extract min timing values for ddr
21 * @dev: device requesting for min timing values
26 * default min timings provided by JEDEC.
32 struct lpddr2_min_tck *min; in of_get_min_tck() local
34 min = devm_kzalloc(dev, sizeof(*min), GFP_KERNEL); in of_get_min_tck()
35 if (!min) in of_get_min_tck()
38 ret |= of_property_read_u32(np, "tRPab-min-tck", &min->tRPab); in of_get_min_tck()
39 ret |= of_property_read_u32(np, "tRCD-min-tck", &min->tRCD); in of_get_min_tck()
40 ret |= of_property_read_u32(np, "tWR-min-tck", &min->tWR); in of_get_min_tck()
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| D | jedec_ddr.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
64 /* Refresh rate in nano-seconds */
156 u32 tXP; member
169 * Min value for some parameters in terms of number of tCK cycles(nCK)
180 u32 tXP; member
207 * -ENOENT if info unavailable.
245 u32 tXP; member
252 * Min value for some parameters in terms of number of tCK cycles(nCK)
274 u32 tXP; member
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| /kernel/linux/linux-6.6/arch/arm/boot/dts/ti/omap/ |
| D | elpida_ecb240abacn.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
8 compatible = "elpida,ECB240ABACN","jedec,lpddr2-s4";
10 io-width = <32>;
12 tRPab-min-tck = <3>;
13 tRCD-min-tck = <3>;
14 tWR-min-tck = <3>;
15 tRASmin-min-tck = <3>;
16 tRRD-min-tck = <2>;
17 tWTR-min-tck = <2>;
18 tXP-min-tck = <2>;
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | elpida_ecb240abacn.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
8 compatible = "Elpida,ECB240ABACN","jedec,lpddr2-s4";
10 io-width = <32>;
12 tRPab-min-tck = <3>;
13 tRCD-min-tck = <3>;
14 tWR-min-tck = <3>;
15 tRASmin-min-tck = <3>;
16 tRRD-min-tck = <2>;
17 tWTR-min-tck = <2>;
18 tXP-min-tck = <2>;
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| D | exynos5422-odroid-core.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
3 * Hardkernel Odroid XU3/XU3-Lite/XU4/HC1 boards core device tree source
6 * Copyright (c) 2013-2017 Samsung Electronics Co., Ltd.
10 #include <dt-bindings/clock/samsung,s2mps11.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/gpio/gpio.h>
14 #include "exynos5422-cpus.dtsi"
23 stdout-path = "serial2:115200n8";
27 compatible = "samsung,secure-firmware";
31 fixed-rate-clocks {
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/memory-controllers/ddr/ |
| D | jedec,lpddr2.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/ddr/jedec,lpddr2.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: LPDDR2 SDRAM compliant to JEDEC JESD209-2
10 - Krzysztof Kozlowski <krzk@kernel.org>
13 - $ref: jedec,lpddr-props.yaml#
18 - items:
19 - enum:
20 - elpida,ECB240ABACN
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| D | jedec,lpddr3.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/ddr/jedec,lpddr3.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: LPDDR3 SDRAM compliant to JEDEC JESD209-3
10 - Krzysztof Kozlowski <krzk@kernel.org>
13 - $ref: jedec,lpddr-props.yaml#
18 - items:
19 - enum:
20 - samsung,K3QF2F20DB
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| /kernel/linux/linux-6.6/arch/arm/boot/dts/samsung/ |
| D | exynos5422-odroid-core.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
3 * Hardkernel Odroid XU3/XU3-Lite/XU4/HC1 boards core device tree source
6 * Copyright (c) 2013-2017 Samsung Electronics Co., Ltd.
10 #include <dt-bindings/clock/samsung,s2mps11.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/gpio/gpio.h>
14 #include "exynos5422-cpus.dtsi"
27 stdout-path = "serial2:115200n8";
31 compatible = "samsung,secure-firmware";
35 fixed-rate-clocks {
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