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Searched +full:tcsr +full:- +full:msm8960 (Results 1 – 14 of 14) sorted by relevance

/kernel/linux/linux-5.10/Documentation/devicetree/bindings/mfd/
Dqcom,tcsr.txt8 - compatible: Should contain:
9 "qcom,tcsr-ipq8064", "syscon" for IPQ8064
10 "qcom,tcsr-apq8064", "syscon" for APQ8064
11 "qcom,tcsr-msm8660", "syscon" for MSM8660
12 "qcom,tcsr-msm8960", "syscon" for MSM8960
13 "qcom,tcsr-msm8974", "syscon" for MSM8974
14 "qcom,tcsr-apq8084", "syscon" for APQ8084
15 "qcom,tcsr-msm8916", "syscon" for MSM8916
16 - reg: Address range for TCSR registers
19 tcsr: syscon@1a400000 {
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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/mfd/
Dqcom,tcsr.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/mfd/qcom,tcsr.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <bjorn.andersson@linaro.org>
19 - enum:
20 - qcom,msm8976-tcsr
21 - qcom,msm8998-tcsr
22 - qcom,qcs404-tcsr
23 - qcom,sc7180-tcsr
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/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dqcom-msm8960.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/clock/qcom,gcc-msm8960.h>
6 #include <dt-bindings/mfd/qcom-rpm.h>
7 #include <dt-bindings/soc/qcom,gsbi.h>
10 #address-cells = <1>;
11 #size-cells = <1>;
12 model = "Qualcomm MSM8960";
13 compatible = "qcom,msm8960";
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Dqcom-apq8064.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/clock/qcom,gcc-msm8960.h>
5 #include <dt-bindings/reset/qcom,gcc-msm8960.h>
6 #include <dt-bindings/clock/qcom,mmcc-msm8960.h>
7 #include <dt-bindings/clock/qcom,rpmcc.h>
8 #include <dt-bindings/soc/qcom,gsbi.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #address-cells = <1>;
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/kernel/linux/linux-6.6/arch/arm/boot/dts/qcom/
Dqcom-msm8960.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/clock/qcom,gcc-msm8960.h>
6 #include <dt-bindings/reset/qcom,gcc-msm8960.h>
7 #include <dt-bindings/clock/qcom,lcc-msm8960.h>
8 #include <dt-bindings/mfd/qcom-rpm.h>
9 #include <dt-bindings/soc/qcom,gsbi.h>
12 #address-cells = <1>;
13 #size-cells = <1>;
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Dqcom-apq8064.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/clock/qcom,gcc-msm8960.h>
5 #include <dt-bindings/clock/qcom,lcc-msm8960.h>
6 #include <dt-bindings/reset/qcom,gcc-msm8960.h>
7 #include <dt-bindings/clock/qcom,mmcc-msm8960.h>
8 #include <dt-bindings/clock/qcom,rpmcc.h>
9 #include <dt-bindings/soc/qcom,gsbi.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
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Dqcom-mdm9615.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
9 /dts-v1/;
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/clock/qcom,gcc-mdm9615.h>
13 #include <dt-bindings/clock/qcom,lcc-msm8960.h>
14 #include <dt-bindings/reset/qcom,gcc-mdm9615.h>
15 #include <dt-bindings/mfd/qcom-rpm.h>
16 #include <dt-bindings/soc/qcom,gsbi.h>
19 #address-cells = <1>;
20 #size-cells = <1>;
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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/firmware/
Dqcom,scm.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
16 - Bjorn Andersson <bjorn.andersson@linaro.org>
17 - Robert Marko <robimarko@gmail.com>
18 - Guru Das Srinagesh <quic_gurus@quicinc.com>
23 - enum:
24 - qcom,scm-apq8064
25 - qcom,scm-apq8084
26 - qcom,scm-ipq4019
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/firmware/
Dqcom,scm.txt9 - compatible: must contain one of the following:
10 * "qcom,scm-apq8064"
11 * "qcom,scm-apq8084"
12 * "qcom,scm-ipq4019"
13 * "qcom,scm-ipq806x"
14 * "qcom,scm-ipq8074"
15 * "qcom,scm-msm8660"
16 * "qcom,scm-msm8916"
17 * "qcom,scm-msm8960"
18 * "qcom,scm-msm8974"
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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/soc/qcom/
Dqcom,gsbi.yaml1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andy Gross <agross@kernel.org>
11 - Bjorn Andersson <bjorn.andersson@linaro.org>
12 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
16 representing a serial sub-node device that is mux'd as part of the GSBI
26 const: qcom,gsbi-v1.0.0
28 '#address-cells':
31 cell-index:
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/kernel/linux/linux-6.6/drivers/soc/qcom/
Dqcom_gsbi.c1 // SPDX-License-Identifier: GPL-2.0-only
15 #include <dt-bindings/soc/qcom,gsbi.h>
83 { /* ADM 0 - B */
88 { /* ADM 0 - B */
93 { /* ADM 1 - A */
98 { /* ADM 1 - B */
114 struct regmap *tcsr; member
118 { .compatible = "qcom,tcsr-ipq8064", .data = &config_ipq8064},
119 { .compatible = "qcom,tcsr-apq8064", .data = &config_apq8064},
120 { .compatible = "qcom,tcsr-msm8960", .data = &config_msm8960},
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/kernel/linux/linux-5.10/drivers/soc/qcom/
Dqcom_gsbi.c1 // SPDX-License-Identifier: GPL-2.0-only
15 #include <dt-bindings/soc/qcom,gsbi.h>
83 { /* ADM 0 - B */
88 { /* ADM 0 - B */
93 { /* ADM 1 - A */
98 { /* ADM 1 - B */
114 struct regmap *tcsr; member
118 { .compatible = "qcom,tcsr-ipq8064", .data = &config_ipq8064},
119 { .compatible = "qcom,tcsr-apq8064", .data = &config_apq8064},
120 { .compatible = "qcom,tcsr-msm8960", .data = &config_msm8960},
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/kernel/linux/linux-6.6/drivers/clk/qcom/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
79 platforms such as apq8064, msm8660, msm8960 etc.
251 tristate "APQ8064/MSM8960 Global Clock Controller"
254 Support for the global clock controller on apq8064/msm8960 devices.
259 tristate "APQ8064/MSM8960/MDM9650 LPASS Clock Controller"
262 Support for the LPASS clock controller on apq8064/msm8960/mdm9650
284 tristate "MSM8960 Multimedia Clock Controller"
288 Support for the multimedia clock controller on msm8960 devices.
1008 tristate "SM8550 TCSR Clock Controller"
1012 Support for the TCSR clock controller on SM8550 devices.
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/kernel/linux/linux-5.10/drivers/firmware/
Dqcom_scm.c1 // SPDX-License-Identifier: GPL-2.0-only
9 #include <linux/dma-mapping.h>
17 #include <linux/reset-controller.h>
18 #include <linux/arm-smccc.h>
87 ret = clk_prepare_enable(__scm->core_clk); in qcom_scm_clk_enable()
91 ret = clk_prepare_enable(__scm->iface_clk); in qcom_scm_clk_enable()
95 ret = clk_prepare_enable(__scm->bus_clk); in qcom_scm_clk_enable()
102 clk_disable_unprepare(__scm->iface_clk); in qcom_scm_clk_enable()
104 clk_disable_unprepare(__scm->core_clk); in qcom_scm_clk_enable()
111 clk_disable_unprepare(__scm->core_clk); in qcom_scm_clk_disable()
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