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Searched +full:tegra186 +full:- +full:hsp (Results 1 – 21 of 21) sorted by relevance

/kernel/linux/linux-6.6/Documentation/devicetree/bindings/mailbox/
Dnvidia,tegra186-hsp.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mailbox/nvidia,tegra186-hsp.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra Hardware Synchronization Primitives (HSP)
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
14 The HSP modules are used for the processors to share resources and
21 The features that HSP supported are shared mailboxes, shared
25 contain two cells. The first cell determines the HSP type and the
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/mailbox/
Dnvidia,tegra186-hsp.txt1 NVIDIA Tegra Hardware Synchronization Primitives (HSP)
3 The HSP modules are used for the processors to share resources and communicate
9 The features that HSP supported are shared mailboxes, shared semaphores,
13 - name : Should be hsp
14 - compatible
17 - "nvidia,tegra186-hsp"
18 - "nvidia,tegra194-hsp", "nvidia,tegra186-hsp"
19 - reg : Offset and length of the register set for the device.
20 - interrupt-names
24 - "doorbell"
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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/firmware/
Dnvidia,tegra186-bpmp.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/firmware/nvidia,tegra186-bpmp.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
25 - .../mailbox/mailbox.txt
26 - .../mailbox/nvidia,tegra186-hsp.yaml
32 - .../clock/clock-bindings.txt
33 - <dt-bindings/clock/tegra186-clock.h>
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/kernel/linux/linux-5.10/arch/arm64/boot/dts/nvidia/
Dtegra234.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #include <dt-bindings/clock/tegra234-clock.h>
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/mailbox/tegra186-hsp.h>
6 #include <dt-bindings/reset/tegra234-reset.h>
10 interrupt-parent = <&gic>;
11 #address-cells = <2>;
12 #size-cells = <2>;
15 compatible = "simple-bus";
16 #address-cells = <1>;
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Dtegra194.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra194-clock.h>
3 #include <dt-bindings/gpio/tegra194-gpio.h>
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/mailbox/tegra186-hsp.h>
6 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
7 #include <dt-bindings/power/tegra194-powergate.h>
8 #include <dt-bindings/reset/tegra194-reset.h>
9 #include <dt-bindings/thermal/tegra194-bpmp-thermal.h>
10 #include <dt-bindings/memory/tegra194-mc.h>
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Dtegra186.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra186-clock.h>
3 #include <dt-bindings/gpio/tegra186-gpio.h>
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/mailbox/tegra186-hsp.h>
6 #include <dt-bindings/memory/tegra186-mc.h>
7 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
8 #include <dt-bindings/power/tegra186-powergate.h>
9 #include <dt-bindings/reset/tegra186-reset.h>
10 #include <dt-bindings/thermal/tegra186-bpmp-thermal.h>
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Dtegra186-p3310.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include "tegra186.dtsi"
4 #include <dt-bindings/mfd/max77620.h>
8 compatible = "nvidia,p3310", "nvidia,tegra186";
27 stdout-path = "serial0:115200n8";
38 phy-reset-gpios = <&gpio TEGRA186_MAIN_GPIO(M, 4)
40 phy-handle = <&phy>;
41 phy-mode = "rgmii";
44 #address-cells = <1>;
45 #size-cells = <0>;
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/firmware/
Dnvidia,tegra186-bpmp.txt11 - compatible
14 - "nvidia,tegra186-bpmp"
15 - mboxes : The phandle of mailbox controller and the mailbox specifier.
16 - shmem : List of the phandle of the TX and RX shared memory area that
18 - #clock-cells : Should be 1.
19 - #power-domain-cells : Should be 1.
20 - #reset-cells : Should be 1.
26 - .../mailbox/mailbox.txt
27 - .../mailbox/nvidia,tegra186-hsp.txt
33 - .../clock/clock-bindings.txt
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/kernel/linux/linux-5.10/drivers/mailbox/
Dtegra-hsp.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved.
18 #include <dt-bindings/mailbox/tegra186-hsp.h>
57 struct tegra_hsp *hsp; member
109 static inline u32 tegra_hsp_readl(struct tegra_hsp *hsp, unsigned int offset) in tegra_hsp_readl() argument
111 return readl(hsp->regs + offset); in tegra_hsp_readl()
114 static inline void tegra_hsp_writel(struct tegra_hsp *hsp, u32 value, in tegra_hsp_writel() argument
117 writel(value, hsp->regs + offset); in tegra_hsp_writel()
123 return readl(channel->regs + offset); in tegra_hsp_channel_readl()
129 writel(value, channel->regs + offset); in tegra_hsp_channel_writel()
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DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
6 on-chip processors through queued messages and interrupt driven
51 running on the Cortex-M3 rWTM secure processor of the Armada 37xx
77 This driver provides support for inter-processor communication
161 providing an interface for invoking the inter-process communication
165 bool "Tegra HSP (Hardware Synchronization Primitives) Driver"
168 The Tegra HSP driver is used for the interprocessor communication
169 between different remote processors and host processors on Tegra186
174 tristate "APM SoC X-Gene SLIMpro Mailbox Controller"
177 An implementation of the APM X-Gene Interprocessor Communication
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/kernel/linux/linux-6.6/drivers/mailbox/
Dtegra-hsp.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2016-2025, NVIDIA CORPORATION. All rights reserved.
17 #include <dt-bindings/mailbox/tegra186-hsp.h>
58 struct tegra_hsp *hsp; member
134 static inline u32 tegra_hsp_readl(struct tegra_hsp *hsp, unsigned int offset) in tegra_hsp_readl() argument
136 return readl(hsp->regs + offset); in tegra_hsp_readl()
139 static inline void tegra_hsp_writel(struct tegra_hsp *hsp, u32 value, in tegra_hsp_writel() argument
142 writel(value, hsp->regs + offset); in tegra_hsp_writel()
148 return readl(channel->regs + offset); in tegra_hsp_channel_readl()
154 writel(value, channel->regs + offset); in tegra_hsp_channel_writel()
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DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
6 on-chip processors through queued messages and interrupt driven
16 Apple SoCs have various co-processors required for certain
70 running on the Cortex-M3 rWTM secure processor of the Armada 37xx
96 This driver provides support for inter-processor communication
184 module will be called mailbox-mpfs.
193 providing an interface for invoking the inter-process communication
197 bool "Tegra HSP (Hardware Synchronization Primitives) Driver"
200 The Tegra HSP driver is used for the interprocessor communication
201 between different remote processors and host processors on Tegra186
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/kernel/linux/linux-5.10/include/dt-bindings/mailbox/
Dtegra186-hsp.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * This header provides constants for binding nvidia,tegra186-hsp.
/kernel/linux/linux-6.6/include/dt-bindings/mailbox/
Dtegra186-hsp.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * This header provides constants for binding nvidia,tegra186-hsp.
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/serial/
Dnvidia,tegra194-tcu.txt4 systems within the Tegra SoC. It is implemented through a mailbox-
10 - name : Should be tcu
11 - compatible
14 - "nvidia,tegra194-tcu"
15 - mbox-names:
16 "rx" - Mailbox for receiving data from hardware UART
17 "tx" - Mailbox for transmitting data to hardware UART
18 - mboxes: Mailboxes corresponding to the mbox-names.
24 - .../mailbox/mailbox.txt
25 - .../mailbox/nvidia,tegra186-hsp.txt
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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/serial/
Dnvidia,tegra194-tcu.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/serial/nvidia,tegra194-tcu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jonathan Hunter <jonathanh@nvidia.com>
15 systems within the Tegra SoC. It is implemented through a mailbox-
26 - const: nvidia,tegra194-tcu
27 - items:
28 - enum:
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/kernel/linux/linux-6.6/arch/arm64/boot/dts/nvidia/
Dtegra186.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra186-clock.h>
3 #include <dt-bindings/gpio/tegra186-gpio.h>
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/mailbox/tegra186-hsp.h>
6 #include <dt-bindings/memory/tegra186-mc.h>
7 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
8 #include <dt-bindings/power/tegra186-powergate.h>
9 #include <dt-bindings/reset/tegra186-reset.h>
10 #include <dt-bindings/thermal/tegra186-bpmp-thermal.h>
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Dtegra186-p3310.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include "tegra186.dtsi"
4 #include <dt-bindings/mfd/max77620.h>
8 compatible = "nvidia,p3310", "nvidia,tegra186";
27 stdout-path = "serial0:115200n8";
38 phy-reset-gpios = <&gpio TEGRA186_MAIN_GPIO(M, 4)
40 phy-handle = <&phy>;
41 phy-mode = "rgmii";
44 #address-cells = <1>;
45 #size-cells = <0>;
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Dtegra194.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra194-clock.h>
3 #include <dt-bindings/gpio/tegra194-gpio.h>
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/mailbox/tegra186-hsp.h>
6 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
7 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
8 #include <dt-bindings/power/tegra194-powergate.h>
9 #include <dt-bindings/reset/tegra194-reset.h>
10 #include <dt-bindings/thermal/tegra194-bpmp-thermal.h>
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Dtegra234.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #include <dt-bindings/clock/tegra234-clock.h>
4 #include <dt-bindings/gpio/tegra234-gpio.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/mailbox/tegra186-hsp.h>
7 #include <dt-bindings/memory/tegra234-mc.h>
8 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
9 #include <dt-bindings/power/tegra234-powergate.h>
10 #include <dt-bindings/reset/tegra234-reset.h>
11 #include <dt-bindings/thermal/tegra234-bpmp-thermal.h>
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Dtegra186-p3509-0000+p3636-0001.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/linux-event-codes.h>
5 #include <dt-bindings/input/gpio-keys.h>
6 #include <dt-bindings/mfd/max77620.h>
8 #include "tegra186.dtsi"
12 compatible = "nvidia,p3509-0000+p3636-0001", "nvidia,tegra186";
30 stdout-path = "serial0:115200n8";
41 phy-reset-gpios = <&gpio_aon TEGRA186_AON_GPIO(AA, 6) GPIO_ACTIVE_LOW>;
42 phy-handle = <&phy>;
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