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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/misc/
Dnvidia,tegra186-misc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/misc/nvidia,tegra186-misc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra186 (and later) MISC register block
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
13 description: The MISC register block found on Tegra186 and later SoCs contains
20 - nvidia,tegra186-misc
21 - nvidia,tegra194-misc
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/misc/
Dnvidia,tegra186-misc.txt1 NVIDIA Tegra186 (and later) MISC register block
3 The MISC register block found on Tegra186 and later SoCs contains registers
7 - compatible: Must be:
8 - Tegra186: "nvidia,tegra186-misc"
9 - Tegra194: "nvidia,tegra194-misc"
10 - Tegra234: "nvidia,tegra234-misc"
11 - reg: Should contain 2 entries: The first entry gives the physical address
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/display/tegra/
Dnvidia,tegra186-display.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra186-display.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra186 (and later) Display Hub
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
15 pattern: "^display-hub@[0-9a-f]+$"
19 - nvidia,tegra186-display
20 - nvidia,tegra194-display
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/kernel/linux/linux-5.10/arch/arm64/boot/dts/nvidia/
Dtegra234.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #include <dt-bindings/clock/tegra234-clock.h>
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/mailbox/tegra186-hsp.h>
6 #include <dt-bindings/reset/tegra234-reset.h>
10 interrupt-parent = <&gic>;
11 #address-cells = <2>;
12 #size-cells = <2>;
15 compatible = "simple-bus";
16 #address-cells = <1>;
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Dtegra186.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra186-clock.h>
3 #include <dt-bindings/gpio/tegra186-gpio.h>
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/mailbox/tegra186-hsp.h>
6 #include <dt-bindings/memory/tegra186-mc.h>
7 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
8 #include <dt-bindings/power/tegra186-powergate.h>
9 #include <dt-bindings/reset/tegra186-reset.h>
10 #include <dt-bindings/thermal/tegra186-bpmp-thermal.h>
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Dtegra194.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra194-clock.h>
3 #include <dt-bindings/gpio/tegra194-gpio.h>
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/mailbox/tegra186-hsp.h>
6 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
7 #include <dt-bindings/power/tegra194-powergate.h>
8 #include <dt-bindings/reset/tegra194-reset.h>
9 #include <dt-bindings/thermal/tegra194-bpmp-thermal.h>
10 #include <dt-bindings/memory/tegra194-mc.h>
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/arm/tegra/
Dnvidia,tegra186-pmc.txt4 - compatible: Should contain one of the following:
5 - "nvidia,tegra186-pmc": for Tegra186
6 - "nvidia,tegra194-pmc": for Tegra194
7 - "nvidia,tegra234-pmc": for Tegra234
8 - reg: Must contain an (offset, length) pair of the register set for each
9 entry in reg-names.
10 - reg-names: Must include the following entries:
11 - "pmc"
12 - "wake"
13 - "aotag"
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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/arm/tegra/
Dnvidia,tegra186-pmc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/arm/tegra/nvidia,tegra186-pmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
16 - nvidia,tegra186-pmc
17 - nvidia,tegra194-pmc
18 - nvidia,tegra234-pmc
24 reg-names:
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/kernel/linux/linux-6.6/arch/arm64/boot/dts/nvidia/
Dtegra186.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra186-clock.h>
3 #include <dt-bindings/gpio/tegra186-gpio.h>
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/mailbox/tegra186-hsp.h>
6 #include <dt-bindings/memory/tegra186-mc.h>
7 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
8 #include <dt-bindings/power/tegra186-powergate.h>
9 #include <dt-bindings/reset/tegra186-reset.h>
10 #include <dt-bindings/thermal/tegra186-bpmp-thermal.h>
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Dtegra194.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra194-clock.h>
3 #include <dt-bindings/gpio/tegra194-gpio.h>
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/mailbox/tegra186-hsp.h>
6 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
7 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
8 #include <dt-bindings/power/tegra194-powergate.h>
9 #include <dt-bindings/reset/tegra194-reset.h>
10 #include <dt-bindings/thermal/tegra194-bpmp-thermal.h>
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Dtegra234.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #include <dt-bindings/clock/tegra234-clock.h>
4 #include <dt-bindings/gpio/tegra234-gpio.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/mailbox/tegra186-hsp.h>
7 #include <dt-bindings/memory/tegra234-mc.h>
8 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
9 #include <dt-bindings/power/tegra234-powergate.h>
10 #include <dt-bindings/reset/tegra234-reset.h>
11 #include <dt-bindings/thermal/tegra234-bpmp-thermal.h>
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/kernel/linux/linux-5.10/drivers/soc/tegra/fuse/
Dtegra-apbmisc.c1 // SPDX-License-Identifier: GPL-2.0-only
30 WARN(!chipid, "Tegra APB MISC not yet available\n"); in tegra_read_chipid()
77 WARN(!chipid, "Tegra ABP MISC not yet available\n"); in tegra_read_straps()
95 { .compatible = "nvidia,tegra20-apbmisc", },
96 { .compatible = "nvidia,tegra186-misc", },
97 { .compatible = "nvidia,tegra194-misc", },
98 { .compatible = "nvidia,tegra234-misc", },
142 * Fall back to legacy initialization for 32-bit ARM only. All in tegra_init_apbmisc()
143 * 64-bit ARM device tree files for Tegra are required to have in tegra_init_apbmisc()
146 * This is for backwards-compatibility with old device trees in tegra_init_apbmisc()
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/kernel/linux/linux-6.6/drivers/soc/tegra/fuse/
Dtegra-apbmisc.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2014-2023, NVIDIA CORPORATION. All rights reserved.
35 WARN(!chipid, "Tegra APB MISC not yet available\n"); in tegra_read_chipid()
83 WARN(!chipid, "Tegra ABP MISC not yet available\n"); in tegra_read_straps()
109 return -EPROBE_DEFER; in tegra194_miscreg_mask_serror()
113 return -EOPNOTSUPP; in tegra194_miscreg_mask_serror()
124 { .compatible = "nvidia,tegra20-apbmisc", },
125 { .compatible = "nvidia,tegra186-misc", },
126 { .compatible = "nvidia,tegra194-misc", },
127 { .compatible = "nvidia,tegra234-misc", },
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/kernel/linux/linux-5.10/drivers/gpu/drm/tegra/
Dhub.c1 // SPDX-License-Identifier: GPL-2.0-only
65 offset = 0x000 + (offset - 0x500); in tegra_plane_offset()
66 return plane->offset + offset; in tegra_plane_offset()
70 offset = 0x180 + (offset - 0x700); in tegra_plane_offset()
71 return plane->offset + offset; in tegra_plane_offset()
75 offset = 0x1c0 + (offset - 0x800); in tegra_plane_offset()
76 return plane->offset + offset; in tegra_plane_offset()
79 dev_WARN(plane->dc->dev, "invalid offset: %x\n", offset); in tegra_plane_offset()
81 return plane->offset + offset; in tegra_plane_offset()
87 return tegra_dc_readl(plane->dc, tegra_plane_offset(plane, offset)); in tegra_plane_readl()
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/kernel/linux/linux-6.6/drivers/gpu/drm/tegra/
Dhub.c1 // SPDX-License-Identifier: GPL-2.0-only
8 #include <linux/dma-mapping.h>
65 * be filtered out later on by ->format_mod_supported() on SoCs where
82 offset = 0x000 + (offset - 0x500); in tegra_plane_offset()
83 return plane->offset + offset; in tegra_plane_offset()
87 offset = 0x180 + (offset - 0x700); in tegra_plane_offset()
88 return plane->offset + offset; in tegra_plane_offset()
92 offset = 0x1c0 + (offset - 0x800); in tegra_plane_offset()
93 return plane->offset + offset; in tegra_plane_offset()
96 dev_WARN(plane->dc->dev, "invalid offset: %x\n", offset); in tegra_plane_offset()
[all …]
/kernel/linux/linux-6.6/drivers/spi/
Dspi-tegra210-quad.c1 // SPDX-License-Identifier: GPL-2.0-only
9 #include <linux/dma-mapping.h>
235 return readl(tqspi->base + offset); in tegra_qspi_readl()
240 writel(value, tqspi->base + offset); in tegra_qspi_writel()
244 readl(tqspi->base + QSPI_COMMAND1); in tegra_qspi_writel()
271 unsigned int remain_len = t->len - tqspi->cur_pos; in tegra_qspi_calculate_curr_xfer_param()
272 unsigned int bits_per_word = t->bits_per_word; in tegra_qspi_calculate_curr_xfer_param()
274 tqspi->bytes_per_word = DIV_ROUND_UP(bits_per_word, 8); in tegra_qspi_calculate_curr_xfer_param()
284 bits_per_word == 32) && t->len > 3) { in tegra_qspi_calculate_curr_xfer_param()
285 tqspi->is_packed = true; in tegra_qspi_calculate_curr_xfer_param()
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/kernel/linux/linux-6.6/drivers/clk/tegra/
Dclk-tegra210.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2012-2020 NVIDIA CORPORATION. All rights reserved.
8 #include <linux/clk-provider.h>
17 #include <dt-bindings/clock/tegra210-car.h>
18 #include <dt-bindings/reset/tegra210-car.h>
23 #include "clk-id.h"
264 * SDM fractional divisor is 16-bit 2's complement signed number within
265 * (-2^12 ... 2^12-1) range. Represented in PLL data structure as unsigned
266 * 16-bit value, with "0" divisor mapped to 0xFFFF. Data "0" is used to
275 #define sdin_get_n_eff(cfg) ((cfg)->n * PLL_SDM_COEFF + ((cfg)->sdm_data ? \
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/kernel/linux/linux-5.10/drivers/clk/tegra/
Dclk-tegra210.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2012-2014 NVIDIA CORPORATION. All rights reserved.
8 #include <linux/clk-provider.h>
17 #include <dt-bindings/clock/tegra210-car.h>
18 #include <dt-bindings/reset/tegra210-car.h>
23 #include "clk-id.h"
264 * SDM fractional divisor is 16-bit 2's complement signed number within
265 * (-2^12 ... 2^12-1) range. Represented in PLL data structure as unsigned
266 * 16-bit value, with "0" divisor mapped to 0xFFFF. Data "0" is used to
275 #define sdin_get_n_eff(cfg) ((cfg)->n * PLL_SDM_COEFF + ((cfg)->sdm_data ? \
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