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Searched +full:tegra194 +full:- +full:powergate (Results 1 – 17 of 17) sorted by relevance

/kernel/linux/linux-6.6/Documentation/devicetree/bindings/pci/
Dnvidia,tegra194-pcie-ep.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/nvidia,tegra194-pcie-ep.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra194 (and later) PCIe Endpoint controller (Synopsys DesignWare Core based)
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
12 - Vidya Sagar <vidyas@nvidia.com>
16 inherits all the common properties defined in snps,dw-pcie-ep.yaml. Some
20 On Tegra194, controllers C0, C4 and C5 support Endpoint mode.
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Dnvidia,tegra194-pcie.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/nvidia,tegra194-pcie.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra194 (and later) PCIe controller (Synopsys DesignWare Core based)
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
12 - Vidya Sagar <vidyas@nvidia.com>
16 inherits all the common properties defined in snps,dw-pcie.yaml. Some of
20 See nvidia,tegra194-pcie-ep.yaml for details on the Endpoint mode device
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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/display/tegra/
Dnvidia,tegra186-display.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra186-display.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
15 pattern: "^display-hub@[0-9a-f]+$"
19 - nvidia,tegra186-display
20 - nvidia,tegra194-display
22 '#address-cells':
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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/usb/
Dnvidia,tegra194-xusb.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/usb/nvidia,tegra194-xusb.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra194 xHCI controller
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
18 const: nvidia,tegra194-xusb
22 - description: base and length of the xHCI host registers
23 - description: base and length of the XUSB FPCI registers
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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/gpu/host1x/
Dnvidia,tegra210-nvenc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpu/host1x/nvidia,tegra210-nvenc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
15 - Thierry Reding <treding@gmail.com>
16 - Mikko Perttunen <mperttunen@nvidia.com>
20 pattern: "^nvenc@[0-9a-f]*$"
24 - nvidia,tegra210-nvenc
25 - nvidia,tegra186-nvenc
26 - nvidia,tegra194-nvenc
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Dnvidia,tegra210-nvjpg.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpu/host1x/nvidia,tegra210-nvjpg.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
15 - Thierry Reding <treding@gmail.com>
16 - Mikko Perttunen <mperttunen@nvidia.com>
20 pattern: "^nvjpg@[0-9a-f]*$"
24 - nvidia,tegra210-nvjpg
25 - nvidia,tegra186-nvjpg
26 - nvidia,tegra194-nvjpg
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Dnvidia,tegra210-nvdec.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpu/host1x/nvidia,tegra210-nvdec.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
15 - Thierry Reding <treding@gmail.com>
16 - Mikko Perttunen <mperttunen@nvidia.com>
20 pattern: "^nvdec@[0-9a-f]*$"
24 - nvidia,tegra210-nvdec
25 - nvidia,tegra186-nvdec
26 - nvidia,tegra194-nvdec
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/pci/
Dnvidia,tegra194-pcie.txt4 and thus inherits all the common properties defined in designware-pcie.txt.
9 - power-domains: A phandle to the node that controls power to the respective
19 "include/dt-bindings/power/tegra194-powergate.h" file.
20 - reg: A list of physical base address and length pairs for each set of
21 controller registers. Must contain an entry for each entry in the reg-names
23 - reg-names: Must include the following entries:
25 "config": As per the definition in designware-pcie.txt
31 - interrupts: A list of interrupt outputs of the controller. Must contain an
32 entry for each entry in the interrupt-names property.
33 - interrupt-names: Must include the following entries:
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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/firmware/
Dnvidia,tegra186-bpmp.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/firmware/nvidia,tegra186-bpmp.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
25 - .../mailbox/mailbox.txt
26 - .../mailbox/nvidia,tegra186-hsp.yaml
32 - .../clock/clock-bindings.txt
33 - <dt-bindings/clock/tegra186-clock.h>
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/kernel/linux/linux-5.10/arch/arm64/boot/dts/nvidia/
Dtegra194.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra194-clock.h>
3 #include <dt-bindings/gpio/tegra194-gpio.h>
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/mailbox/tegra186-hsp.h>
6 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
7 #include <dt-bindings/power/tegra194-powergate.h>
8 #include <dt-bindings/reset/tegra194-reset.h>
9 #include <dt-bindings/thermal/tegra194-bpmp-thermal.h>
10 #include <dt-bindings/memory/tegra194-mc.h>
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/kernel/linux/linux-6.6/arch/arm64/boot/dts/nvidia/
Dtegra194.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra194-clock.h>
3 #include <dt-bindings/gpio/tegra194-gpio.h>
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/mailbox/tegra186-hsp.h>
6 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
7 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
8 #include <dt-bindings/power/tegra194-powergate.h>
9 #include <dt-bindings/reset/tegra194-reset.h>
10 #include <dt-bindings/thermal/tegra194-bpmp-thermal.h>
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Dtegra234.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #include <dt-bindings/clock/tegra234-clock.h>
4 #include <dt-bindings/gpio/tegra234-gpio.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/mailbox/tegra186-hsp.h>
7 #include <dt-bindings/memory/tegra234-mc.h>
8 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
9 #include <dt-bindings/power/tegra234-powergate.h>
10 #include <dt-bindings/reset/tegra234-reset.h>
11 #include <dt-bindings/thermal/tegra234-bpmp-thermal.h>
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/kernel/linux/linux-6.6/drivers/usb/host/
Dxhci-tegra.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2014-2020, NVIDIA CORPORATION. All rights reserved.
11 #include <linux/dma-mapping.h>
321 return readl(tegra->fpci_base + offset); in fpci_readl()
327 writel(value, tegra->fpci_base + offset); in fpci_writel()
332 return readl(tegra->ipfs_base + offset); in ipfs_readl()
338 writel(value, tegra->ipfs_base + offset); in ipfs_writel()
343 return readl(tegra->bar2_base + offset); in bar2_readl()
349 writel(value, tegra->bar2_base + offset); in bar2_writel()
354 const struct tegra_xusb_soc_ops *ops = tegra->soc->ops; in csb_readl()
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/kernel/linux/linux-5.10/drivers/soc/tegra/
Dpmc.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * Copyright (c) 2018-2020, NVIDIA CORPORATION. All rights reserved.
12 #define pr_fmt(fmt) "tegra-pmc: " fmt
14 #include <linux/arm-smccc.h>
16 #include <linux/clk-provider.h>
18 #include <linux/clk/clk-conf.h>
36 #include <linux/pinctrl/pinconf-generic.h>
51 #include <dt-bindings/interrupt-controller/arm-gic.h>
52 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
53 #include <dt-bindings/gpio/tegra186-gpio.h>
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/kernel/linux/linux-5.10/drivers/gpu/drm/tegra/
Ddc.c1 // SPDX-License-Identifier: GPL-2.0-only
36 stats->frames = 0; in tegra_dc_stats_reset()
37 stats->vblank = 0; in tegra_dc_stats_reset()
38 stats->underflow = 0; in tegra_dc_stats_reset()
39 stats->overflow = 0; in tegra_dc_stats_reset()
58 offset = 0x000 + (offset - 0x500); in tegra_plane_offset()
59 return plane->offset + offset; in tegra_plane_offset()
63 offset = 0x180 + (offset - 0x700); in tegra_plane_offset()
64 return plane->offset + offset; in tegra_plane_offset()
68 offset = 0x1c0 + (offset - 0x800); in tegra_plane_offset()
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/kernel/linux/linux-6.6/drivers/soc/tegra/
Dpmc.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * Copyright (c) 2018-2023, NVIDIA CORPORATION. All rights reserved.
12 #define pr_fmt(fmt) "tegra-pmc: " fmt
14 #include <linux/arm-smccc.h>
16 #include <linux/clk-provider.h>
18 #include <linux/clk/clk-conf.h>
37 #include <linux/pinctrl/pinconf-generic.h>
56 #include <dt-bindings/interrupt-controller/arm-gic.h>
57 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
58 #include <dt-bindings/gpio/tegra186-gpio.h>
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/kernel/linux/linux-6.6/drivers/gpu/drm/tegra/
Ddc.c1 // SPDX-License-Identifier: GPL-2.0-only
10 #include <linux/dma-mapping.h>
43 stats->frames = 0; in tegra_dc_stats_reset()
44 stats->vblank = 0; in tegra_dc_stats_reset()
45 stats->underflow = 0; in tegra_dc_stats_reset()
46 stats->overflow = 0; in tegra_dc_stats_reset()
65 offset = 0x000 + (offset - 0x500); in tegra_plane_offset()
66 return plane->offset + offset; in tegra_plane_offset()
70 offset = 0x180 + (offset - 0x700); in tegra_plane_offset()
71 return plane->offset + offset; in tegra_plane_offset()
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