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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/memory-controllers/
Dnvidia,tegra20-emc.txt4 - name : Should be emc
5 - #address-cells : Should be 1
6 - #size-cells : Should be 0
7 - compatible : Should contain "nvidia,tegra20-emc".
8 - reg : Offset and length of the register set for the device
9 - nvidia,use-ram-code : If present, the sub-nodes will be addressed
12 irrespective of ram-code configuration.
13 - interrupts : Should contain EMC General interrupt.
14 - clocks : Should contain EMC clock.
20 memory-controller@7000f400 {
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/memory-controllers/
Dnvidia,tegra20-emc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/nvidia,tegra20-emc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra20 SoC External Memory Controller
10 - Dmitry Osipenko <digetx@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
12 - Thierry Reding <thierry.reding@gmail.com>
15 The External Memory Controller (EMC) interfaces with the off-chip SDRAM to
16 service the request stream sent from Memory Controller. The EMC also has
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/nvidia/
Dtegra20-acer-a500-picasso.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/atmel-maxtouch.h>
5 #include <dt-bindings/input/gpio-keys.h>
6 #include <dt-bindings/input/input.h>
7 #include <dt-bindings/thermal/thermal.h>
9 #include "tegra20.dtsi"
10 #include "tegra20-cpu-opp.dtsi"
11 #include "tegra20-cpu-opp-microvolt.dtsi"
15 compatible = "acer,picasso", "nvidia,tegra20";
[all …]
Dtegra20.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra20-car.h>
3 #include <dt-bindings/gpio/tegra-gpio.h>
4 #include <dt-bindings/memory/tegra20-mc.h>
5 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/soc/tegra-pmc.h>
9 #include "tegra20-peripherals-opp.dtsi"
12 compatible = "nvidia,tegra20";
13 interrupt-parent = <&lic>;
[all …]
Dtegra20-asus-tf101.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/atmel-maxtouch.h>
5 #include <dt-bindings/input/gpio-keys.h>
6 #include <dt-bindings/input/input.h>
7 #include <dt-bindings/thermal/thermal.h>
9 #include "tegra20.dtsi"
10 #include "tegra20-cpu-opp.dtsi"
11 #include "tegra20-cpu-opp-microvolt.dtsi"
15 compatible = "asus,tf101", "nvidia,tegra20";
[all …]
Dtegra20-colibri.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include "tegra20.dtsi"
22 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
23 nvidia,hpd-gpio =
25 pll-supply = <&reg_1v8_avdd_hdmi_pll>;
26 vdd-supply = <&reg_3v3_avdd_hdmi>;
31 lan-reset-n-hog {
32 gpio-hog;
34 output-high;
35 line-name = "LAN_RESET#";
[all …]
Dtegra30.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra30-car.h>
3 #include <dt-bindings/gpio/tegra-gpio.h>
4 #include <dt-bindings/memory/tegra30-mc.h>
5 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/soc/tegra-pmc.h>
8 #include <dt-bindings/thermal/thermal.h>
10 #include "tegra30-peripherals-opp.dtsi"
14 interrupt-parent = <&lic>;
[all …]
Dtegra20-paz00.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
5 #include <dt-bindings/thermal/thermal.h>
7 #include "tegra20.dtsi"
8 #include "tegra20-cpu-opp.dtsi"
9 #include "tegra20-cpu-opp-microvolt.dtsi"
13 compatible = "compal,paz00", "nvidia,tegra20";
25 stdout-path = "serial0:115200n8";
44 vdd-supply = <&hdmi_vdd_reg>;
[all …]
Dtegra124.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra124-car.h>
3 #include <dt-bindings/gpio/tegra-gpio.h>
4 #include <dt-bindings/memory/tegra124-mc.h>
5 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/reset/tegra124-car.h>
8 #include <dt-bindings/thermal/tegra124-soctherm.h>
9 #include <dt-bindings/soc/tegra-pmc.h>
11 #include "tegra124-peripherals-opp.dtsi"
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dtegra20-acer-a500-picasso.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/gpio-keys.h>
5 #include <dt-bindings/input/input.h>
6 #include <dt-bindings/thermal/thermal.h>
8 #include "tegra20.dtsi"
9 #include "tegra20-cpu-opp.dtsi"
10 #include "tegra20-cpu-opp-microvolt.dtsi"
14 compatible = "acer,picasso", "nvidia,tegra20";
31 * pre-existing /chosen node to be available to insert the
[all …]
Dtegra20-colibri.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include "tegra20.dtsi"
22 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
23 nvidia,hpd-gpio =
25 pll-supply = <&reg_1v8_avdd_hdmi_pll>;
26 vdd-supply = <&reg_3v3_avdd_hdmi>;
31 pinctrl-names = "default";
32 pinctrl-0 = <&state_default>;
35 /* Analogue Audio AC97 to WM9712 (On-module) */
36 audio-refclk {
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Dtegra20-paz00.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
5 #include "tegra20.dtsi"
6 #include "tegra20-cpu-opp.dtsi"
7 #include "tegra20-cpu-opp-microvolt.dtsi"
11 compatible = "compal,paz00", "nvidia,tegra20";
21 stdout-path = "serial0:115200n8";
40 vdd-supply = <&hdmi_vdd_reg>;
41 pll-supply = <&hdmi_pll_reg>;
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/kernel/linux/linux-5.10/drivers/memory/tegra/
DMakefile1 # SPDX-License-Identifier: GPL-2.0
2 tegra-mc-y := mc.o
4 tegra-mc-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra20.o
5 tegra-mc-$(CONFIG_ARCH_TEGRA_3x_SOC) += tegra30.o
6 tegra-mc-$(CONFIG_ARCH_TEGRA_114_SOC) += tegra114.o
7 tegra-mc-$(CONFIG_ARCH_TEGRA_124_SOC) += tegra124.o
8 tegra-mc-$(CONFIG_ARCH_TEGRA_132_SOC) += tegra124.o
9 tegra-mc-$(CONFIG_ARCH_TEGRA_210_SOC) += tegra210.o
11 obj-$(CONFIG_TEGRA_MC) += tegra-mc.o
13 obj-$(CONFIG_TEGRA20_EMC) += tegra20-emc.o
[all …]
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
11 bool "NVIDIA Tegra20 External Memory Controller driver"
15 This driver is for the External Memory Controller (EMC) found on
16 Tegra20 chips. The EMC controls the external DRAM on the board.
25 This driver is for the External Memory Controller (EMC) found on
26 Tegra30 chips. The EMC controls the external DRAM on the board.
35 This driver is for the External Memory Controller (EMC) found on
36 Tegra124 chips. The EMC controls the external DRAM on the board.
49 This driver is for the External Memory Controller (EMC) found on
50 Tegra210 chips. The EMC controls the external DRAM on the board.
Dtegra20-emc.c1 // SPDX-License-Identifier: GPL-2.0
3 * Tegra20 External Memory Controller driver
163 struct tegra_emc *emc = data; in tegra_emc_isr() local
167 status = readl_relaxed(emc->regs + EMC_INTSTATUS) & intmask; in tegra_emc_isr()
173 dev_err_ratelimited(emc->dev, in tegra_emc_isr()
177 writel_relaxed(status, emc->regs + EMC_INTSTATUS); in tegra_emc_isr()
182 static struct emc_timing *tegra_emc_find_timing(struct tegra_emc *emc, in tegra_emc_find_timing() argument
188 for (i = 0; i < emc->num_timings; i++) { in tegra_emc_find_timing()
189 if (emc->timings[i].rate >= rate) { in tegra_emc_find_timing()
190 timing = &emc->timings[i]; in tegra_emc_find_timing()
[all …]
/kernel/linux/linux-6.6/drivers/memory/tegra/
DMakefile1 # SPDX-License-Identifier: GPL-2.0
2 tegra-mc-y := mc.o
4 tegra-mc-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra20.o
5 tegra-mc-$(CONFIG_ARCH_TEGRA_3x_SOC) += tegra30.o
6 tegra-mc-$(CONFIG_ARCH_TEGRA_114_SOC) += tegra114.o
7 tegra-mc-$(CONFIG_ARCH_TEGRA_124_SOC) += tegra124.o
8 tegra-mc-$(CONFIG_ARCH_TEGRA_132_SOC) += tegra124.o
9 tegra-mc-$(CONFIG_ARCH_TEGRA_210_SOC) += tegra210.o
10 tegra-mc-$(CONFIG_ARCH_TEGRA_186_SOC) += tegra186.o
11 tegra-mc-$(CONFIG_ARCH_TEGRA_194_SOC) += tegra186.o tegra194.o
[all …]
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
14 tristate "NVIDIA Tegra20 External Memory Controller driver"
21 This driver is for the External Memory Controller (EMC) found on
22 Tegra20 chips. The EMC controls the external DRAM on the board.
33 This driver is for the External Memory Controller (EMC) found on
34 Tegra30 chips. The EMC controls the external DRAM on the board.
45 This driver is for the External Memory Controller (EMC) found on
46 Tegra124 chips. The EMC controls the external DRAM on the board.
59 This driver is for the External Memory Controller (EMC) found on
60 Tegra210 chips. The EMC controls the external DRAM on the board.
Dtegra20-emc.c1 // SPDX-License-Identifier: GPL-2.0
3 * Tegra20 External Memory Controller driver
14 #include <linux/interconnect-provider.h>
216 * There are multiple sources in the EMC driver which could request
221 /* protect shared rate-change code path */
237 struct tegra_emc *emc = data; in tegra_emc_isr() local
241 status = readl_relaxed(emc->regs + EMC_INTSTATUS) & intmask; in tegra_emc_isr()
247 dev_err_ratelimited(emc->dev, in tegra_emc_isr()
251 writel_relaxed(status, emc->regs + EMC_INTSTATUS); in tegra_emc_isr()
256 static struct emc_timing *tegra_emc_find_timing(struct tegra_emc *emc, in tegra_emc_find_timing() argument
[all …]
/kernel/linux/linux-6.6/drivers/clk/tegra/
DMakefile1 # SPDX-License-Identifier: GPL-2.0
2 obj-y += clk.o
3 obj-y += clk-audio-sync.o
4 obj-y += clk-device.o
5 obj-y += clk-dfll.o
6 obj-y += clk-divider.o
7 obj-y += clk-periph.o
8 obj-y += clk-periph-fixed.o
9 obj-y += clk-periph-gate.o
10 obj-y += clk-pll.o
[all …]
/kernel/linux/linux-5.10/drivers/clk/tegra/
DMakefile1 # SPDX-License-Identifier: GPL-2.0
2 obj-y += clk.o
3 obj-y += clk-audio-sync.o
4 obj-y += clk-dfll.o
5 obj-y += clk-divider.o
6 obj-y += clk-periph.o
7 obj-y += clk-periph-fixed.o
8 obj-y += clk-periph-gate.o
9 obj-y += clk-pll.o
10 obj-y += clk-pll-out.o
[all …]
/kernel/linux/linux-5.10/drivers/devfreq/
Dtegra20-devfreq.c1 // SPDX-License-Identifier: GPL-2.0
3 * NVIDIA Tegra20 devfreq driver
5 * Copyright (C) 2019 GRATE-DRIVER project
41 struct devfreq *devfreq = tegra->devfreq; in tegra_devfreq_target()
53 err = clk_set_min_rate(tegra->emc_clock, rate); in tegra_devfreq_target()
57 err = clk_set_rate(tegra->emc_clock, 0); in tegra_devfreq_target()
64 clk_set_min_rate(tegra->emc_clock, devfreq->previous_freq); in tegra_devfreq_target()
84 stat->busy_time = readl_relaxed(tegra->regs + MC_STAT_EMC_COUNT); in tegra_devfreq_get_dev_status()
85 stat->total_time = readl_relaxed(tegra->regs + MC_STAT_EMC_CLOCKS) / 8; in tegra_devfreq_get_dev_status()
86 stat->current_frequency = clk_get_rate(tegra->emc_clock); in tegra_devfreq_get_dev_status()
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/nvidia/
Dtegra186.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra186-clock.h>
3 #include <dt-bindings/gpio/tegra186-gpio.h>
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/mailbox/tegra186-hsp.h>
6 #include <dt-bindings/memory/tegra186-mc.h>
7 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
8 #include <dt-bindings/power/tegra186-powergate.h>
9 #include <dt-bindings/reset/tegra186-reset.h>
10 #include <dt-bindings/thermal/tegra186-bpmp-thermal.h>
[all …]
Dtegra194.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra194-clock.h>
3 #include <dt-bindings/gpio/tegra194-gpio.h>
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/mailbox/tegra186-hsp.h>
6 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
7 #include <dt-bindings/power/tegra194-powergate.h>
8 #include <dt-bindings/reset/tegra194-reset.h>
9 #include <dt-bindings/thermal/tegra194-bpmp-thermal.h>
10 #include <dt-bindings/memory/tegra194-mc.h>
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/nvidia/
Dtegra186.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra186-clock.h>
3 #include <dt-bindings/gpio/tegra186-gpio.h>
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/mailbox/tegra186-hsp.h>
6 #include <dt-bindings/memory/tegra186-mc.h>
7 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
8 #include <dt-bindings/power/tegra186-powergate.h>
9 #include <dt-bindings/reset/tegra186-reset.h>
10 #include <dt-bindings/thermal/tegra186-bpmp-thermal.h>
[all …]
Dtegra194.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra194-clock.h>
3 #include <dt-bindings/gpio/tegra194-gpio.h>
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/mailbox/tegra186-hsp.h>
6 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
7 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
8 #include <dt-bindings/power/tegra194-powergate.h>
9 #include <dt-bindings/reset/tegra194-reset.h>
10 #include <dt-bindings/thermal/tegra194-bpmp-thermal.h>
[all …]

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