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Searched +full:tegra20 +full:- +full:sclk (Results 1 – 9 of 9) sorted by relevance

/kernel/linux/linux-6.6/Documentation/devicetree/bindings/clock/
Dnvidia,tegra20-car.yaml1 # SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/nvidia,tegra20-car.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jon Hunter <jonathanh@nvidia.com>
11 - Thierry Reding <thierry.reding@gmail.com>
31 - nvidia,tegra20-car
32 - nvidia,tegra30-car
33 - nvidia,tegra114-car
34 - nvidia,tegra210-car
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/kernel/linux/linux-6.6/arch/arm/boot/dts/nvidia/
Dtegra20.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra20-car.h>
3 #include <dt-bindings/gpio/tegra-gpio.h>
4 #include <dt-bindings/memory/tegra20-mc.h>
5 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/soc/tegra-pmc.h>
9 #include "tegra20-peripherals-opp.dtsi"
12 compatible = "nvidia,tegra20";
13 interrupt-parent = <&lic>;
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Dtegra30.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra30-car.h>
3 #include <dt-bindings/gpio/tegra-gpio.h>
4 #include <dt-bindings/memory/tegra30-mc.h>
5 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/soc/tegra-pmc.h>
8 #include <dt-bindings/thermal/thermal.h>
10 #include "tegra30-peripherals-opp.dtsi"
14 interrupt-parent = <&lic>;
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/kernel/linux/linux-6.6/drivers/clk/tegra/
Dclk-device.c1 // SPDX-License-Identifier: GPL-2.0-only
4 #include <linux/clk-provider.h>
33 struct device *dev = clk_dev->dev; in tegra_clock_set_pd_state()
38 if (opp == ERR_PTR(-ERANGE)) { in tegra_clock_set_pd_state()
71 mutex_lock(&clk_dev->lock); in tegra_clock_change_notify()
74 if (cnd->new_rate > cnd->old_rate) in tegra_clock_change_notify()
75 err = tegra_clock_set_pd_state(clk_dev, cnd->new_rate); in tegra_clock_change_notify()
79 err = tegra_clock_set_pd_state(clk_dev, cnd->old_rate); in tegra_clock_change_notify()
83 if (cnd->new_rate < cnd->old_rate) in tegra_clock_change_notify()
84 err = tegra_clock_set_pd_state(clk_dev, cnd->new_rate); in tegra_clock_change_notify()
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Dclk-tegra20.c1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <linux/clk-provider.h>
15 #include <dt-bindings/clock/tegra20-car.h>
18 #include "clk-id.h"
437 { .con_id = "sclk", .dt_id = TEGRA20_CLK_SCLK },
444 { .dev_id = "tegra20-ac97", .dt_id = TEGRA20_CLK_AC97 },
445 { .dev_id = "tegra-apbdma", .dt_id = TEGRA20_CLK_APBDMA },
446 { .dev_id = "rtc-tegra", .dt_id = TEGRA20_CLK_RTC },
448 { .dev_id = "tegra-kbc", .dt_id = TEGRA20_CLK_KBC },
450 { .con_id = "vcp", .dev_id = "tegra-avp", .dt_id = TEGRA20_CLK_VCP },
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/kernel/linux/linux-5.10/drivers/clk/tegra/
Dclk-tegra20.c1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <linux/clk-provider.h>
13 #include <dt-bindings/clock/tegra20-car.h>
16 #include "clk-id.h"
435 { .con_id = "sclk", .dt_id = TEGRA20_CLK_SCLK },
442 { .dev_id = "tegra20-ac97", .dt_id = TEGRA20_CLK_AC97 },
443 { .dev_id = "tegra-apbdma", .dt_id = TEGRA20_CLK_APBDMA },
444 { .dev_id = "rtc-tegra", .dt_id = TEGRA20_CLK_RTC },
446 { .dev_id = "tegra-kbc", .dt_id = TEGRA20_CLK_KBC },
448 { .con_id = "vcp", .dev_id = "tegra-avp", .dt_id = TEGRA20_CLK_VCP },
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/kernel/linux/linux-6.6/arch/arm/mach-tegra/
Dplatsmp.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * linux/arch/arm/mach-tegra/platsmp.c
26 #include <asm/mach-types.h>
50 * power-gated via the flow controller). This will have no in tegra20_boot_secondary()
58 * power-gate the CPU this will cause the flow controller to in tegra20_boot_secondary()
84 * power will be resumed automatically after un-halting the in tegra30_boot_secondary()
105 * be un-gated by un-toggling the power gate register in tegra30_boot_secondary()
141 /* set SCLK as event trigger for flow controller */ in tegra114_boot_secondary()
161 if (IS_ENABLED(CONFIG_ARCH_TEGRA_2x_SOC) && tegra_get_chip_id() == TEGRA20) in tegra_boot_secondary()
170 return -EINVAL; in tegra_boot_secondary()
/kernel/linux/linux-5.10/arch/arm/mach-tegra/
Dplatsmp.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * linux/arch/arm/mach-tegra/platsmp.c
26 #include <asm/mach-types.h>
50 * power-gated via the flow controller). This will have no in tegra20_boot_secondary()
58 * power-gate the CPU this will cause the flow controller to in tegra20_boot_secondary()
84 * power will be resumed automatically after un-halting the in tegra30_boot_secondary()
105 * be un-gated by un-toggling the power gate register in tegra30_boot_secondary()
141 /* set SCLK as event trigger for flow controller */ in tegra114_boot_secondary()
161 if (IS_ENABLED(CONFIG_ARCH_TEGRA_2x_SOC) && tegra_get_chip_id() == TEGRA20) in tegra_boot_secondary()
170 return -EINVAL; in tegra_boot_secondary()
/kernel/linux/patches/linux-5.10/yangfan_patch/
Ddrivers.patch1 diff --git a/drivers/Makefile b/drivers/Makefile
3 --- a/drivers/Makefile
5 @@ -6,6 +6,8 @@
6 # Rewritten to use lists instead of if-statements.
11 obj-y += irqchip/
12 obj-y += bus/
14 diff --git a/drivers/block/nbd.c b/drivers/block/nbd.c
16 --- a/drivers/block/nbd.c
18 @@ -2398,12 +2398,6 @@ static int nbd_genl_status(struct sk_buff *skb, struct genl_info *info)
22 - if (!dev_list) {
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