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/kernel/linux/linux-6.6/sound/soc/tegra/
Dtegra20_spdif.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * tegra20_spdif.c - Tegra20 SPDIF driver
6 * Copyright (C) 2011-2012 - NVIDIA, Inc.
30 struct tegra20_spdif *spdif = dev_get_drvdata(dev); in tegra20_spdif_runtime_suspend() local
32 regcache_cache_only(spdif->regmap, true); in tegra20_spdif_runtime_suspend()
34 clk_disable_unprepare(spdif->clk_spdif_out); in tegra20_spdif_runtime_suspend()
41 struct tegra20_spdif *spdif = dev_get_drvdata(dev); in tegra20_spdif_runtime_resume() local
44 ret = reset_control_assert(spdif->reset); in tegra20_spdif_runtime_resume()
48 ret = clk_prepare_enable(spdif->clk_spdif_out); in tegra20_spdif_runtime_resume()
56 ret = reset_control_deassert(spdif->reset); in tegra20_spdif_runtime_resume()
[all …]
DMakefile1 # SPDX-License-Identifier: GPL-2.0
3 snd-soc-tegra-pcm-objs := tegra_pcm.o
4 snd-soc-tegra-utils-objs += tegra_asoc_utils.o
5 snd-soc-tegra20-ac97-objs := tegra20_ac97.o
6 snd-soc-tegra20-das-objs := tegra20_das.o
7 snd-soc-tegra20-i2s-objs := tegra20_i2s.o
8 snd-soc-tegra20-spdif-objs := tegra20_spdif.o
9 snd-soc-tegra30-ahub-objs := tegra30_ahub.o
10 snd-soc-tegra30-i2s-objs := tegra30_i2s.o
11 snd-soc-tegra210-ahub-objs := tegra210_ahub.o
[all …]
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 tristate "SoC Audio for the Tegra System-on-Chip"
15 tristate "Tegra20 AC97 interface"
20 Tegra20 AC97 interface. You will also need to select the individual
24 tristate "Tegra20 DAS module"
26 Say Y or M if you want to add support for the Tegra20 DAS module.
31 tristate "Tegra20 I2S interface"
35 Tegra20 I2S interface. You will also need to select the individual
39 tristate "Tegra20 SPDIF interface"
41 Say Y or M if you want to add support for the Tegra20 SPDIF interface.
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/sound/
Dnvidia,tegra20-spdif.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/nvidia,tegra20-spdif.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra20 S/PDIF Controller
16 - Thierry Reding <treding@nvidia.com>
17 - Jon Hunter <jonathanh@nvidia.com>
20 - $ref: dai-common.yaml#
24 const: nvidia,tegra20-spdif
38 clock-names:
[all …]
/kernel/linux/linux-5.10/sound/soc/tegra/
DMakefile1 # SPDX-License-Identifier: GPL-2.0
3 snd-soc-tegra-pcm-objs := tegra_pcm.o
4 snd-soc-tegra-utils-objs += tegra_asoc_utils.o
5 snd-soc-tegra20-ac97-objs := tegra20_ac97.o
6 snd-soc-tegra20-das-objs := tegra20_das.o
7 snd-soc-tegra20-i2s-objs := tegra20_i2s.o
8 snd-soc-tegra20-spdif-objs := tegra20_spdif.o
9 snd-soc-tegra30-ahub-objs := tegra30_ahub.o
10 snd-soc-tegra30-i2s-objs := tegra30_i2s.o
11 snd-soc-tegra210-ahub-objs := tegra210_ahub.o
[all …]
Dtegra20_spdif.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * tegra20_spdif.c - Tegra20 SPDIF driver
6 * Copyright (C) 2011-2012 - NVIDIA, Inc.
25 #define DRV_NAME "tegra20-spdif"
29 struct tegra20_spdif *spdif = dev_get_drvdata(dev); in tegra20_spdif_runtime_suspend() local
31 clk_disable_unprepare(spdif->clk_spdif_out); in tegra20_spdif_runtime_suspend()
38 struct tegra20_spdif *spdif = dev_get_drvdata(dev); in tegra20_spdif_runtime_resume() local
41 ret = clk_prepare_enable(spdif->clk_spdif_out); in tegra20_spdif_runtime_resume()
54 struct device *dev = dai->dev; in tegra20_spdif_hw_params()
55 struct tegra20_spdif *spdif = snd_soc_dai_get_drvdata(dai); in tegra20_spdif_hw_params() local
[all …]
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 tristate "SoC Audio for the Tegra System-on-Chip"
13 tristate "Tegra20 AC97 interface"
19 Tegra20 AC97 interface. You will also need to select the individual
23 tristate "Tegra20 DAS module"
26 Say Y or M if you want to add support for the Tegra20 DAS module.
31 tristate "Tegra20 I2S interface"
36 Tegra20 I2S interface. You will also need to select the individual
40 tristate "Tegra20 SPDIF interface"
44 Say Y or M if you want to add support for the Tegra20 SPDIF interface.
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/pinctrl/
Dnvidia,tegra20-pinmux.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/nvidia,tegra20-pinmux.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra20 Pinmux Controller
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
15 const: nvidia,tegra20-pinmux
19 - description: tri-state registers
20 - description: mux register
[all …]
Dnvidia,tegra124-pinmux.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/nvidia,tegra124-pinmux.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
13 description: The Tegra124 pinctrl binding is very similar to the Tegra20 and
14 Tegra30 pinctrl binding, as described in nvidia,tegra20-pinmux.yaml and
15 nvidia,tegra30-pinmux.yaml. In fact, this document assumes that binding as a
21 - const: nvidia,tegra124-pinmux
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/pinctrl/
Dnvidia,tegra114-pinmux.txt3 The Tegra114 pinctrl binding is very similar to the Tegra20 and Tegra30
4 pinctrl binding, as described in nvidia,tegra20-pinmux.txt and
5 nvidia,tegra30-pinmux.txt. In fact, this document assumes that binding as
9 - compatible: "nvidia,tegra114-pinmux"
10 - reg: Should contain the register physical address and length for each of
16 - nvidia,enable-input: Integer. Enable the pin's input path. 0: no, 1: yes.
17 - nvidia,open-drain: Integer. Enable open drain mode. 0: no, 1: yes.
18 - nvidia,lock: Integer. Lock the pin configuration against further changes
20 - nvidia,io-reset: Integer. Reset the IO path. 0: no, 1: yes.
21 - nvidia,rcv-sel: Integer. Select VIL/VIH receivers. 0: normal, 1: high.
[all …]
Dnvidia,tegra30-pinmux.txt3 The Tegra30 pinctrl binding is very similar to the Tegra20 pinctrl binding,
4 as described in nvidia,tegra20-pinmux.txt. In fact, this document assumes
9 - compatible: "nvidia,tegra30-pinmux"
10 - reg: Should contain the register physical address and length for each of
14 - nvidia,enable-input: Integer. Enable the pin's input path. 0: no, 1: yes.
15 - nvidia,open-drain: Integer. Enable open drain mode. 0: no, 1: yes.
16 - nvidia,lock: Integer. Lock the pin configuration against further changes
18 - nvidia,io-reset: Integer. Reset the IO path. 0: no, 1: yes.
20 As with Tegra20, see the Tegra TRM for complete details regarding which groups
25 per-pin mux groups:
[all …]
Dnvidia,tegra20-pinmux.txt1 NVIDIA Tegra20 pinmux controller
4 - compatible: "nvidia,tegra20-pinmux"
5 - reg: Should contain the register physical address and length for each of
6 the tri-state, mux, pull-up/down, and pad control register sets.
8 Please refer to pinctrl-bindings.txt in this directory for details of the
16 parameters, such as pull-up, tristate, drive strength, etc.
30 Required subnode-properties:
31 - nvidia,pins : An array of strings. Each string contains the name of a pin or
34 Optional subnode-properties:
35 - nvidia,function: A string containing the name of the function to mux to the
[all …]
Dnvidia,tegra124-pinmux.txt3 The Tegra124 pinctrl binding is very similar to the Tegra20 and Tegra30
4 pinctrl binding, as described in nvidia,tegra20-pinmux.txt and
5 nvidia,tegra30-pinmux.txt. In fact, this document assumes that binding as
9 - compatible: For Tegra124, must contain "nvidia,tegra124-pinmux". For
10 Tegra132, must contain '"nvidia,tegra132-pinmux", "nvidia-tegra124-pinmux"'.
11 - reg: Should contain a list of base address and size pairs for:
12 -- first entry - the drive strength and pad control registers.
13 -- second entry - the pinmux registers
14 -- third entry - the MIPI_PAD_CTRL register
18 include/dt-binding/pinctrl/pinctrl-tegra.h.
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/kernel/linux/linux-6.6/arch/arm/boot/dts/nvidia/
Dtegra20.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra20-car.h>
3 #include <dt-bindings/gpio/tegra-gpio.h>
4 #include <dt-bindings/memory/tegra20-mc.h>
5 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/soc/tegra-pmc.h>
9 #include "tegra20-peripherals-opp.dtsi"
12 compatible = "nvidia,tegra20";
13 interrupt-parent = <&lic>;
[all …]
Dtegra20-paz00.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
5 #include <dt-bindings/thermal/thermal.h>
7 #include "tegra20.dtsi"
8 #include "tegra20-cpu-opp.dtsi"
9 #include "tegra20-cpu-opp-microvolt.dtsi"
13 compatible = "compal,paz00", "nvidia,tegra20";
25 stdout-path = "serial0:115200n8";
44 vdd-supply = <&hdmi_vdd_reg>;
[all …]
Dtegra20-acer-a500-picasso.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/atmel-maxtouch.h>
5 #include <dt-bindings/input/gpio-keys.h>
6 #include <dt-bindings/input/input.h>
7 #include <dt-bindings/thermal/thermal.h>
9 #include "tegra20.dtsi"
10 #include "tegra20-cpu-opp.dtsi"
11 #include "tegra20-cpu-opp-microvolt.dtsi"
15 compatible = "acer,picasso", "nvidia,tegra20";
[all …]
Dtegra20-asus-tf101.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/atmel-maxtouch.h>
5 #include <dt-bindings/input/gpio-keys.h>
6 #include <dt-bindings/input/input.h>
7 #include <dt-bindings/thermal/thermal.h>
9 #include "tegra20.dtsi"
10 #include "tegra20-cpu-opp.dtsi"
11 #include "tegra20-cpu-opp-microvolt.dtsi"
15 compatible = "asus,tf101", "nvidia,tegra20";
[all …]
Dtegra30.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra30-car.h>
3 #include <dt-bindings/gpio/tegra-gpio.h>
4 #include <dt-bindings/memory/tegra30-mc.h>
5 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/soc/tegra-pmc.h>
8 #include <dt-bindings/thermal/thermal.h>
10 #include "tegra30-peripherals-opp.dtsi"
14 interrupt-parent = <&lic>;
[all …]
Dtegra114.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra114-car.h>
3 #include <dt-bindings/gpio/tegra-gpio.h>
4 #include <dt-bindings/memory/tegra114-mc.h>
5 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/soc/tegra-pmc.h>
11 interrupt-parent = <&lic>;
12 #address-cells = <1>;
13 #size-cells = <1>;
[all …]
Dtegra20-trimslice.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
5 #include "tegra20.dtsi"
6 #include "tegra20-cpu-opp.dtsi"
10 compatible = "compulab,trimslice", "nvidia,tegra20";
19 stdout-path = "serial0:115200n8";
30 vdd-supply = <&hdmi_vdd_reg>;
31 pll-supply = <&hdmi_pll_reg>;
33 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dtegra30.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra30-car.h>
3 #include <dt-bindings/gpio/tegra-gpio.h>
4 #include <dt-bindings/memory/tegra30-mc.h>
5 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/soc/tegra-pmc.h>
11 interrupt-parent = <&lic>;
12 #address-cells = <1>;
13 #size-cells = <1>;
[all …]
Dtegra114.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra114-car.h>
3 #include <dt-bindings/gpio/tegra-gpio.h>
4 #include <dt-bindings/memory/tegra114-mc.h>
5 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/soc/tegra-pmc.h>
11 interrupt-parent = <&lic>;
12 #address-cells = <1>;
13 #size-cells = <1>;
[all …]
Dtegra20-paz00.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
5 #include "tegra20.dtsi"
6 #include "tegra20-cpu-opp.dtsi"
7 #include "tegra20-cpu-opp-microvolt.dtsi"
11 compatible = "compal,paz00", "nvidia,tegra20";
21 stdout-path = "serial0:115200n8";
40 vdd-supply = <&hdmi_vdd_reg>;
41 pll-supply = <&hdmi_pll_reg>;
[all …]
Dtegra20-trimslice.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
5 #include "tegra20.dtsi"
6 #include "tegra20-cpu-opp.dtsi"
10 compatible = "compulab,trimslice", "nvidia,tegra20";
19 stdout-path = "serial0:115200n8";
30 vdd-supply = <&hdmi_vdd_reg>;
31 pll-supply = <&hdmi_pll_reg>;
33 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
[all …]
/kernel/linux/linux-6.6/drivers/clk/tegra/
Dclk-tegra20.c1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <linux/clk-provider.h>
15 #include <dt-bindings/clock/tegra20-car.h>
18 #include "clk-id.h"
444 { .dev_id = "tegra20-ac97", .dt_id = TEGRA20_CLK_AC97 },
445 { .dev_id = "tegra-apbdma", .dt_id = TEGRA20_CLK_APBDMA },
446 { .dev_id = "rtc-tegra", .dt_id = TEGRA20_CLK_RTC },
448 { .dev_id = "tegra-kbc", .dt_id = TEGRA20_CLK_KBC },
450 { .con_id = "vcp", .dev_id = "tegra-avp", .dt_id = TEGRA20_CLK_VCP },
451 { .con_id = "bsea", .dev_id = "tegra-avp", .dt_id = TEGRA20_CLK_BSEA },
[all …]

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