| /kernel/linux/linux-5.10/arch/powerpc/boot/ |
| D | pq2.c | 1 // SPDX-License-Identifier: GPL-2.0-only 12 #include "fsl-soc.h" 21 3, 2, 2, 2, 4, 4, 5, 9, 6, 11, 8, 10, 3, 12, 7, -1, 22 6, 5, 13, 2, 14, 4, 15, 9, 0, 11, 8, 10, 16, 12, 7, -1 25 /* Get various clocks from crystal frequency. 26 * Returns zero on failure and non-zero on success. 29 u32 *timebase, u32 *brgfreq) in pq2_get_clocks() argument 55 if (timebase) in pq2_get_clocks() 56 *timebase = busclk / 4; in pq2_get_clocks() 75 void pq2_set_clocks(u32 sysfreq, u32 corefreq, u32 timebase, u32 brgfreq) in pq2_set_clocks() argument [all …]
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| D | treeboot-akebono.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 10 * Copyright 2002-2005 MontaVista Software Inc. 77 /* Fixup the SD timeout frequency */ in ibm_akebono_fixups() 80 /* Disable SD high-speed mode (which seems to be broken) */ in ibm_akebono_fixups() 88 setprop(emac, "local-mac-address", in ibm_akebono_fixups() 98 const u32 *timebase; in platform_init() local 102 userdata[USERDATA_LEN - 1] = '\0'; in platform_init() 104 for (i = 0; i < userdata_len - 15; i++) { in platform_init() 105 if (strncmp(&userdata[i], "local-mac-addr=", 15) == 0) { in platform_init() 106 if (i > 0 && userdata[i - 1] != ' ') { in platform_init() [all …]
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| D | simpleboot.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * The simple platform -- for booting when firmware doesn't supply a device 28 const u32 *na, *ns, *reg, *timebase; in platform_init() local 36 /* Find the #address-cells and #size-cells properties */ in platform_init() 40 na = fdt_getprop(_dtb_start, node, "#address-cells", &size); in platform_init() 42 fatal("Cannot find #address-cells property"); in platform_init() 43 ns = fdt_getprop(_dtb_start, node, "#size-cells", &size); in platform_init() 45 fatal("Cannot find #size-cells property"); in platform_init() 48 node = fdt_node_offset_by_prop_value(_dtb_start, -1, "device_type", in platform_init() 68 /* finally, setup the timebase */ in platform_init() [all …]
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| /kernel/linux/linux-6.6/arch/powerpc/boot/ |
| D | pq2.c | 1 // SPDX-License-Identifier: GPL-2.0-only 12 #include "fsl-soc.h" 21 3, 2, 2, 2, 4, 4, 5, 9, 6, 11, 8, 10, 3, 12, 7, -1, 22 6, 5, 13, 2, 14, 4, 15, 9, 0, 11, 8, 10, 16, 12, 7, -1 25 /* Get various clocks from crystal frequency. 26 * Returns zero on failure and non-zero on success. 29 u32 *timebase, u32 *brgfreq) in pq2_get_clocks() argument 55 if (timebase) in pq2_get_clocks() 56 *timebase = busclk / 4; in pq2_get_clocks() 75 void pq2_set_clocks(u32 sysfreq, u32 corefreq, u32 timebase, u32 brgfreq) in pq2_set_clocks() argument [all …]
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| D | treeboot-akebono.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 10 * Copyright 2002-2005 MontaVista Software Inc. 77 /* Fixup the SD timeout frequency */ in ibm_akebono_fixups() 80 /* Disable SD high-speed mode (which seems to be broken) */ in ibm_akebono_fixups() 88 setprop(emac, "local-mac-address", in ibm_akebono_fixups() 98 const u32 *timebase; in platform_init() local 102 userdata[USERDATA_LEN - 1] = '\0'; in platform_init() 104 for (i = 0; i < userdata_len - 15; i++) { in platform_init() 105 if (strncmp(&userdata[i], "local-mac-addr=", 15) == 0) { in platform_init() 106 if (i > 0 && userdata[i - 1] != ' ') { in platform_init() [all …]
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| D | simpleboot.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * The simple platform -- for booting when firmware doesn't supply a device 28 const u32 *na, *ns, *reg, *timebase; in platform_init() local 36 /* Find the #address-cells and #size-cells properties */ in platform_init() 40 na = fdt_getprop(_dtb_start, node, "#address-cells", &size); in platform_init() 42 fatal("Cannot find #address-cells property"); in platform_init() 43 ns = fdt_getprop(_dtb_start, node, "#size-cells", &size); in platform_init() 45 fatal("Cannot find #size-cells property"); in platform_init() 48 node = fdt_node_offset_by_prop_value(_dtb_start, -1, "device_type", in platform_init() 68 /* finally, setup the timebase */ in platform_init() [all …]
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| D | treeboot-currituck.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 9 * Copyright 2002-2005 MontaVista Software Inc. 67 if (getprop(devp, "dma-ranges", dma_ranges, sizeof(dma_ranges)) < 0) { in ibm_currituck_fixups() 68 printf("%s: Failed to get dma-ranges\r\n", __func__); in ibm_currituck_fixups() 75 setprop(devp, "dma-ranges", dma_ranges, sizeof(dma_ranges)); in ibm_currituck_fixups() 85 const u32 *timebase; in platform_init() local 92 avail_ram = end_of_ram - (unsigned long)_end; in platform_init() 103 node = fdt_node_offset_by_prop_value(_dtb_start, -1, "device_type", in platform_init() 107 timebase = fdt_getprop(_dtb_start, node, "timebase-frequency", &size); in platform_init() 108 if (timebase && (size == 4)) in platform_init() [all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/watchdog/ |
| D | xlnx,xps-timebase-wdt.yaml | 1 # SPDX-License-Identifier: GPL-2.0-or-later OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/watchdog/xlnx,xps-timebase-wdt.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Shubhrajyoti Datta <shubhrajyoti.datta@amd.com> 11 - Srinivas Neeli <srinivas.neeli@amd.com> 14 The Timebase watchdog timer(WDT) is a free-running 32 bit counter. 15 WDT uses a dual-expiration architecture. After one expiration of 22 - $ref: watchdog.yaml# 27 - xlnx,xps-timebase-wdt-1.01.a [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/watchdog/ |
| D | of-xilinx-wdt.txt | 1 Xilinx AXI/PLB soft-core watchdog Device Tree Bindings 2 --------------------------------------------------------- 5 - compatible : Should be "xlnx,xps-timebase-wdt-1.00.a" or 6 "xlnx,xps-timebase-wdt-1.01.a". 7 - reg : Physical base address and size 10 - clocks : Input clock specifier. Refer to common clock 12 - clock-frequency : Frequency of clock in Hz 13 - xlnx,wdt-enable-once : 0 - Watchdog can be restarted 14 1 - Watchdog can be enabled just once 15 - xlnx,wdt-interval : Watchdog timeout interval in 2^<val> clock cycles, [all …]
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| /kernel/linux/linux-5.10/arch/powerpc/boot/dts/ |
| D | iss4xx-mpic.dts | 15 /dts-v1/; 20 #address-cells = <2>; 21 #size-cells = <1>; 22 model = "ibm,iss-4xx"; 23 compatible = "ibm,iss-4xx"; 24 dcr-parent = <&{/cpus/cpu@0}>; 31 #address-cells = <1>; 32 #size-cells = <0>; 38 clock-frequency = <100000000>; // 100Mhz :-) 39 timebase-frequency = <100000000>; [all …]
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| D | ps3.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 9 /dts-v1/; 14 #size-cells = <2>; 15 #address-cells = <2>; 33 * dtc expects a clock-frequency and timebase-frequency entries, so 38 * threads is with an ibm,ppc-interrupt-server#s entry. We'll put one 43 #size-cells = <0>; 44 #address-cells = <1>; 49 ibm,ppc-interrupt-server#s = <0x0 0x1>; 50 clock-frequency = <0>; [all …]
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| /kernel/linux/linux-6.6/arch/powerpc/boot/dts/ |
| D | iss4xx-mpic.dts | 15 /dts-v1/; 20 #address-cells = <2>; 21 #size-cells = <1>; 22 model = "ibm,iss-4xx"; 23 compatible = "ibm,iss-4xx"; 24 dcr-parent = <&{/cpus/cpu@0}>; 31 #address-cells = <1>; 32 #size-cells = <0>; 38 clock-frequency = <100000000>; // 100Mhz :-) 39 timebase-frequency = <100000000>; [all …]
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| D | ps3.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 9 /dts-v1/; 14 #size-cells = <2>; 15 #address-cells = <2>; 33 * dtc expects a clock-frequency and timebase-frequency entries, so 38 * threads is with an ibm,ppc-interrupt-server#s entry. We'll put one 43 #size-cells = <0>; 44 #address-cells = <1>; 49 ibm,ppc-interrupt-server#s = <0x0 0x1>; 50 clock-frequency = <0>; [all …]
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| /kernel/linux/linux-6.6/arch/powerpc/platforms/8xx/ |
| D | m8xx_setup.c | 1 // SPDX-License-Identifier: GPL-2.0 45 /* The cpu node should have timebase and clock frequency properties */ in get_freq() 61 /* The decrementer counts at the system (internal) clock frequency divided by 71 out_be32(&mpc8xx_immr->im_clkrstk.cark_sccrk, ~KAPWR_KEY); in mpc8xx_calibrate_decr() 72 out_be32(&mpc8xx_immr->im_clkrstk.cark_sccrk, KAPWR_KEY); in mpc8xx_calibrate_decr() 75 setbits32(&mpc8xx_immr->im_clkrst.car_sccr, 0x02000000); in mpc8xx_calibrate_decr() 77 /* Processor frequency is MHz. in mpc8xx_calibrate_decr() 80 if (!get_freq("clock-frequency", &ppc_proc_freq)) in mpc8xx_calibrate_decr() 81 printk(KERN_ERR "WARNING: Estimating processor frequency " in mpc8xx_calibrate_decr() 85 printk("Decrementer Frequency = 0x%lx\n", ppc_tb_freq); in mpc8xx_calibrate_decr() [all …]
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| /kernel/linux/linux-6.6/arch/powerpc/boot/dts/fsl/ |
| D | mpc8641si-pre.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later 5 * Copyright 2016 Elettra-Sincrotrone Trieste S.C.p.A. 8 /dts-v1/; 11 #address-cells = <1>; 12 #size-cells = <1>; 13 interrupt-parent = <&mpic>; 27 #address-cells = <1>; 28 #size-cells = <0>; 33 d-cache-line-size = <32>; 34 i-cache-line-size = <32>; [all …]
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| /kernel/linux/linux-5.10/arch/powerpc/boot/dts/fsl/ |
| D | mpc8641si-pre.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later 5 * Copyright 2016 Elettra-Sincrotrone Trieste S.C.p.A. 8 /dts-v1/; 11 #address-cells = <1>; 12 #size-cells = <1>; 13 interrupt-parent = <&mpic>; 27 #address-cells = <1>; 28 #size-cells = <0>; 33 d-cache-line-size = <32>; 34 i-cache-line-size = <32>; [all …]
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| /kernel/linux/linux-5.10/arch/powerpc/kernel/ |
| D | time.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 8 * Converted for 64-bit by Mike Corrigan (mikejc@us.ibm.com) 11 * to make clock more stable (2.4.0-test5). The only thing 20 * - improve precision and reproducibility of timebase frequency 22 * - for astronomical applications: add a new function to get 26 * 1997-09-10 Updated NTP code according to technical memorandum Jan '96 49 #include <linux/posix-timers.h> 72 #include <asm/asm-prototypes.h> 81 .name = "timebase", 145 * Factor for converting from cputime_t (timebase ticks) to [all …]
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| /kernel/linux/linux-5.10/arch/powerpc/platforms/8xx/ |
| D | m8xx_setup.c | 1 // SPDX-License-Identifier: GPL-2.0 42 /* per-board overridable init_internal_rtc() function. */ 49 clrbits16(&sys_tmr->sit_rtcsc, (RTCSC_SIE | RTCSC_ALE)); in init_internal_rtc() 52 setbits16(&sys_tmr->sit_rtcsc, (RTCSC_RTF | RTCSC_RTE)); in init_internal_rtc() 62 /* The cpu node should have timebase and clock frequency properties */ in get_freq() 78 /* The decrementer counts at the system (internal) clock frequency divided by 94 out_be32(&clk_r1->cark_sccrk, ~KAPWR_KEY); in mpc8xx_calibrate_decr() 95 out_be32(&clk_r1->cark_sccrk, KAPWR_KEY); in mpc8xx_calibrate_decr() 100 setbits32(&clk_r2->car_sccr, 0x02000000); in mpc8xx_calibrate_decr() 103 /* Processor frequency is MHz. in mpc8xx_calibrate_decr() [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/riscv/ |
| D | cpus.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR MIT) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: RISC-V bindings for 'cpus' DT nodes 10 - Paul Walmsley <paul.walmsley@sifive.com> 11 - Palmer Dabbelt <palmer@sifive.com> 14 This document uses some terminology common to the RISC-V community 18 mandated by the RISC-V ISA: a PC and some registers. This 28 - items: 29 - enum: [all …]
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| /kernel/linux/linux-5.10/arch/riscv/kernel/ |
| D | time.c | 1 // SPDX-License-Identifier: GPL-2.0-only 23 if (!cpu || of_property_read_u32(cpu, "timebase-frequency", &prop)) in time_init() 24 panic(KERN_WARNING "RISC-V system with no 'timebase-frequency' in DTS\n"); in time_init() 39 cs->vdso_clock_mode = VDSO_CLOCKMODE_ARCHTIMER; in clocksource_arch_init() 41 cs->vdso_clock_mode = VDSO_CLOCKMODE_NONE; in clocksource_arch_init()
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/timer/ |
| D | sifive,clint.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Palmer Dabbelt <palmer@dabbelt.com> 11 - Anup Patel <anup.patel@wdc.com> 14 SiFive (and other RISC-V) SOCs include an implementation of the SiFive 15 Core Local Interruptor (CLINT) for M-mode timer and M-mode inter-processor 16 interrupts. It directly connects to the timer and inter-processor interrupt 17 lines of various HARTs (or CPUs) so RISC-V per-HART (or per-CPU) local 19 The clock frequency of CLINT is specified via "timebase-frequency" DT [all …]
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| /kernel/linux/linux-6.6/arch/powerpc/kernel/ |
| D | time.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 8 * Converted for 64-bit by Mike Corrigan (mikejc@us.ibm.com) 11 * to make clock more stable (2.4.0-test5). The only thing 20 * - improve precision and reproducibility of timebase frequency 22 * - for astronomical applications: add a new function to get 26 * 1997-09-10 Updated NTP code according to technical memorandum Jan '96 50 #include <linux/posix-timers.h> 82 .name = "timebase", 155 * or if that doesn't exist return the timebase value passed in. 179 deltascaled = nowscaled - acct->startspurr; in vtime_delta_scaled() [all …]
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| /kernel/linux/linux-6.6/arch/riscv/kernel/ |
| D | time.c | 1 // SPDX-License-Identifier: GPL-2.0-only 28 if (!cpu || of_property_read_u32(cpu, "timebase-frequency", &prop)) in time_init() 29 panic("RISC-V system with no 'timebase-frequency' in DTS\n"); in time_init() 37 panic("RISC-V ACPI system with no RHCT table\n"); in time_init() 39 riscv_timebase = rhct->time_base_freq; in time_init()
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| /kernel/linux/linux-6.6/drivers/pwm/ |
| D | pwm-img.c | 1 // SPDX-License-Identifier: GPL-2.0-only 5 * Copyright (c) 2014-2015, Imagination Technologies 7 * Based on drivers/pwm/pwm-tegra.c, Copyright (c) 2010, NVIDIA Corporation 43 * PWM period is specified with a timebase register, 45 * specified in step periods, in the [0, $timebase] range. 46 * In other words, the timebase imposes the duty cycle 47 * resolution. Therefore, let's constraint the timebase to 49 * Imposing a minimum timebase, will impose a maximum PWM frequency. 83 writel(val, imgchip->base + reg); in img_pwm_writel() 88 return readl(imgchip->base + reg); in img_pwm_readl() [all …]
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| /kernel/linux/linux-5.10/drivers/pwm/ |
| D | pwm-img.c | 1 // SPDX-License-Identifier: GPL-2.0-only 5 * Copyright (c) 2014-2015, Imagination Technologies 7 * Based on drivers/pwm/pwm-tegra.c, Copyright (c) 2010, NVIDIA Corporation 43 * PWM period is specified with a timebase register, 45 * specified in step periods, in the [0, $timebase] range. 46 * In other words, the timebase imposes the duty cycle 47 * resolution. Therefore, let's constraint the timebase to 49 * Imposing a minimum timebase, will impose a maximum PWM frequency. 83 writel(val, chip->base + reg); in img_pwm_writel() 89 return readl(chip->base + reg); in img_pwm_readl() [all …]
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