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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/timer/
Driscv,timer.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/timer/riscv,timer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: RISC-V timer
10 - Anup Patel <anup@brainfault.org>
13 RISC-V platforms always have a RISC-V timer device for the supervisor-mode
14 based on the time CSR defined by the RISC-V privileged specification. The
15 timer interrupts of this device are configured using the RISC-V SBI Time
16 extension or the RISC-V Sstc extension.
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/arm/
Didle-states.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/arm/idle-states.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
14 1 - Introduction
18 where cores can be put in different low-power states (ranging from simple wfi
19 to power gating) according to OS PM policies. The CPU states representing the
20 range of dynamic idle states that a processor can enter at run-time, can be
25 power states an ARM CPU can be put into are identified by the following list:
[all …]
/kernel/linux/linux-6.6/drivers/clocksource/
Dtimer-riscv.c1 // SPDX-License-Identifier: GPL-2.0
6 * All RISC-V systems have a timer attached to every hart. These timers can
11 #define pr_fmt(fmt) "riscv-timer: " fmt
16 #include <linux/cpu.h>
22 #include <linux/io-64-nonatomic-lo-hi.h>
25 #include <clocksource/timer-riscv.h>
89 static int riscv_timer_starting_cpu(unsigned int cpu) in riscv_timer_starting_cpu() argument
91 struct clock_event_device *ce = per_cpu_ptr(&riscv_clock_event, cpu); in riscv_timer_starting_cpu()
93 ce->cpumask = cpumask_of(cpu); in riscv_timer_starting_cpu()
94 ce->irq = riscv_clock_event_irq; in riscv_timer_starting_cpu()
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/cpu/
Didle-states.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/cpu/idle-states.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
11 - Anup Patel <anup@brainfault.org>
15 1 - Introduction
18 ARM and RISC-V systems contain HW capable of managing power consumption
19 dynamically, where cores can be put in different low-power states (ranging
20 from simple wfi to power gating) according to OS PM policies. The CPU states
[all …]
/kernel/linux/linux-6.6/drivers/firmware/psci/
Dpsci_checker.c1 // SPDX-License-Identifier: GPL-2.0-only
11 #include <linux/cpu.h>
31 static int tos_resident_cpu = -1;
42 * "enable-method" property of each CPU in the DT, but given that there is no
43 * arch-specific way to check this, we assume that the DT is sensible.
47 int migrate_type = -1; in psci_ops_check()
48 int cpu; in psci_ops_check() local
52 return -EOPNOTSUPP; in psci_ops_check()
61 for_each_online_cpu(cpu) in psci_ops_check()
62 if (psci_tos_resident_on(cpu)) { in psci_ops_check()
[all …]
/kernel/linux/linux-5.10/drivers/firmware/psci/
Dpsci_checker.c1 // SPDX-License-Identifier: GPL-2.0-only
11 #include <linux/cpu.h>
31 static int tos_resident_cpu = -1;
42 * "enable-method" property of each CPU in the DT, but given that there is no
43 * arch-specific way to check this, we assume that the DT is sensible.
47 int migrate_type = -1; in psci_ops_check()
48 int cpu; in psci_ops_check() local
52 return -EOPNOTSUPP; in psci_ops_check()
61 for_each_online_cpu(cpu) in psci_ops_check()
62 if (psci_tos_resident_on(cpu)) { in psci_ops_check()
[all …]
/kernel/liteos_m/components/power/
Dlos_pm.h2 * Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
3 * Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
42 * Pm error code: Invalid low-power mode.
105 * Pm error code: Deep and shutdown must implement the Tick Timer related interface.
144 …UINT32 (*suspend)(UINT32 mode); /* The device enters low-power consumption, Unlocked task scheduli…
145 …VOID (*resume)(UINT32 mode); /* The device exits from low-power consumption, Unlocked task sche…
149 /* Low-power timer related implementation functions.
150 * The function is not NULL, the low-power timer is enabled.
152 UINT32 freq; /* The frequency of the low-power timer */
153 VOID (*timerStart)(UINT64); /* Start the low-power timer and set the response period */
[all …]
/kernel/linux/linux-6.6/kernel/time/
Dtimer.c1 // SPDX-License-Identifier: GPL-2.0
7 * 1997-01-28 Modified by Finn Arne Gangstad to make timers scale better.
9 * 1997-09-10 Updated NTP code according to technical memorandum Jan '96
11 * 1998-12-24 Fixed a xtime SMP race (we need the xtime_lock rw spinlock to
14 * 1999-03-10 Improved NTP compatibility by Ulrich Windl
15 * 2002-05-31 Move sys_sysinfo here and make its locking sane, Robert Love
16 * 2000-10-05 Implemented scalable SMP per-CPU timer handling.
33 #include <linux/posix-timers.h>
34 #include <linux/cpu.h>
55 #include "tick-internal.h"
[all …]
Dtick-broadcast.c1 // SPDX-License-Identifier: GPL-2.0
3 * This file contains functions which emulate a local clock-event
6 * Copyright(C) 2005-2006, Thomas Gleixner <tglx@linutronix.de>
7 * Copyright(C) 2005-2007, Red Hat, Inc., Ingo Molnar
8 * Copyright(C) 2006-2007, Timesys Corp., Thomas Gleixner
10 #include <linux/cpu.h>
20 #include "tick-internal.h"
24 * timer stops in C3 state.
39 static void tick_broadcast_clear_oneshot(int cpu);
42 static void tick_broadcast_oneshot_offline(unsigned int cpu);
[all …]
/kernel/linux/linux-6.6/kernel/futex/
Dwaitwake.c1 // SPDX-License-Identifier: GPL-2.0-or-later
27 * In futex wake up scenarios where no tasks are blocked on a futex, taking
33 * CPU 0 CPU 1
39 * sys_futex(WAKE, futex);
49 * This would cause the waiter on CPU 0 to wait forever because it
57 * CPU 0 CPU 1
63 * smp_mb(); (A) <-- paired with -.
69 * | sys_futex(WAKE, futex);
72 * `--------> smp_mb(); (B)
79 * waiters--; (b) unlock(hash_bucket(futex));
[all …]
/kernel/linux/linux-6.6/lib/
DKconfig.kfence1 # SPDX-License-Identifier: GPL-2.0-only
7 bool "KFENCE: low-overhead sampling-based memory safety error detector"
12 KFENCE is a low-overhead sampling-based detector of heap out-of-bounds
13 access, use-after-free, and invalid-free errors. KFENCE is designed
17 See <file:Documentation/dev-tools/kfence.rst> for more details.
23 environments. If your kernel targets production use, and cannot
37 setting "kfence.sample_interval" to a non-zero value enables KFENCE.
49 bool "Use a deferrable timer to trigger allocations"
51 Use a deferrable timer to trigger allocations. This avoids forcing
52 CPU wake-ups if the system is idle, at the risk of a less predictable
[all …]
/kernel/linux/linux-6.6/kernel/rcu/
Dtree_nocb.h1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Read-Copy Update mechanism for mutual exclusion (tree-based version)
4 * Internal non-public definitions that provide either classic
21 return lockdep_is_held(&rdp->nocb_lock); in rcu_lockdep_is_held_nocb()
27 if (!rdp->nocb_cb_kthread || !rdp->nocb_gp_kthread) in rcu_current_is_nocb_kthread()
30 if (current == rdp->nocb_cb_kthread || current == rdp->nocb_gp_kthread) in rcu_current_is_nocb_kthread()
37 * Offload callback processing from the boot-time-specified set of CPUs
39 * created that pull the callbacks from the corresponding CPU, wait for
43 * invoke callbacks. Each GP kthread invokes its own CBs. The no-CBs CPUs
46 * in which case each kthread actively polls its CPU. (Which isn't so great
[all …]
/kernel/linux/linux-6.6/arch/arm64/kvm/
Darm.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2012 - Virtual Open Systems and Columbia University
9 #include <linux/entry-kvm.h>
77 if (cap->flags) in kvm_vm_ioctl_enable_cap()
78 return -EINVAL; in kvm_vm_ioctl_enable_cap()
80 switch (cap->cap) { in kvm_vm_ioctl_enable_cap()
84 &kvm->arch.flags); in kvm_vm_ioctl_enable_cap()
87 mutex_lock(&kvm->lock); in kvm_vm_ioctl_enable_cap()
88 if (!system_supports_mte() || kvm->created_vcpus) { in kvm_vm_ioctl_enable_cap()
89 r = -EINVAL; in kvm_vm_ioctl_enable_cap()
[all …]
/kernel/linux/linux-5.10/drivers/usb/musb/
Dtusb6010.c1 // SPDX-License-Identifier: GPL-2.0
9 * - Driver assumes that interface to external host (main CPU) is
24 #include <linux/dma-mapping.h>
46 void __iomem *tbase = musb->ctrl_base; in tusb_get_revision()
63 void __iomem *tbase = musb->ctrl_base; in tusb_print_revision()
66 rev = musb->tusb_revision; in tusb_print_revision()
91 * Workaround for spontaneous WBUS wake-up issue #2 for tusb3.0.
96 void __iomem *tbase = musb->ctrl_base; in tusb_wbus_quirk()
109 dev_dbg(musb->controller, "Enabled tusb wbus quirk ctrl %08x ena %08x\n", in tusb_wbus_quirk()
118 dev_dbg(musb->controller, "Disabled tusb wbus quirk ctrl %08x ena %08x\n", in tusb_wbus_quirk()
[all …]
/kernel/linux/linux-6.6/kernel/sched/
Ddeadline.c1 // SPDX-License-Identifier: GPL-2.0
25 * guard against timer DoS.
73 return &rq->dl; in dl_rq_of_se()
78 return !RB_EMPTY_NODE(&dl_se->rb_node); in on_dl_rq()
84 return dl_se->pi_se; in pi_of()
108 return &cpu_rq(i)->rd->dl_bw; in dl_bw_of()
113 struct root_domain *rd = cpu_rq(i)->rd; in dl_bw_cpus()
119 if (cpumask_subset(rd->span, cpu_active_mask)) in dl_bw_cpus()
120 return cpumask_weight(rd->span); in dl_bw_cpus()
124 for_each_cpu_and(i, rd->span, cpu_active_mask) in dl_bw_cpus()
[all …]
/kernel/linux/linux-5.10/kernel/sched/
Ddeadline.c1 // SPDX-License-Identifier: GPL-2.0
40 return &rq->dl; in dl_rq_of_se()
45 return !RB_EMPTY_NODE(&dl_se->rb_node); in on_dl_rq()
51 return dl_se->pi_se; in pi_of()
75 return &cpu_rq(i)->rd->dl_bw; in dl_bw_of()
80 struct root_domain *rd = cpu_rq(i)->rd; in dl_bw_cpus()
86 if (cpumask_subset(rd->span, cpu_active_mask)) in dl_bw_cpus()
87 return cpumask_weight(rd->span); in dl_bw_cpus()
91 for_each_cpu_and(i, rd->span, cpu_active_mask) in dl_bw_cpus()
99 struct root_domain *rd = cpu_rq(i)->rd; in __dl_bw_capacity()
[all …]
/kernel/linux/linux-5.10/kernel/power/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
9 suspend-to-RAM state (e.g. the ACPI S3 state).
30 user-space before invoking suspend. There's a run-time switch
32 This setting changes the default for the run-tim switch. Say Y
60 for suspend states like suspend-to-RAM (STR) often don't work very
72 <file:Documentation/power/swsusp-and-swap-files.rst>).
75 meantime you cannot use the swap partition(s)/file(s) involved in
100 The default resume partition is the partition that the suspend-
101 to-disk implementation will look for a suspended disk image.
136 non-zero numbered CPU, it may define ARCH_SUSPEND_NONZERO_CPU. This
[all …]
/kernel/linux/linux-5.10/drivers/power/reset/
Dat91-sama5d2_shdwc.c2 * Atmel SAMA5D2-Compatible Shutdown Controller (SHDWC) driver.
8 * Evolved from driver at91-poweroff.c.
15 * - addition to status of other wake-up inputs [1 - 15]
16 * - Analog Comparator wake-up alarm
17 * - Serial RX wake-up alarm
18 * - low power debouncer
50 #define AT91_SHDW_WUIR 0x0c /* Shutdown Wake-up Inputs Register */
58 #define SHDW_WK_PIN(reg, cfg) ((reg) & AT91_SHDW_WKUPIS((cfg)->wkup_pin_input))
59 #define SHDW_RTCWK(reg, cfg) (((reg) >> ((cfg)->sr_rtcwk_shift)) & 0x1)
60 #define SHDW_RTTWK(reg, cfg) (((reg) >> ((cfg)->sr_rttwk_shift)) & 0x1)
[all …]
/kernel/linux/linux-5.10/arch/arm64/kvm/
Darm.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2012 - Virtual Open Systems and Columbia University
84 if (cap->flags) in kvm_vm_ioctl_enable_cap()
85 return -EINVAL; in kvm_vm_ioctl_enable_cap()
87 switch (cap->cap) { in kvm_vm_ioctl_enable_cap()
90 kvm->arch.return_nisv_io_abort_to_user = true; in kvm_vm_ioctl_enable_cap()
93 r = -EINVAL; in kvm_vm_ioctl_enable_cap()
109 * Although this is a per-CPU feature, we make it global because in set_default_csv2()
116 kvm->arch.pfr0_csv2 = 1; in set_default_csv2()
120 * kvm_arch_init_vm - initializes a VM data structure
[all …]
/kernel/linux/linux-6.6/Documentation/dev-tools/
Dkfence.rst1 .. SPDX-License-Identifier: GPL-2.0
4 Kernel Electric-Fence (KFENCE)
7 Kernel Electric-Fence (KFENCE) is a low-overhead sampling-based memory safety
8 error detector. KFENCE detects heap out-of-bounds access, use-after-free, and
9 invalid-free errors.
15 non-production test workloads. One way to quickly achieve a large enough total
19 -----
26 ``kfence.sample_interval`` to non-zero value), configure the kernel with::
44 The sample interval controls a timer that sets up KFENCE allocations. By
45 default, to keep the real sample interval predictable, the normal timer also
[all …]
/kernel/linux/linux-6.6/kernel/power/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
9 suspend-to-RAM state (e.g. the ACPI S3 state).
30 user-space before invoking suspend. There's a run-time switch
32 This setting changes the default for the run-tim switch. Say Y
60 for suspend states like suspend-to-RAM (STR) often don't work very
72 <file:Documentation/power/swsusp-and-swap-files.rst>).
75 meantime you cannot use the swap partition(s)/file(s) involved in
100 The default resume partition is the partition that the suspend-
101 to-disk implementation will look for a suspended disk image.
135 non-zero numbered CPU, it may define ARCH_SUSPEND_NONZERO_CPU. This
[all …]
/kernel/linux/linux-6.6/drivers/usb/musb/
Dtusb6010.c1 // SPDX-License-Identifier: GPL-2.0
9 * - Driver assumes that interface to external host (main CPU) is
27 #include <linux/dma-mapping.h>
51 void __iomem *tbase = musb->ctrl_base; in tusb_get_revision()
68 void __iomem *tbase = musb->ctrl_base; in tusb_print_revision()
71 rev = musb->tusb_revision; in tusb_print_revision()
96 * Workaround for spontaneous WBUS wake-up issue #2 for tusb3.0.
101 void __iomem *tbase = musb->ctrl_base; in tusb_wbus_quirk()
114 dev_dbg(musb->controller, "Enabled tusb wbus quirk ctrl %08x ena %08x\n", in tusb_wbus_quirk()
123 dev_dbg(musb->controller, "Disabled tusb wbus quirk ctrl %08x ena %08x\n", in tusb_wbus_quirk()
[all …]
/kernel/linux/linux-5.10/kernel/time/
Dtimer.c1 // SPDX-License-Identifier: GPL-2.0
7 * 1997-01-28 Modified by Finn Arne Gangstad to make timers scale better.
9 * 1997-09-10 Updated NTP code according to technical memorandum Jan '96
11 * 1998-12-24 Fixed a xtime SMP race (we need the xtime_lock rw spinlock to
14 * 1999-03-10 Improved NTP compatibility by Ulrich Windl
15 * 2002-05-31 Move sys_sysinfo here and make its locking sane, Robert Love
16 * 2000-10-05 Implemented scalable SMP per-CPU timer handling.
33 #include <linux/posix-timers.h>
34 #include <linux/cpu.h>
54 #include "tick-internal.h"
[all …]
/kernel/linux/linux-6.6/drivers/power/reset/
Dat91-sama5d2_shdwc.c2 * Atmel SAMA5D2-Compatible Shutdown Controller (SHDWC) driver.
8 * Evolved from driver at91-poweroff.c.
15 * - addition to status of other wake-up inputs [1 - 15]
16 * - Analog Comparator wake-up alarm
17 * - Serial RX wake-up alarm
18 * - low power debouncer
50 #define AT91_SHDW_WUIR 0x0c /* Shutdown Wake-up Inputs Register */
58 #define SHDW_WK_PIN(reg, cfg) ((reg) & AT91_SHDW_WKUPIS((cfg)->wkup_pin_input))
59 #define SHDW_RTCWK(reg, cfg) (((reg) >> ((cfg)->sr_rtcwk_shift)) & 0x1)
60 #define SHDW_RTTWK(reg, cfg) (((reg) >> ((cfg)->sr_rttwk_shift)) & 0x1)
[all …]
/kernel/linux/linux-5.10/Documentation/admin-guide/pm/
Dcpuidle.rst1 .. SPDX-License-Identifier: GPL-2.0
5 .. |cpufreq| replace:: :doc:`CPU Performance Scaling <cpufreq>`
8 CPU Idle Time Management
27 CPU idle time management is an energy-efficiency feature concerned about using
31 ------------
33 CPU idle time management operates on CPUs as seen by the *CPU scheduler* (that
37 software as individual single-core processors. In other words, a CPU is an
43 program) at a time, it is a CPU. In that case, if the hardware is asked to
46 Second, if the processor is multi-core, each core in it is able to follow at
61 Finally, each core in a multi-core processor may be able to follow more than one
[all …]

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