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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/mmc/
Dfsl-imx-esdhc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mmc/fsl-imx-esdhc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shawn Guo <shawnguo@kernel.org>
13 - $ref: "mmc-controller.yaml"
20 by mmc.txt and the properties used by the sdhci-esdhc-imx driver.
25 - enum:
26 - fsl,imx25-esdhc
27 - fsl,imx35-esdhc
[all …]
/kernel/linux/linux-6.6/drivers/mmc/host/
Drenesas_sdhi_core.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2015-19 Renesas Electronics Corporation
6 * Copyright (C) 2016-19 Sang Engineering, Wolfram Sang
7 * Copyright (C) 2016-17 Horms Solutions, Simon Horman
13 * Copyright 2004-2005 Phil Blundell
14 * Copyright 2007-2008 OpenedHand Ltd.
28 #include <linux/mmc/slot-gpio.h>
31 #include <linux/pinctrl/pinctrl-state.h>
95 struct mmc_host *mmc = host->mmc; in renesas_sdhi_clk_enable()
99 ret = clk_prepare_enable(priv->clk_cd); in renesas_sdhi_clk_enable()
[all …]
Dsdhci_am654.c1 // SPDX-License-Identifier: GPL-2.0
3 * sdhci_am654.c - SDHCI driver for TI's AM654 SOCs
5 * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com
18 #include "sdhci-cqhci.h"
19 #include "sdhci-pltfm.h"
88 #define SDHCI_AM654_AUTOSUSPEND_DELAY -1
107 [MMC_TIMING_LEGACY] = {"ti,otap-del-sel-legacy",
108 "ti,itap-del-sel-legacy",
110 [MMC_TIMING_MMC_HS] = {"ti,otap-del-sel-mmc-hs",
111 "ti,itap-del-sel-mmc-hs",
[all …]
Dsdhci-esdhc-imx.c1 // SPDX-License-Identifier: GPL-2.0
5 * derived from the OF-version.
23 #include <linux/mmc/slot-gpio.h>
28 #include "sdhci-cqhci.h"
29 #include "sdhci-pltfm.h"
30 #include "sdhci-esdhc.h"
70 /* Tuning bits */
82 #define ESDHC_TUNE_CTRL_MAX ((1 << 7) - 1)
106 /* NOTE: the minimum valid tuning start tap for mx6sl is 1 */
140 * open ended multi-blk IO. Otherwise the TC INT wouldn't
[all …]
Dsdhci-tegra.c1 // SPDX-License-Identifier: GPL-2.0-only
9 #include <linux/dma-mapping.h>
20 #include <linux/mmc/slot-gpio.h>
32 #include "sdhci-cqhci.h"
33 #include "sdhci-pltfm.h"
192 const struct sdhci_tegra_soc_data *soc_data = tegra_host->soc_data; in tegra_sdhci_readw()
194 if (unlikely((soc_data->nvquirks & NVQUIRK_FORCE_SDHCI_SPEC_200) && in tegra_sdhci_readw()
200 return readw(host->ioaddr + reg); in tegra_sdhci_readw()
213 pltfm_host->xfer_mode_shadow = val; in tegra_sdhci_writew()
216 writel((val << 16) | pltfm_host->xfer_mode_shadow, in tegra_sdhci_writew()
[all …]
/kernel/linux/linux-5.10/drivers/mmc/host/
Drenesas_sdhi_core.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2015-19 Renesas Electronics Corporation
6 * Copyright (C) 2016-19 Sang Engineering, Wolfram Sang
7 * Copyright (C) 2016-17 Horms Solutions, Simon Horman
13 * Copyright 2004-2005 Phil Blundell
14 * Copyright 2007-2008 OpenedHand Ltd.
30 #include <linux/mmc/slot-gpio.h>
35 #include <linux/pinctrl/pinctrl-state.h>
87 struct mmc_host *mmc = host->mmc; in renesas_sdhi_clk_enable()
91 ret = clk_prepare_enable(priv->clk_cd); in renesas_sdhi_clk_enable()
[all …]
Dsdhci-tegra.c1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <linux/dma-mapping.h>
23 #include <linux/mmc/slot-gpio.h>
27 #include "sdhci-cqhci.h"
28 #include "sdhci-pltfm.h"
181 const struct sdhci_tegra_soc_data *soc_data = tegra_host->soc_data; in tegra_sdhci_readw()
183 if (unlikely((soc_data->nvquirks & NVQUIRK_FORCE_SDHCI_SPEC_200) && in tegra_sdhci_readw()
189 return readw(host->ioaddr + reg); in tegra_sdhci_readw()
202 pltfm_host->xfer_mode_shadow = val; in tegra_sdhci_writew()
205 writel((val << 16) | pltfm_host->xfer_mode_shadow, in tegra_sdhci_writew()
[all …]
Dsdhci-esdhc-imx.c1 // SPDX-License-Identifier: GPL-2.0
5 * derived from the OF-version.
23 #include <linux/mmc/slot-gpio.h>
27 #include <linux/platform_data/mmc-esdhc-imx.h>
29 #include "sdhci-cqhci.h"
30 #include "sdhci-pltfm.h"
31 #include "sdhci-esdhc.h"
71 /* Tuning bits */
83 #define ESDHC_TUNE_CTRL_MAX ((1 << 7) - 1)
102 /* NOTE: the minimum valid tuning start tap for mx6sl is 1 */
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/mmc/
Dfsl-imx-esdhc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mmc/fsl-imx-esdhc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shawn Guo <shawnguo@kernel.org>
13 - $ref: sdhci-common.yaml#
20 by mmc.txt and the properties used by the sdhci-esdhc-imx driver.
25 - enum:
26 - fsl,imx25-esdhc
27 - fsl,imx35-esdhc
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/freescale/
Dimx8ulp.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/imx8ulp-clock.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/power/imx8ulp-power.h>
10 #include <dt-bindings/thermal/thermal.h>
12 #include "imx8ulp-pinfunc.h"
15 interrupt-parent = <&gic>;
16 #address-cells = <2>;
17 #size-cells = <2>;
[all …]
Dimx93.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/imx93-clock.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/power/fsl,imx93-power.h>
11 #include <dt-bindings/thermal/thermal.h>
13 #include "imx93-pinfunc.h"
16 interrupt-parent = <&gic>;
17 #address-cells = <2>;
[all …]
Dimx8-ss-conn.dtsi1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2018-2019 NXP
7 #include <dt-bindings/clock/imx8-lpcg.h>
8 #include <dt-bindings/firmware/imx/rsrc.h>
11 compatible = "simple-bus";
12 #address-cells = <1>;
13 #size-cells = <1>;
16 conn_axi_clk: clock-conn-axi {
17 compatible = "fixed-clock";
18 #clock-cells = <0>;
[all …]
Dimx8mn.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/imx8mn-clock.h>
7 #include <dt-bindings/power/imx8mn-power.h>
8 #include <dt-bindings/reset/imx8mq-reset.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/thermal/thermal.h>
14 #include "imx8mn-pinfunc.h"
17 interrupt-parent = <&gic>;
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/freescale/
Dimx8mp.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/imx8mp-clock.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/thermal/thermal.h>
12 #include "imx8mp-pinfunc.h"
15 interrupt-parent = <&gic>;
16 #address-cells = <2>;
17 #size-cells = <2>;
[all …]
Dimx8mn.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/imx8mn-clock.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/thermal/thermal.h>
12 #include "imx8mn-pinfunc.h"
15 interrupt-parent = <&gic>;
16 #address-cells = <2>;
17 #size-cells = <2>;
[all …]
Dimx8mm.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/imx8mm-clock.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/thermal/thermal.h>
12 #include "imx8mm-pinfunc.h"
15 interrupt-parent = <&gic>;
16 #address-cells = <2>;
17 #size-cells = <2>;
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/nxp/imx/
Dimx7ulp.dtsi1 // SPDX-License-Identifier: GPL-2.0+
4 * Copyright 2017-2018 NXP
8 #include <dt-bindings/clock/imx7ulp-clock.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include "imx7ulp-pinfunc.h"
15 interrupt-parent = <&intc>;
17 #address-cells = <1>;
18 #size-cells = <1>;
37 #address-cells = <1>;
[all …]
Dimxrt1050.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include "../../armv7-m.dtsi"
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/clock/imxrt1050-clock.h>
10 #include <dt-bindings/gpio/gpio.h>
13 #address-cells = <1>;
14 #size-cells = <1>;
18 compatible = "fixed-clock";
19 #clock-cells = <0>;
20 clock-frequency = <24000000>;
[all …]
Dimx6sll.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
4 * Copyright 2017-2018 NXP.
8 #include <dt-bindings/clock/imx6sll-clock.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include "imx6sll-pinfunc.h"
14 #address-cells = <1>;
15 #size-cells = <1>;
46 #address-cells = <1>;
47 #size-cells = <0>;
[all …]
Dimx7s.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
6 #include <dt-bindings/clock/imx7d-clock.h>
7 #include <dt-bindings/power/imx7-power.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/reset/imx7-reset.h>
12 #include "imx7d-pinfunc.h"
15 #address-cells = <1>;
16 #size-cells = <1>;
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dimx7ulp.dtsi1 // SPDX-License-Identifier: GPL-2.0+
4 * Copyright 2017-2018 NXP
8 #include <dt-bindings/clock/imx7ulp-clock.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include "imx7ulp-pinfunc.h"
15 interrupt-parent = <&intc>;
17 #address-cells = <1>;
18 #size-cells = <1>;
37 #address-cells = <1>;
[all …]
Dimx6sll.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
4 * Copyright 2017-2018 NXP.
8 #include <dt-bindings/clock/imx6sll-clock.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include "imx6sll-pinfunc.h"
14 #address-cells = <1>;
15 #size-cells = <1>;
46 #address-cells = <1>;
47 #size-cells = <0>;
[all …]
Dimx7s.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
6 #include <dt-bindings/clock/imx7d-clock.h>
7 #include <dt-bindings/power/imx7-power.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/reset/imx7-reset.h>
12 #include "imx7d-pinfunc.h"
15 #address-cells = <1>;
16 #size-cells = <1>;
[all …]
/kernel/linux/linux-6.6/drivers/phy/rockchip/
Dphy-rockchip-emmc.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2016 Shawn Lin <shawn.lin@rock-chips.com>
20 * The higher 16-bit of this register is used for write protection
106 regmap_write(rk_phy->reg_base, in rockchip_emmc_phy_power()
107 rk_phy->reg_offset + GRF_EMMCPHY_CON6, in rockchip_emmc_phy_power()
111 regmap_write(rk_phy->reg_base, in rockchip_emmc_phy_power()
112 rk_phy->reg_offset + GRF_EMMCPHY_CON6, in rockchip_emmc_phy_power()
121 rate = clk_get_rate(rk_phy->emmcclk); in rockchip_emmc_phy_power()
146 rate - ideal_rate : ideal_rate - rate; in rockchip_emmc_phy_power()
149 * In order for tuning delays to be accurate we need to be in rockchip_emmc_phy_power()
[all …]
/kernel/linux/linux-5.10/drivers/phy/rockchip/
Dphy-rockchip-emmc.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2016 Shawn Lin <shawn.lin@rock-chips.com>
20 * The higher 16-bit of this register is used for write protection
98 regmap_write(rk_phy->reg_base, in rockchip_emmc_phy_power()
99 rk_phy->reg_offset + GRF_EMMCPHY_CON6, in rockchip_emmc_phy_power()
103 regmap_write(rk_phy->reg_base, in rockchip_emmc_phy_power()
104 rk_phy->reg_offset + GRF_EMMCPHY_CON6, in rockchip_emmc_phy_power()
113 rate = clk_get_rate(rk_phy->emmcclk); in rockchip_emmc_phy_power()
138 rate - ideal_rate : ideal_rate - rate; in rockchip_emmc_phy_power()
141 * In order for tuning delays to be accurate we need to be in rockchip_emmc_phy_power()
[all …]

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